imx31_phycore.c 2.0 KB

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  1. /*
  2. *
  3. * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/arch/mx31.h>
  25. #include <asm/arch/mx31-regs.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. int dram_init (void)
  28. {
  29. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  30. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  31. return 0;
  32. }
  33. int board_init (void)
  34. {
  35. __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
  36. __REG(CSCR_L(0)) = 0x10000d03;
  37. __REG(CSCR_A(0)) = 0x00720900;
  38. __REG(CSCR_U(1)) = 0x0000df06; /* CS1: Network Controller */
  39. __REG(CSCR_L(1)) = 0x444a4541;
  40. __REG(CSCR_A(1)) = 0x44443302;
  41. __REG(CSCR_U(4)) = 0x0000d843; /* CS4: SRAM */
  42. __REG(CSCR_L(4)) = 0x22252521;
  43. __REG(CSCR_A(4)) = 0x22220a00;
  44. /* setup pins for UART1 */
  45. mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
  46. mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
  47. mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
  48. mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
  49. /* setup pins for I2C2 (for EEPROM, RTC) */
  50. mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL);
  51. mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SCL);
  52. gd->bd->bi_arch_number = 447; /* board id for linux */
  53. gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
  54. return 0;
  55. }
  56. int checkboard (void)
  57. {
  58. printf("Board: Phytec phyCore i.MX31\n");
  59. return 0;
  60. }