i2c.c 4.8 KB

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  1. /*
  2. * i2c Support for Atmel's AT91RM9200 Two-Wire Interface
  3. *
  4. * (c) Rick Bronson
  5. *
  6. * Borrowed heavily from original work by:
  7. * Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
  8. *
  9. * Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. */
  26. #include <common.h>
  27. #ifdef CONFIG_HARD_I2C
  28. #include <i2c.h>
  29. #include <asm/io.h>
  30. #include <asm/arch/hardware.h>
  31. #include <at91rm9200_i2c.h>
  32. /* define DEBUG */
  33. /*
  34. * Poll the i2c status register until the specified bit is set.
  35. * Returns 0 if timed out (100 msec)
  36. */
  37. static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
  38. int loop_cntr = 10000;
  39. do {
  40. udelay(10);
  41. } while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));
  42. return (loop_cntr > 0);
  43. }
  44. /*
  45. * Generic i2c master transfer entrypoint
  46. *
  47. * rw == 1 means that this is a read
  48. */
  49. static int
  50. at91_xfer(unsigned char chip, unsigned int addr, int alen,
  51. unsigned char *buffer, int len, int rw)
  52. {
  53. AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
  54. int length;
  55. unsigned char *buf;
  56. /* Set the TWI Master Mode Register */
  57. twi->TWI_MMR = (chip << 16) | (alen << 8)
  58. | ((rw == 1) ? AT91C_TWI_MREAD : 0);
  59. /* Set TWI Internal Address Register with first messages data field */
  60. /* only one address byte is supported */
  61. if (alen > 0)
  62. twi->TWI_IADR = addr & 0xff;
  63. length = len;
  64. buf = buffer;
  65. if (length && buf) { /* sanity check */
  66. if (rw) {
  67. twi->TWI_CR = AT91C_TWI_START;
  68. while (length--) {
  69. if (!length)
  70. twi->TWI_CR = AT91C_TWI_STOP;
  71. /* Wait until transfer is finished */
  72. if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
  73. debug ("at91_i2c: timeout 1\n");
  74. return 1;
  75. }
  76. *buf++ = twi->TWI_RHR;
  77. }
  78. if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
  79. debug ("at91_i2c: timeout 2\n");
  80. return 1;
  81. }
  82. } else {
  83. twi->TWI_CR = AT91C_TWI_START;
  84. while (length--) {
  85. twi->TWI_THR = *buf++;
  86. if (!length)
  87. twi->TWI_CR = AT91C_TWI_STOP;
  88. if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
  89. debug ("at91_i2c: timeout 3\n");
  90. return 1;
  91. }
  92. }
  93. /* Wait until transfer is finished */
  94. if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
  95. debug ("at91_i2c: timeout 4\n");
  96. return 1;
  97. }
  98. }
  99. }
  100. return 0;
  101. }
  102. int
  103. i2c_probe(unsigned char chip)
  104. {
  105. char buffer[1];
  106. return at91_xfer(chip, 0, 0, buffer, 1, 1);
  107. }
  108. int
  109. i2c_read (unsigned char chip, unsigned int addr, int alen,
  110. unsigned char *buffer, int len)
  111. {
  112. #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
  113. /* we only allow one address byte */
  114. if (alen > 1)
  115. return 1;
  116. /* XXX assume an ATMEL AT24C16 */
  117. if (alen == 1) {
  118. #if 0 /* EEPROM code already sets this correctly */
  119. chip |= (addr >> 8) & 0xff;
  120. #endif
  121. addr = addr & 0xff;
  122. }
  123. #endif
  124. return at91_xfer(chip, addr, alen, buffer, len, 1);
  125. }
  126. int
  127. i2c_write(unsigned char chip, unsigned int addr, int alen,
  128. unsigned char *buffer, int len)
  129. {
  130. int i;
  131. unsigned char *buf;
  132. #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
  133. /* we only allow one address byte */
  134. if (alen > 1)
  135. return 1;
  136. /* XXX assume an ATMEL AT24C16 */
  137. if (alen == 1) {
  138. buf = buffer;
  139. /* do single byte writes */
  140. for (i = 0; i < len; i++) {
  141. #if 0 /* EEPROM code already sets this correctly */
  142. chip |= (addr >> 8) & 0xff;
  143. #endif
  144. addr = addr & 0xff;
  145. if (at91_xfer(chip, addr, alen, buf++, 1, 0))
  146. return 1;
  147. addr++;
  148. }
  149. return 0;
  150. }
  151. #endif
  152. return at91_xfer(chip, addr, alen, buffer, len, 0);
  153. }
  154. /*
  155. * Main initialization routine
  156. */
  157. void
  158. i2c_init(int speed, int slaveaddr)
  159. {
  160. AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
  161. *AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
  162. *AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
  163. *AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK;
  164. *AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */
  165. twi->TWI_IDR = 0x3ff; /* Disable all interrupts */
  166. twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */
  167. twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */
  168. /* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
  169. twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8);
  170. debug ("Found AT91 i2c\n");
  171. return;
  172. }
  173. #endif /* CONFIG_HARD_I2C */