cpu.c 2.9 KB

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  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <watchdog.h>
  29. #include <command.h>
  30. #include <asm/immap.h>
  31. DECLARE_GLOBAL_DATA_PTR;
  32. int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  33. {
  34. volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  35. gptmr->pre = 10;
  36. gptmr->cnt = 1;
  37. /* enable watchdog, set timeout to 0 and wait */
  38. gptmr->mode = GPT_TMS_SGPIO;
  39. gptmr->ctrl = GPT_CTRL_WDEN | GPT_CTRL_CE;
  40. /* we don't return! */
  41. return 1;
  42. };
  43. int checkcpu(void)
  44. {
  45. volatile siu_t *siu = (siu_t *) MMAP_SIU;
  46. u16 id = 0;
  47. puts("CPU: ");
  48. switch ((siu->jtagid & 0x000FF000) >> 12) {
  49. case 0x0C:
  50. id = 5485;
  51. break;
  52. case 0x0D:
  53. id = 5484;
  54. break;
  55. case 0x0E:
  56. id = 5483;
  57. break;
  58. case 0x0F:
  59. id = 5482;
  60. break;
  61. case 0x10:
  62. id = 5481;
  63. break;
  64. case 0x11:
  65. id = 5480;
  66. break;
  67. case 0x12:
  68. id = 5475;
  69. break;
  70. case 0x13:
  71. id = 5474;
  72. break;
  73. case 0x14:
  74. id = 5473;
  75. break;
  76. case 0x15:
  77. id = 5472;
  78. break;
  79. case 0x16:
  80. id = 5471;
  81. break;
  82. case 0x17:
  83. id = 5470;
  84. break;
  85. }
  86. if (id) {
  87. printf("Freescale MCF%d\n", id);
  88. printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
  89. (int)(gd->cpu_clk / 1000000),
  90. (int)(gd->bus_clk / 1000000));
  91. }
  92. return 0;
  93. };
  94. #if defined(CONFIG_HW_WATCHDOG)
  95. /* Called by macro WATCHDOG_RESET */
  96. void hw_watchdog_reset(void)
  97. {
  98. volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  99. gptmr->ocpw = 0xa5;
  100. }
  101. int watchdog_disable(void)
  102. {
  103. volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  104. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  105. gptmr->mode = 0;
  106. gptmr->ctrl = 0;
  107. puts("WATCHDOG:disabled\n");
  108. return (0);
  109. }
  110. int watchdog_init(void)
  111. {
  112. volatile gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  113. gptmr->pre = CONFIG_WATCHDOG_TIMEOUT;
  114. gptmr->cnt = CFG_TIMER_PRESCALER * 1000;
  115. gptmr->mode = GPT_TMS_SGPIO;
  116. gptmr->ctrl = GPT_CTRL_CE | GPT_CTRL_WDEN;
  117. puts("WATCHDOG:enabled\n");
  118. return (0);
  119. }
  120. #endif /* CONFIG_HW_WATCHDOG */