m5272.h 7.0 KB

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  1. /*
  2. * mcf5272.h -- Definitions for Motorola Coldfire 5272
  3. *
  4. * Based on mcf5272sim.h of uCLinux distribution:
  5. * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
  6. * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef mcf5272_h
  27. #define mcf5272_h
  28. /****************************************************************************/
  29. /*
  30. * Size of internal RAM
  31. */
  32. #define INT_RAM_SIZE 4096
  33. #define GPIO_PACNT_PA15MSK (0xC0000000)
  34. #define GPIO_PACNT_DGNT1 (0x40000000)
  35. #define GPIO_PACNT_PA14MSK (0x30000000)
  36. #define GPIO_PACNT_DREQ1 (0x10000000)
  37. #define GPIO_PACNT_PA13MSK (0x0C000000)
  38. #define GPIO_PACNT_DFSC3 (0x04000000)
  39. #define GPIO_PACNT_PA12MSK (0x03000000)
  40. #define GPIO_PACNT_DFSC2 (0x01000000)
  41. #define GPIO_PACNT_PA11MSK (0x00C00000)
  42. #define GPIO_PACNT_QSPI_CS1 (0x00800000)
  43. #define GPIO_PACNT_PA10MSK (0x00300000)
  44. #define GPIO_PACNT_DREQ0 (0x00100000)
  45. #define GPIO_PACNT_PA9MSK (0x000C0000)
  46. #define GPIO_PACNT_DGNT0 (0x00040000)
  47. #define GPIO_PACNT_PA8MSK (0x00030000)
  48. #define GPIO_PACNT_FSC0 (0x00010000)
  49. #define GPIO_PACNT_FSR0 (0x00010000)
  50. #define GPIO_PACNT_PA7MSK (0x0000C000)
  51. #define GPIO_PACNT_DOUT3 (0x00008000)
  52. #define GPIO_PACNT_QSPI_CS3 (0x00004000)
  53. #define GPIO_PACNT_PA6MSK (0x00003000)
  54. #define GPIO_PACNT_USB_RXD (0x00001000)
  55. #define GPIO_PACNT_PA5MSK (0x00000C00)
  56. #define GPIO_PACNT_USB_TXEN (0x00000400)
  57. #define GPIO_PACNT_PA4MSK (0x00000300)
  58. #define GPIO_PACNT_USB_SUSP (0x00000100)
  59. #define GPIO_PACNT_PA3MSK (0x000000C0)
  60. #define GPIO_PACNT_USB_TN (0x00000040)
  61. #define GPIO_PACNT_PA2MSK (0x00000030)
  62. #define GPIO_PACNT_USB_RN (0x00000010)
  63. #define GPIO_PACNT_PA1MSK (0x0000000C)
  64. #define GPIO_PACNT_USB_RP (0x00000004)
  65. #define GPIO_PACNT_PA0MSK (0x00000003)
  66. #define GPIO_PACNT_USB_TP (0x00000001)
  67. #define GPIO_PBCNT_PB15MSK (0xC0000000)
  68. #define GPIO_PBCNT_E_MDC (0x40000000)
  69. #define GPIO_PBCNT_PB14MSK (0x30000000)
  70. #define GPIO_PBCNT_E_RXER (0x10000000)
  71. #define GPIO_PBCNT_PB13MSK (0x0C000000)
  72. #define GPIO_PBCNT_E_RXD1 (0x04000000)
  73. #define GPIO_PBCNT_PB12MSK (0x03000000)
  74. #define GPIO_PBCNT_E_RXD2 (0x01000000)
  75. #define GPIO_PBCNT_PB11MSK (0x00C00000)
  76. #define GPIO_PBCNT_E_RXD3 (0x00400000)
  77. #define GPIO_PBCNT_PB10MSK (0x00300000)
  78. #define GPIO_PBCNT_E_TXD1 (0x00100000)
  79. #define GPIO_PBCNT_PB9MSK (0x000C0000)
  80. #define GPIO_PBCNT_E_TXD2 (0x00040000)
  81. #define GPIO_PBCNT_PB8MSK (0x00030000)
  82. #define GPIO_PBCNT_E_TXD3 (0x00010000)
  83. #define GPIO_PBCNT_PB7MSK (0x0000C000)
  84. #define GPIO_PBCNT_TOUT0 (0x00004000)
  85. #define GPIO_PBCNT_PB6MSK (0x00003000)
  86. #define GPIO_PBCNT_TA (0x00001000)
  87. #define GPIO_PBCNT_PB4MSK (0x00000300)
  88. #define GPIO_PBCNT_URT0_CLK (0x00000100)
  89. #define GPIO_PBCNT_PB3MSK (0x000000C0)
  90. #define GPIO_PBCNT_URT0_RTS (0x00000040)
  91. #define GPIO_PBCNT_PB2MSK (0x00000030)
  92. #define GPIO_PBCNT_URT0_CTS (0x00000010)
  93. #define GPIO_PBCNT_PB1MSK (0x0000000C)
  94. #define GPIO_PBCNT_URT0_RXD (0x00000004)
  95. #define GPIO_PBCNT_URT0_TIN2 (0x00000004)
  96. #define GPIO_PBCNT_PB0MSK (0x00000003)
  97. #define GPIO_PBCNT_URT0_TXD (0x00000001)
  98. #define GPIO_PDCNT_PD7MSK (0x0000C000)
  99. #define GPIO_PDCNT_TIN1 (0x00008000)
  100. #define GPIO_PDCNT_PWM_OUT2 (0x00004000)
  101. #define GPIO_PDCNT_PD6MSK (0x00003000)
  102. #define GPIO_PDCNT_TOUT1 (0x00002000)
  103. #define GPIO_PDCNT_PWM_OUT1 (0x00001000)
  104. #define GPIO_PDCNT_PD5MSK (0x00000C00)
  105. #define GPIO_PDCNT_INT4 (0x00000C00)
  106. #define GPIO_PDCNT_DIN3 (0x00000800)
  107. #define GPIO_PDCNT_PD4MSK (0x00000300)
  108. #define GPIO_PDCNT_URT1_TXD (0x00000200)
  109. #define GPIO_PDCNT_DOUT0 (0x00000100)
  110. #define GPIO_PDCNT_PD3MSK (0x000000C0)
  111. #define GPIO_PDCNT_INT5 (0x000000C0)
  112. #define GPIO_PDCNT_URT1_RTS (0x00000080)
  113. #define GPIO_PDCNT_PD2MSK (0x00000030)
  114. #define GPIO_PDCNT_QSPI_CS2 (0x00000030)
  115. #define GPIO_PDCNT_URT1_CTS (0x00000020)
  116. #define GPIO_PDCNT_PD1MSK (0x0000000C)
  117. #define GPIO_PDCNT_URT1_RXD (0x00000008)
  118. #define GPIO_PDCNT_URT1_TIN3 (0x00000008)
  119. #define GPIO_PDCNT_DIN0 (0x00000004)
  120. #define GPIO_PDCNT_PD0MSK (0x00000003)
  121. #define GPIO_PDCNT_URT1_CLK (0x00000002)
  122. #define GPIO_PDCNT_DCL0 (0x00000001)
  123. #define INT_RSVD0 (0)
  124. #define INT_INT1 (1)
  125. #define INT_INT2 (2)
  126. #define INT_INT3 (3)
  127. #define INT_INT4 (4)
  128. #define INT_TMR0 (5)
  129. #define INT_TMR1 (6)
  130. #define INT_TMR2 (7)
  131. #define INT_TMR3 (8)
  132. #define INT_UART1 (9)
  133. #define INT_UART2 (10)
  134. #define INT_PLIP (11)
  135. #define INT_PLIA (12)
  136. #define INT_USB0 (13)
  137. #define INT_USB1 (14)
  138. #define INT_USB2 (15)
  139. #define INT_USB3 (16)
  140. #define INT_USB4 (17)
  141. #define INT_USB5 (18)
  142. #define INT_USB6 (19)
  143. #define INT_USB7 (20)
  144. #define INT_DMA (21)
  145. #define INT_ERX (22)
  146. #define INT_ETX (23)
  147. #define INT_ENTC (24)
  148. #define INT_QSPI (25)
  149. #define INT_INT5 (26)
  150. #define INT_INT6 (27)
  151. #define INT_SWTO (28)
  152. #define INT_ICR1_TMR0MASK (0x000F000)
  153. #define INT_ICR1_TMR0PI (0x0008000)
  154. #define INT_ICR1_TMR0IPL(x) (((x)&0x7)<<12)
  155. #define INT_ICR1_TMR1MASK (0x0000F00)
  156. #define INT_ICR1_TMR1PI (0x0000800)
  157. #define INT_ICR1_TMR1IPL(x) (((x)&0x7)<<8)
  158. #define INT_ICR1_TMR2MASK (0x00000F0)
  159. #define INT_ICR1_TMR2PI (0x0000080)
  160. #define INT_ICR1_TMR2IPL(x) (((x)&0x7)<<4)
  161. #define INT_ICR1_TMR3MASK (0x000000F)
  162. #define INT_ICR1_TMR3PI (0x0000008)
  163. #define INT_ICR1_TMR3IPL(x) (((x)&0x7))
  164. #define INT_ISR_INT31 (0x80000000)
  165. #define INT_ISR_INT30 (0x40000000)
  166. #define INT_ISR_INT29 (0x20000000)
  167. #define INT_ISR_INT28 (0x10000000)
  168. #define INT_ISR_INT27 (0x08000000)
  169. #define INT_ISR_INT26 (0x04000000)
  170. #define INT_ISR_INT25 (0x02000000)
  171. #define INT_ISR_INT24 (0x01000000)
  172. #define INT_ISR_INT23 (0x00800000)
  173. #define INT_ISR_INT22 (0x00400000)
  174. #define INT_ISR_INT21 (0x00200000)
  175. #define INT_ISR_INT20 (0x00100000)
  176. #define INT_ISR_INT19 (0x00080000)
  177. #define INT_ISR_INT18 (0x00040000)
  178. #define INT_ISR_INT17 (0x00020000)
  179. #define INT_ISR_INT16 (0x00010000)
  180. #define INT_ISR_INT15 (0x00008000)
  181. #define INT_ISR_INT14 (0x00004000)
  182. #define INT_ISR_INT13 (0x00002000)
  183. #define INT_ISR_INT12 (0x00001000)
  184. #define INT_ISR_INT11 (0x00000800)
  185. #define INT_ISR_INT10 (0x00000400)
  186. #define INT_ISR_INT9 (0x00000200)
  187. #define INT_ISR_INT8 (0x00000100)
  188. #define INT_ISR_INT7 (0x00000080)
  189. #define INT_ISR_INT6 (0x00000040)
  190. #define INT_ISR_INT5 (0x00000020)
  191. #define INT_ISR_INT4 (0x00000010)
  192. #define INT_ISR_INT3 (0x00000008)
  193. #define INT_ISR_INT2 (0x00000004)
  194. #define INT_ISR_INT1 (0x00000002)
  195. #define INT_ISR_INT0 (0x00000001)
  196. #endif /* mcf5272_h */