xuartlite_l.h 8.4 KB

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  1. /*****************************************************************************
  2. *
  3. * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
  4. * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
  5. * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
  6. * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
  7. * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
  8. * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
  9. * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
  10. * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
  11. * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
  12. * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
  13. * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
  14. * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  15. * FOR A PARTICULAR PURPOSE.
  16. *
  17. * (c) Copyright 2002 Xilinx Inc.
  18. * All rights reserved.
  19. *
  20. *****************************************************************************/
  21. /****************************************************************************/
  22. /**
  23. *
  24. * @file xuartlite_l.h
  25. *
  26. * This header file contains identifiers and low-level driver functions (or
  27. * macros) that can be used to access the device. High-level driver functions
  28. * are defined in xuartlite.h.
  29. *
  30. * <pre>
  31. * MODIFICATION HISTORY:
  32. *
  33. * Ver Who Date Changes
  34. * ----- ---- -------- -----------------------------------------------
  35. * 1.00b rpm 04/25/02 First release
  36. * </pre>
  37. *
  38. *****************************************************************************/
  39. #ifndef XUARTLITE_L_H /* prevent circular inclusions */
  40. #define XUARTLITE_L_H /* by using protection macros */
  41. /***************************** Include Files ********************************/
  42. #include "xbasic_types.h"
  43. #include "xio.h"
  44. /************************** Constant Definitions ****************************/
  45. /* UART Lite register offsets */
  46. #define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */
  47. #define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */
  48. #define XUL_STATUS_REG_OFFSET 8 /* status register, read only */
  49. #define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */
  50. /* control register bit positions */
  51. #define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */
  52. #define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */
  53. #define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */
  54. /* status register bit positions */
  55. #define XUL_SR_PARITY_ERROR 0x80
  56. #define XUL_SR_FRAMING_ERROR 0x40
  57. #define XUL_SR_OVERRUN_ERROR 0x20
  58. #define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */
  59. #define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
  60. #define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */
  61. #define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
  62. #define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
  63. /* the following constant specifies the size of the FIFOs, the size of the
  64. * FIFOs includes the transmitter and receiver such that it is the total number
  65. * of bytes that the UART can buffer
  66. */
  67. #define XUL_FIFO_SIZE 16
  68. /* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a
  69. * per instance basis
  70. */
  71. #define XUL_STOP_BITS 1
  72. /* Parity definitions
  73. */
  74. #define XUL_PARITY_NONE 0
  75. #define XUL_PARITY_ODD 1
  76. #define XUL_PARITY_EVEN 2
  77. /**************************** Type Definitions ******************************/
  78. /***************** Macros (Inline Functions) Definitions ********************/
  79. /*****************************************************************************
  80. *
  81. * Low-level driver macros and functions. The list below provides signatures
  82. * to help the user use the macros.
  83. *
  84. * void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask)
  85. * u32 XUartLite_mGetControlReg(u32 BaseAddress)
  86. * u32 XUartLite_mGetStatusReg(u32 BaseAddress)
  87. *
  88. * Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress)
  89. * Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress)
  90. * Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress)
  91. *
  92. * void XUartLite_mEnableIntr(u32 BaseAddress)
  93. * void XUartLite_mDisableIntr(u32 BaseAddress)
  94. *
  95. * void XUartLite_SendByte(u32 BaseAddress, u8 Data);
  96. * u8 XUartLite_RecvByte(u32 BaseAddress);
  97. *
  98. *****************************************************************************/
  99. /****************************************************************************/
  100. /**
  101. *
  102. * Set the contents of the control register. Use the XUL_CR_* constants defined
  103. * above to create the bit-mask to be written to the register.
  104. *
  105. * @param BaseAddress is the base address of the device
  106. * @param Mask is the 32-bit value to write to the control register
  107. *
  108. * @return None.
  109. *
  110. * @note None.
  111. *
  112. *****************************************************************************/
  113. #define XUartLite_mSetControlReg(BaseAddress, Mask) \
  114. XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask))
  115. /****************************************************************************/
  116. /**
  117. *
  118. * Get the contents of the control register. Use the XUL_CR_* constants defined
  119. * above to interpret the bit-mask returned.
  120. *
  121. * @param BaseAddress is the base address of the device
  122. *
  123. * @return A 32-bit value representing the contents of the control register.
  124. *
  125. * @note None.
  126. *
  127. *****************************************************************************/
  128. #define XUartLite_mGetControlReg(BaseAddress) \
  129. XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET)
  130. /****************************************************************************/
  131. /**
  132. *
  133. * Get the contents of the status register. Use the XUL_SR_* constants defined
  134. * above to interpret the bit-mask returned.
  135. *
  136. * @param BaseAddress is the base address of the device
  137. *
  138. * @return A 32-bit value representing the contents of the status register.
  139. *
  140. * @note None.
  141. *
  142. *****************************************************************************/
  143. #define XUartLite_mGetStatusReg(BaseAddress) \
  144. XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET)
  145. /****************************************************************************/
  146. /**
  147. *
  148. * Check to see if the receiver has data.
  149. *
  150. * @param BaseAddress is the base address of the device
  151. *
  152. * @return XTRUE if the receiver is empty, XFALSE if there is data present.
  153. *
  154. * @note None.
  155. *
  156. *****************************************************************************/
  157. #define XUartLite_mIsReceiveEmpty(BaseAddress) \
  158. (!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA))
  159. /****************************************************************************/
  160. /**
  161. *
  162. * Check to see if the transmitter is full.
  163. *
  164. * @param BaseAddress is the base address of the device
  165. *
  166. * @return XTRUE if the transmitter is full, XFALSE otherwise.
  167. *
  168. * @note None.
  169. *
  170. *****************************************************************************/
  171. #define XUartLite_mIsTransmitFull(BaseAddress) \
  172. (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL)
  173. /****************************************************************************/
  174. /**
  175. *
  176. * Check to see if the interrupt is enabled.
  177. *
  178. * @param BaseAddress is the base address of the device
  179. *
  180. * @return XTRUE if the interrupt is enabled, XFALSE otherwise.
  181. *
  182. * @note None.
  183. *
  184. *****************************************************************************/
  185. #define XUartLite_mIsIntrEnabled(BaseAddress) \
  186. (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED)
  187. /****************************************************************************/
  188. /**
  189. *
  190. * Enable the device interrupt. Preserve the contents of the control register.
  191. *
  192. * @param BaseAddress is the base address of the device
  193. *
  194. * @return None.
  195. *
  196. * @note None.
  197. *
  198. *****************************************************************************/
  199. #define XUartLite_mEnableIntr(BaseAddress) \
  200. XUartLite_mSetControlReg((BaseAddress), \
  201. XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR)
  202. /****************************************************************************/
  203. /**
  204. *
  205. * Disable the device interrupt. Preserve the contents of the control register.
  206. *
  207. * @param BaseAddress is the base address of the device
  208. *
  209. * @return None.
  210. *
  211. * @note None.
  212. *
  213. *****************************************************************************/
  214. #define XUartLite_mDisableIntr(BaseAddress) \
  215. XUartLite_mSetControlReg((BaseAddress), \
  216. XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR)
  217. /************************** Function Prototypes *****************************/
  218. void XUartLite_SendByte(u32 BaseAddress, u8 Data);
  219. u8 XUartLite_RecvByte(u32 BaseAddress);
  220. #endif /* end of protection macro */