xilinx.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351
  1. /*
  2. * (C) Copyright 2002
  3. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  4. * Keith Outwater, keith_outwater@mvis.com
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. *
  24. */
  25. /*
  26. * Xilinx FPGA support
  27. */
  28. #include <common.h>
  29. #include <virtex2.h>
  30. #include <spartan2.h>
  31. #include <spartan3.h>
  32. #if 0
  33. #define FPGA_DEBUG
  34. #endif
  35. /* Define FPGA_DEBUG to get debug printf's */
  36. #ifdef FPGA_DEBUG
  37. #define PRINTF(fmt,args...) printf (fmt ,##args)
  38. #else
  39. #define PRINTF(fmt,args...)
  40. #endif
  41. /* Local Static Functions */
  42. static int xilinx_validate (Xilinx_desc * desc, char *fn);
  43. /* ------------------------------------------------------------------------- */
  44. int fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size)
  45. {
  46. unsigned int length;
  47. unsigned int swapsize;
  48. char buffer[80];
  49. unsigned char *dataptr;
  50. unsigned int i;
  51. dataptr = (unsigned char *)fpgadata;
  52. /* skip the first bytes of the bitsteam, their meaning is unknown */
  53. length = (*dataptr << 8) + *(dataptr + 1);
  54. dataptr += 2;
  55. dataptr += length;
  56. /* get design name (identifier, length, string) */
  57. length = (*dataptr << 8) + *(dataptr + 1);
  58. dataptr += 2;
  59. if (*dataptr++ != 0x61) {
  60. debug("%s: Design name id not recognized in bitstream\n",
  61. __func__);
  62. return FPGA_FAIL;
  63. }
  64. length = (*dataptr << 8) + *(dataptr + 1);
  65. dataptr += 2;
  66. for (i = 0; i < length; i++)
  67. buffer[i] = *dataptr++;
  68. printf(" design filename = \"%s\"\n", buffer);
  69. /* get part number (identifier, length, string) */
  70. if (*dataptr++ != 0x62) {
  71. printf("%s: Part number id not recognized in bitstream\n",
  72. __func__);
  73. return FPGA_FAIL;
  74. }
  75. length = (*dataptr << 8) + *(dataptr + 1);
  76. dataptr += 2;
  77. for (i = 0; i < length; i++)
  78. buffer[i] = *dataptr++;
  79. printf(" part number = \"%s\"\n", buffer);
  80. /* get date (identifier, length, string) */
  81. if (*dataptr++ != 0x63) {
  82. printf("%s: Date identifier not recognized in bitstream\n",
  83. __func__);
  84. return FPGA_FAIL;
  85. }
  86. length = (*dataptr << 8) + *(dataptr+1);
  87. dataptr += 2;
  88. for (i = 0; i < length; i++)
  89. buffer[i] = *dataptr++;
  90. printf(" date = \"%s\"\n", buffer);
  91. /* get time (identifier, length, string) */
  92. if (*dataptr++ != 0x64) {
  93. printf("%s: Time identifier not recognized in bitstream\n",
  94. __func__);
  95. return FPGA_FAIL;
  96. }
  97. length = (*dataptr << 8) + *(dataptr+1);
  98. dataptr += 2;
  99. for (i = 0; i < length; i++)
  100. buffer[i] = *dataptr++;
  101. printf(" time = \"%s\"\n", buffer);
  102. /* get fpga data length (identifier, length) */
  103. if (*dataptr++ != 0x65) {
  104. printf("%s: Data length id not recognized in bitstream\n",
  105. __func__);
  106. return FPGA_FAIL;
  107. }
  108. swapsize = ((unsigned int) *dataptr << 24) +
  109. ((unsigned int) *(dataptr + 1) << 16) +
  110. ((unsigned int) *(dataptr + 2) << 8) +
  111. ((unsigned int) *(dataptr + 3));
  112. dataptr += 4;
  113. printf(" bytes in bitstream = %d\n", swapsize);
  114. return fpga_load(dev, dataptr, swapsize);
  115. }
  116. int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
  117. {
  118. int ret_val = FPGA_FAIL; /* assume a failure */
  119. if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
  120. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  121. } else
  122. switch (desc->family) {
  123. case Xilinx_Spartan2:
  124. #if defined(CONFIG_FPGA_SPARTAN2)
  125. PRINTF ("%s: Launching the Spartan-II Loader...\n",
  126. __FUNCTION__);
  127. ret_val = Spartan2_load (desc, buf, bsize);
  128. #else
  129. printf ("%s: No support for Spartan-II devices.\n",
  130. __FUNCTION__);
  131. #endif
  132. break;
  133. case Xilinx_Spartan3:
  134. #if defined(CONFIG_FPGA_SPARTAN3)
  135. PRINTF ("%s: Launching the Spartan-III Loader...\n",
  136. __FUNCTION__);
  137. ret_val = Spartan3_load (desc, buf, bsize);
  138. #else
  139. printf ("%s: No support for Spartan-III devices.\n",
  140. __FUNCTION__);
  141. #endif
  142. break;
  143. case Xilinx_Virtex2:
  144. #if defined(CONFIG_FPGA_VIRTEX2)
  145. PRINTF ("%s: Launching the Virtex-II Loader...\n",
  146. __FUNCTION__);
  147. ret_val = Virtex2_load (desc, buf, bsize);
  148. #else
  149. printf ("%s: No support for Virtex-II devices.\n",
  150. __FUNCTION__);
  151. #endif
  152. break;
  153. default:
  154. printf ("%s: Unsupported family type, %d\n",
  155. __FUNCTION__, desc->family);
  156. }
  157. return ret_val;
  158. }
  159. int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
  160. {
  161. int ret_val = FPGA_FAIL; /* assume a failure */
  162. if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
  163. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  164. } else
  165. switch (desc->family) {
  166. case Xilinx_Spartan2:
  167. #if defined(CONFIG_FPGA_SPARTAN2)
  168. PRINTF ("%s: Launching the Spartan-II Reader...\n",
  169. __FUNCTION__);
  170. ret_val = Spartan2_dump (desc, buf, bsize);
  171. #else
  172. printf ("%s: No support for Spartan-II devices.\n",
  173. __FUNCTION__);
  174. #endif
  175. break;
  176. case Xilinx_Spartan3:
  177. #if defined(CONFIG_FPGA_SPARTAN3)
  178. PRINTF ("%s: Launching the Spartan-III Reader...\n",
  179. __FUNCTION__);
  180. ret_val = Spartan3_dump (desc, buf, bsize);
  181. #else
  182. printf ("%s: No support for Spartan-III devices.\n",
  183. __FUNCTION__);
  184. #endif
  185. break;
  186. case Xilinx_Virtex2:
  187. #if defined( CONFIG_FPGA_VIRTEX2)
  188. PRINTF ("%s: Launching the Virtex-II Reader...\n",
  189. __FUNCTION__);
  190. ret_val = Virtex2_dump (desc, buf, bsize);
  191. #else
  192. printf ("%s: No support for Virtex-II devices.\n",
  193. __FUNCTION__);
  194. #endif
  195. break;
  196. default:
  197. printf ("%s: Unsupported family type, %d\n",
  198. __FUNCTION__, desc->family);
  199. }
  200. return ret_val;
  201. }
  202. int xilinx_info (Xilinx_desc * desc)
  203. {
  204. int ret_val = FPGA_FAIL;
  205. if (xilinx_validate (desc, (char *)__FUNCTION__)) {
  206. printf ("Family: \t");
  207. switch (desc->family) {
  208. case Xilinx_Spartan2:
  209. printf ("Spartan-II\n");
  210. break;
  211. case Xilinx_Spartan3:
  212. printf ("Spartan-III\n");
  213. break;
  214. case Xilinx_Virtex2:
  215. printf ("Virtex-II\n");
  216. break;
  217. /* Add new family types here */
  218. default:
  219. printf ("Unknown family type, %d\n", desc->family);
  220. }
  221. printf ("Interface type:\t");
  222. switch (desc->iface) {
  223. case slave_serial:
  224. printf ("Slave Serial\n");
  225. break;
  226. case master_serial: /* Not used */
  227. printf ("Master Serial\n");
  228. break;
  229. case slave_parallel:
  230. printf ("Slave Parallel\n");
  231. break;
  232. case jtag_mode: /* Not used */
  233. printf ("JTAG Mode\n");
  234. break;
  235. case slave_selectmap:
  236. printf ("Slave SelectMap Mode\n");
  237. break;
  238. case master_selectmap:
  239. printf ("Master SelectMap Mode\n");
  240. break;
  241. /* Add new interface types here */
  242. default:
  243. printf ("Unsupported interface type, %d\n", desc->iface);
  244. }
  245. printf ("Device Size: \t%d bytes\n"
  246. "Cookie: \t0x%x (%d)\n",
  247. desc->size, desc->cookie, desc->cookie);
  248. if (desc->iface_fns) {
  249. printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
  250. switch (desc->family) {
  251. case Xilinx_Spartan2:
  252. #if defined(CONFIG_FPGA_SPARTAN2)
  253. Spartan2_info (desc);
  254. #else
  255. /* just in case */
  256. printf ("%s: No support for Spartan-II devices.\n",
  257. __FUNCTION__);
  258. #endif
  259. break;
  260. case Xilinx_Spartan3:
  261. #if defined(CONFIG_FPGA_SPARTAN3)
  262. Spartan3_info (desc);
  263. #else
  264. /* just in case */
  265. printf ("%s: No support for Spartan-III devices.\n",
  266. __FUNCTION__);
  267. #endif
  268. break;
  269. case Xilinx_Virtex2:
  270. #if defined(CONFIG_FPGA_VIRTEX2)
  271. Virtex2_info (desc);
  272. #else
  273. /* just in case */
  274. printf ("%s: No support for Virtex-II devices.\n",
  275. __FUNCTION__);
  276. #endif
  277. break;
  278. /* Add new family types here */
  279. default:
  280. /* we don't need a message here - we give one up above */
  281. ;
  282. }
  283. } else
  284. printf ("No Device Function Table.\n");
  285. ret_val = FPGA_SUCCESS;
  286. } else {
  287. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  288. }
  289. return ret_val;
  290. }
  291. /* ------------------------------------------------------------------------- */
  292. static int xilinx_validate (Xilinx_desc * desc, char *fn)
  293. {
  294. int ret_val = false;
  295. if (desc) {
  296. if ((desc->family > min_xilinx_type) &&
  297. (desc->family < max_xilinx_type)) {
  298. if ((desc->iface > min_xilinx_iface_type) &&
  299. (desc->iface < max_xilinx_iface_type)) {
  300. if (desc->size) {
  301. ret_val = true;
  302. } else
  303. printf ("%s: NULL part size\n", fn);
  304. } else
  305. printf ("%s: Invalid Interface type, %d\n",
  306. fn, desc->iface);
  307. } else
  308. printf ("%s: Invalid family type, %d\n", fn, desc->family);
  309. } else
  310. printf ("%s: NULL descriptor!\n", fn);
  311. return ret_val;
  312. }