cache.c 1.1 KB

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  1. /*
  2. * U-boot - cache.c
  3. *
  4. * Copyright (c) 2005-2008 Analog Devices Inc.
  5. *
  6. * (C) Copyright 2000-2004
  7. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  8. *
  9. * Licensed under the GPL-2 or later.
  10. */
  11. #include <common.h>
  12. #include <asm/blackfin.h>
  13. #include <asm/mach-common/bits/mpu.h>
  14. void flush_cache(unsigned long addr, unsigned long size)
  15. {
  16. /* no need to flush stuff in on chip memory (L1/L2/etc...) */
  17. if (addr >= 0xE0000000)
  18. return;
  19. if (icache_status())
  20. blackfin_icache_flush_range((void *)addr, (void *)(addr + size));
  21. if (dcache_status())
  22. blackfin_dcache_flush_range((void *)addr, (void *)(addr + size));
  23. }
  24. void icache_enable(void)
  25. {
  26. bfin_write_IMEM_CONTROL(IMC | ENICPLB);
  27. SSYNC();
  28. }
  29. void icache_disable(void)
  30. {
  31. bfin_write_IMEM_CONTROL(0);
  32. SSYNC();
  33. }
  34. int icache_status(void)
  35. {
  36. return bfin_read_IMEM_CONTROL() & IMC;
  37. }
  38. void dcache_enable(void)
  39. {
  40. bfin_write_DMEM_CONTROL(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
  41. SSYNC();
  42. }
  43. void dcache_disable(void)
  44. {
  45. bfin_write_DMEM_CONTROL(0);
  46. SSYNC();
  47. }
  48. int dcache_status(void)
  49. {
  50. return bfin_read_DMEM_CONTROL() & ACACHE_BCACHE;
  51. }