soft_i2c.c 9.8 KB

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  1. /*
  2. * (C) Copyright 2001, 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  24. * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
  25. * Neil Russell.
  26. */
  27. #include <common.h>
  28. #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
  29. #include <ioports.h>
  30. #endif
  31. #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
  32. #include <asm/io.h>
  33. #include <asm/arch/hardware.h>
  34. #endif
  35. #ifdef CONFIG_IXP425 /* only valid for IXP425 */
  36. #include <asm/arch/ixp425.h>
  37. #endif
  38. #ifdef CONFIG_LPC2292
  39. #include <asm/arch/hardware.h>
  40. #endif
  41. #include <i2c.h>
  42. /* #define DEBUG_I2C */
  43. #ifdef DEBUG_I2C
  44. DECLARE_GLOBAL_DATA_PTR;
  45. #endif
  46. /*-----------------------------------------------------------------------
  47. * Definitions
  48. */
  49. #define RETRIES 0
  50. #define I2C_ACK 0 /* PD_SDA level to ack a byte */
  51. #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
  52. #ifdef DEBUG_I2C
  53. #define PRINTD(fmt,args...) do { \
  54. if (gd->have_console) \
  55. printf (fmt ,##args); \
  56. } while (0)
  57. #else
  58. #define PRINTD(fmt,args...)
  59. #endif
  60. #if defined(CONFIG_I2C_MULTI_BUS)
  61. static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
  62. #endif /* CONFIG_I2C_MULTI_BUS */
  63. /*-----------------------------------------------------------------------
  64. * Local functions
  65. */
  66. #if !defined(CFG_I2C_INIT_BOARD)
  67. static void send_reset (void);
  68. #endif
  69. static void send_start (void);
  70. static void send_stop (void);
  71. static void send_ack (int);
  72. static int write_byte (uchar byte);
  73. static uchar read_byte (int);
  74. #if !defined(CFG_I2C_INIT_BOARD)
  75. /*-----------------------------------------------------------------------
  76. * Send a reset sequence consisting of 9 clocks with the data signal high
  77. * to clock any confused device back into an idle state. Also send a
  78. * <stop> at the end of the sequence for belts & suspenders.
  79. */
  80. static void send_reset(void)
  81. {
  82. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  83. int j;
  84. I2C_SCL(1);
  85. I2C_SDA(1);
  86. #ifdef I2C_INIT
  87. I2C_INIT;
  88. #endif
  89. I2C_TRISTATE;
  90. for(j = 0; j < 9; j++) {
  91. I2C_SCL(0);
  92. I2C_DELAY;
  93. I2C_DELAY;
  94. I2C_SCL(1);
  95. I2C_DELAY;
  96. I2C_DELAY;
  97. }
  98. send_stop();
  99. I2C_TRISTATE;
  100. }
  101. #endif
  102. /*-----------------------------------------------------------------------
  103. * START: High -> Low on SDA while SCL is High
  104. */
  105. static void send_start(void)
  106. {
  107. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  108. I2C_DELAY;
  109. I2C_SDA(1);
  110. I2C_ACTIVE;
  111. I2C_DELAY;
  112. I2C_SCL(1);
  113. I2C_DELAY;
  114. I2C_SDA(0);
  115. I2C_DELAY;
  116. }
  117. /*-----------------------------------------------------------------------
  118. * STOP: Low -> High on SDA while SCL is High
  119. */
  120. static void send_stop(void)
  121. {
  122. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  123. I2C_SCL(0);
  124. I2C_DELAY;
  125. I2C_SDA(0);
  126. I2C_ACTIVE;
  127. I2C_DELAY;
  128. I2C_SCL(1);
  129. I2C_DELAY;
  130. I2C_SDA(1);
  131. I2C_DELAY;
  132. I2C_TRISTATE;
  133. }
  134. /*-----------------------------------------------------------------------
  135. * ack should be I2C_ACK or I2C_NOACK
  136. */
  137. static void send_ack(int ack)
  138. {
  139. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  140. I2C_SCL(0);
  141. I2C_DELAY;
  142. I2C_ACTIVE;
  143. I2C_SDA(ack);
  144. I2C_DELAY;
  145. I2C_SCL(1);
  146. I2C_DELAY;
  147. I2C_DELAY;
  148. I2C_SCL(0);
  149. I2C_DELAY;
  150. }
  151. /*-----------------------------------------------------------------------
  152. * Send 8 bits and look for an acknowledgement.
  153. */
  154. static int write_byte(uchar data)
  155. {
  156. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  157. int j;
  158. int nack;
  159. I2C_ACTIVE;
  160. for(j = 0; j < 8; j++) {
  161. I2C_SCL(0);
  162. I2C_DELAY;
  163. I2C_SDA(data & 0x80);
  164. I2C_DELAY;
  165. I2C_SCL(1);
  166. I2C_DELAY;
  167. I2C_DELAY;
  168. data <<= 1;
  169. }
  170. /*
  171. * Look for an <ACK>(negative logic) and return it.
  172. */
  173. I2C_SCL(0);
  174. I2C_DELAY;
  175. I2C_SDA(1);
  176. I2C_TRISTATE;
  177. I2C_DELAY;
  178. I2C_SCL(1);
  179. I2C_DELAY;
  180. I2C_DELAY;
  181. nack = I2C_READ;
  182. I2C_SCL(0);
  183. I2C_DELAY;
  184. I2C_ACTIVE;
  185. return(nack); /* not a nack is an ack */
  186. }
  187. #if defined(CONFIG_I2C_MULTI_BUS)
  188. /*
  189. * Functions for multiple I2C bus handling
  190. */
  191. unsigned int i2c_get_bus_num(void)
  192. {
  193. return i2c_bus_num;
  194. }
  195. int i2c_set_bus_num(unsigned int bus)
  196. {
  197. if (bus >= CFG_MAX_I2C_BUS)
  198. return -1;
  199. i2c_bus_num = bus;
  200. return 0;
  201. }
  202. /* TODO: add 100/400k switching */
  203. unsigned int i2c_get_bus_speed(void)
  204. {
  205. return CFG_I2C_SPEED;
  206. }
  207. int i2c_set_bus_speed(unsigned int speed)
  208. {
  209. if (speed != CFG_I2C_SPEED)
  210. return -1;
  211. return 0;
  212. }
  213. #endif
  214. /*-----------------------------------------------------------------------
  215. * if ack == I2C_ACK, ACK the byte so can continue reading, else
  216. * send I2C_NOACK to end the read.
  217. */
  218. static uchar read_byte(int ack)
  219. {
  220. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  221. int data;
  222. int j;
  223. /*
  224. * Read 8 bits, MSB first.
  225. */
  226. I2C_TRISTATE;
  227. I2C_SDA(1);
  228. data = 0;
  229. for(j = 0; j < 8; j++) {
  230. I2C_SCL(0);
  231. I2C_DELAY;
  232. I2C_SCL(1);
  233. I2C_DELAY;
  234. data <<= 1;
  235. data |= I2C_READ;
  236. I2C_DELAY;
  237. }
  238. send_ack(ack);
  239. return(data);
  240. }
  241. /*=====================================================================*/
  242. /* Public Functions */
  243. /*=====================================================================*/
  244. /*-----------------------------------------------------------------------
  245. * Initialization
  246. */
  247. void i2c_init (int speed, int slaveaddr)
  248. {
  249. #if defined(CFG_I2C_INIT_BOARD)
  250. /* call board specific i2c bus reset routine before accessing the */
  251. /* environment, which might be in a chip on that bus. For details */
  252. /* about this problem see doc/I2C_Edge_Conditions. */
  253. i2c_init_board();
  254. #else
  255. /*
  256. * WARNING: Do NOT save speed in a static variable: if the
  257. * I2C routines are called before RAM is initialized (to read
  258. * the DIMM SPD, for instance), RAM won't be usable and your
  259. * system will crash.
  260. */
  261. send_reset ();
  262. #endif
  263. }
  264. /*-----------------------------------------------------------------------
  265. * Probe to see if a chip is present. Also good for checking for the
  266. * completion of EEPROM writes since the chip stops responding until
  267. * the write completes (typically 10mSec).
  268. */
  269. int i2c_probe(uchar addr)
  270. {
  271. int rc;
  272. /*
  273. * perform 1 byte write transaction with just address byte
  274. * (fake write)
  275. */
  276. send_start();
  277. rc = write_byte ((addr << 1) | 0);
  278. send_stop();
  279. return (rc ? 1 : 0);
  280. }
  281. /*-----------------------------------------------------------------------
  282. * Read bytes
  283. */
  284. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  285. {
  286. int shift;
  287. PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
  288. chip, addr, alen, buffer, len);
  289. #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
  290. /*
  291. * EEPROM chips that implement "address overflow" are ones
  292. * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
  293. * address and the extra bits end up in the "chip address"
  294. * bit slots. This makes a 24WC08 (1Kbyte) chip look like
  295. * four 256 byte chips.
  296. *
  297. * Note that we consider the length of the address field to
  298. * still be one byte because the extra address bits are
  299. * hidden in the chip address.
  300. */
  301. chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
  302. PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
  303. chip, addr);
  304. #endif
  305. /*
  306. * Do the addressing portion of a write cycle to set the
  307. * chip's address pointer. If the address length is zero,
  308. * don't do the normal write cycle to set the address pointer,
  309. * there is no address pointer in this chip.
  310. */
  311. send_start();
  312. if(alen > 0) {
  313. if(write_byte(chip << 1)) { /* write cycle */
  314. send_stop();
  315. PRINTD("i2c_read, no chip responded %02X\n", chip);
  316. return(1);
  317. }
  318. shift = (alen-1) * 8;
  319. while(alen-- > 0) {
  320. if(write_byte(addr >> shift)) {
  321. PRINTD("i2c_read, address not <ACK>ed\n");
  322. return(1);
  323. }
  324. shift -= 8;
  325. }
  326. send_stop(); /* reportedly some chips need a full stop */
  327. send_start();
  328. }
  329. /*
  330. * Send the chip address again, this time for a read cycle.
  331. * Then read the data. On the last byte, we do a NACK instead
  332. * of an ACK(len == 0) to terminate the read.
  333. */
  334. write_byte((chip << 1) | 1); /* read cycle */
  335. while(len-- > 0) {
  336. *buffer++ = read_byte(len == 0);
  337. }
  338. send_stop();
  339. return(0);
  340. }
  341. /*-----------------------------------------------------------------------
  342. * Write bytes
  343. */
  344. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  345. {
  346. int shift, failures = 0;
  347. PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
  348. chip, addr, alen, buffer, len);
  349. send_start();
  350. if(write_byte(chip << 1)) { /* write cycle */
  351. send_stop();
  352. PRINTD("i2c_write, no chip responded %02X\n", chip);
  353. return(1);
  354. }
  355. shift = (alen-1) * 8;
  356. while(alen-- > 0) {
  357. if(write_byte(addr >> shift)) {
  358. PRINTD("i2c_write, address not <ACK>ed\n");
  359. return(1);
  360. }
  361. shift -= 8;
  362. }
  363. while(len-- > 0) {
  364. if(write_byte(*buffer++)) {
  365. failures++;
  366. }
  367. }
  368. send_stop();
  369. return(failures);
  370. }
  371. /*-----------------------------------------------------------------------
  372. * Read a register
  373. */
  374. uchar i2c_reg_read(uchar i2c_addr, uchar reg)
  375. {
  376. uchar buf;
  377. i2c_read(i2c_addr, reg, 1, &buf, 1);
  378. return(buf);
  379. }
  380. /*-----------------------------------------------------------------------
  381. * Write a register
  382. */
  383. void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
  384. {
  385. i2c_write(i2c_addr, reg, 1, &val, 1);
  386. }