flash.c 23 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Modified 4/5/2001
  25. * Wait for completion of each sector erase command issued
  26. * 4/5/2001
  27. * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
  28. */
  29. /*
  30. * Modified 3/7/2001
  31. * - adapted for pip405, Denis Peter, MPL AG Switzerland
  32. * TODO:
  33. * clean-up
  34. */
  35. #include <common.h>
  36. #include <ppc4xx.h>
  37. #include <asm/processor.h>
  38. #include "common_util.h"
  39. #if defined(CONFIG_MIP405)
  40. #include "../mip405/mip405.h"
  41. #endif
  42. #if defined(CONFIG_PIP405)
  43. #include "../pip405/pip405.h"
  44. #endif
  45. #include <405gp_pci.h>
  46. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  47. /*-----------------------------------------------------------------------
  48. * Functions
  49. */
  50. static ulong flash_get_size (vu_long *addr, flash_info_t *info);
  51. static int write_word (flash_info_t *info, ulong dest, ulong data);
  52. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
  53. #ifdef CONFIG_PIP405
  54. #define ADDR0 0x5555
  55. #define ADDR1 0x2aaa
  56. #define FLASH_WORD_SIZE unsigned short
  57. #endif
  58. #ifdef CONFIG_MIP405
  59. #define ADDR0 0x5555
  60. #define ADDR1 0x2aaa
  61. #define FLASH_WORD_SIZE unsigned short
  62. #endif
  63. #define FALSE 0
  64. #define TRUE 1
  65. /*-----------------------------------------------------------------------
  66. * Some CS switching routines:
  67. *
  68. * On PIP/MIP405 we have 3 (4) possible boot mode
  69. *
  70. * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
  71. * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
  72. * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
  73. * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
  74. * The flash init is the first board specific routine which is called
  75. * after code relocation (running from SDRAM)
  76. * The first thing we do is to map the Flash CS to the Flash area and
  77. * the MPS CS to the MPS area. Since the flash size is unknown at this
  78. * point, we use the max flash size and the lowest flash address as base.
  79. *
  80. * After flash detection we adjust the size of the CS area accordingly.
  81. * The board_init_r will fill in wrong values in the board init structure,
  82. * but this will be fixed in the misc_init_r routine:
  83. * bd->bi_flashstart=0-flash_info[0].size
  84. * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
  85. * bd->bi_flashoffset=0
  86. *
  87. */
  88. int get_boot_mode(void)
  89. {
  90. unsigned long pbcr;
  91. int res = 0;
  92. pbcr = mfdcr (strap);
  93. if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
  94. /* boot via MPS or MPS mapping */
  95. res = BOOT_MPS;
  96. if(pbcr & PSR_ROM_LOC)
  97. /* boot via PCI.. */
  98. res |= BOOT_PCI;
  99. return res;
  100. }
  101. /* Map the flash high (in boot area)
  102. This code can only be executed from SDRAM (after relocation).
  103. */
  104. void setup_cs_reloc(void)
  105. {
  106. int mode;
  107. /* Since we are relocated, we can set-up the CS finaly
  108. * but first of all, switch off PCI mapping (in case it was a PCI boot) */
  109. out32r(PMM0MA,0L);
  110. icache_enable (); /* we are relocated */
  111. /* get boot mode */
  112. mode=get_boot_mode();
  113. /* we map the flash high in every case */
  114. /* first findout on which cs the flash is */
  115. if(mode & BOOT_MPS) {
  116. /* map flash high on CS1 and MPS on CS0 */
  117. mtdcr (ebccfga, pb0ap);
  118. mtdcr (ebccfgd, MPS_AP);
  119. mtdcr (ebccfga, pb0cr);
  120. mtdcr (ebccfgd, MPS_CR);
  121. /* we use the default values (max values) for the flash
  122. * because its real size is not yet known */
  123. mtdcr (ebccfga, pb1ap);
  124. mtdcr (ebccfgd, FLASH_AP);
  125. mtdcr (ebccfga, pb1cr);
  126. mtdcr (ebccfgd, FLASH_CR_B);
  127. }
  128. else {
  129. /* map flash high on CS0 and MPS on CS1 */
  130. mtdcr (ebccfga, pb1ap);
  131. mtdcr (ebccfgd, MPS_AP);
  132. mtdcr (ebccfga, pb1cr);
  133. mtdcr (ebccfgd, MPS_CR);
  134. /* we use the default values (max values) for the flash
  135. * because its real size is not yet known */
  136. mtdcr (ebccfga, pb0ap);
  137. mtdcr (ebccfgd, FLASH_AP);
  138. mtdcr (ebccfga, pb0cr);
  139. mtdcr (ebccfgd, FLASH_CR_B);
  140. }
  141. }
  142. unsigned long flash_init (void)
  143. {
  144. unsigned long size_b0, size_b1,flashcr, size_reg;
  145. int mode, i;
  146. extern char version_string;
  147. char *p=&version_string;
  148. /* Since we are relocated, we can set-up the CS finally */
  149. setup_cs_reloc();
  150. /* get and display boot mode */
  151. mode=get_boot_mode();
  152. if(mode & BOOT_PCI)
  153. printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
  154. "MPS" : "Flash");
  155. else
  156. printf("(%s Boot) ",(mode & BOOT_MPS) ?
  157. "MPS" : "Flash");
  158. /* Init: no FLASHes known */
  159. for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
  160. flash_info[i].flash_id = FLASH_UNKNOWN;
  161. }
  162. /* Static FLASH Bank configuration here - FIXME XXX */
  163. size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
  164. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  165. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
  166. size_b0, size_b0<<20);
  167. }
  168. /* protect the bootloader */
  169. /* Monitor protection ON by default */
  170. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  171. flash_protect(FLAG_PROTECT_SET,
  172. CFG_MONITOR_BASE,
  173. CFG_MONITOR_BASE+monitor_flash_len-1,
  174. &flash_info[0]);
  175. #endif
  176. /* protect reset vector */
  177. flash_info[0].protect[flash_info[0].sector_count-1] = 1;
  178. size_b1 = 0 ;
  179. flash_info[0].size = size_b0;
  180. /* set up flash cs according to the size */
  181. size_reg=(flash_info[0].size >>20);
  182. switch (size_reg) {
  183. case 0:
  184. case 1: i=0; break; /* <= 1MB */
  185. case 2: i=1; break; /* = 2MB */
  186. case 4: i=2; break; /* = 4MB */
  187. case 8: i=3; break; /* = 8MB */
  188. case 16: i=4; break; /* = 16MB */
  189. case 32: i=5; break; /* = 32MB */
  190. case 64: i=6; break; /* = 64MB */
  191. case 128: i=7; break; /*= 128MB */
  192. default:
  193. printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
  194. while(1);
  195. }
  196. if(mode & BOOT_MPS) {
  197. /* flash is on CS1 */
  198. mtdcr(ebccfga, pb1cr);
  199. flashcr = mfdcr (ebccfgd);
  200. /* we map the flash high in every case */
  201. flashcr&=0x0001FFFF; /* mask out address bits */
  202. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  203. flashcr|= (i << 17); /* size addr */
  204. mtdcr(ebccfga, pb1cr);
  205. mtdcr(ebccfgd, flashcr);
  206. }
  207. else {
  208. /* flash is on CS0 */
  209. mtdcr(ebccfga, pb0cr);
  210. flashcr = mfdcr (ebccfgd);
  211. /* we map the flash high in every case */
  212. flashcr&=0x0001FFFF; /* mask out address bits */
  213. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  214. flashcr|= (i << 17); /* size addr */
  215. mtdcr(ebccfga, pb0cr);
  216. mtdcr(ebccfgd, flashcr);
  217. }
  218. #if 0
  219. /* enable this if you want to test if
  220. the relocation has be done ok.
  221. This will disable both Chipselects */
  222. mtdcr (ebccfga, pb0cr);
  223. mtdcr (ebccfgd, 0L);
  224. mtdcr (ebccfga, pb1cr);
  225. mtdcr (ebccfgd, 0L);
  226. printf("CS0 & CS1 switched off for test\n");
  227. #endif
  228. /* patch version_string */
  229. for(i=0;i<0x100;i++) {
  230. if(*p=='\n') {
  231. *p=0;
  232. break;
  233. }
  234. p++;
  235. }
  236. return (size_b0);
  237. }
  238. /*-----------------------------------------------------------------------
  239. */
  240. void flash_print_info (flash_info_t *info)
  241. {
  242. int i;
  243. int k;
  244. int size;
  245. int erased;
  246. volatile unsigned long *flash;
  247. if (info->flash_id == FLASH_UNKNOWN) {
  248. printf ("missing or unknown FLASH type\n");
  249. return;
  250. }
  251. switch (info->flash_id & FLASH_VENDMASK) {
  252. case FLASH_MAN_AMD: printf ("AMD "); break;
  253. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  254. case FLASH_MAN_SST: printf ("SST "); break;
  255. case FLASH_MAN_INTEL: printf ("Intel "); break;
  256. default: printf ("Unknown Vendor "); break;
  257. }
  258. switch (info->flash_id & FLASH_TYPEMASK) {
  259. case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
  260. break;
  261. case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
  262. break;
  263. case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
  264. break;
  265. case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
  266. break;
  267. case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
  268. break;
  269. case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
  270. break;
  271. case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
  272. break;
  273. case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
  274. break;
  275. case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
  276. break;
  277. case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
  278. break;
  279. case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
  280. break;
  281. case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
  282. break;
  283. case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
  284. break;
  285. default: printf ("Unknown Chip Type\n");
  286. break;
  287. }
  288. printf (" Size: %ld KB in %d Sectors\n",
  289. info->size >> 10, info->sector_count);
  290. printf (" Sector Start Addresses:");
  291. for (i=0; i<info->sector_count; ++i) {
  292. /*
  293. * Check if whole sector is erased
  294. */
  295. if (i != (info->sector_count-1))
  296. size = info->start[i+1] - info->start[i];
  297. else
  298. size = info->start[0] + info->size - info->start[i];
  299. erased = 1;
  300. flash = (volatile unsigned long *)info->start[i];
  301. size = size >> 2; /* divide by 4 for longword access */
  302. for (k=0; k<size; k++) {
  303. if (*flash++ != 0xffffffff) {
  304. erased = 0;
  305. break;
  306. }
  307. }
  308. if ((i % 5) == 0)
  309. printf ("\n ");
  310. printf (" %08lX%s%s",
  311. info->start[i],
  312. erased ? " E" : " ",
  313. info->protect[i] ? "RO " : " ");
  314. }
  315. printf ("\n");
  316. }
  317. /*-----------------------------------------------------------------------
  318. */
  319. /*-----------------------------------------------------------------------
  320. */
  321. /*
  322. * The following code cannot be run from FLASH!
  323. */
  324. static ulong flash_get_size (vu_long *addr, flash_info_t *info)
  325. {
  326. short i;
  327. FLASH_WORD_SIZE value;
  328. ulong base;
  329. volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
  330. /* Write auto select command: read Manufacturer ID */
  331. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  332. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  333. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
  334. value = addr2[0];
  335. /* printf("flash_get_size value: %x\n",value); */
  336. switch (value) {
  337. case (FLASH_WORD_SIZE)AMD_MANUFACT:
  338. info->flash_id = FLASH_MAN_AMD;
  339. break;
  340. case (FLASH_WORD_SIZE)FUJ_MANUFACT:
  341. info->flash_id = FLASH_MAN_FUJ;
  342. break;
  343. case (FLASH_WORD_SIZE)INTEL_MANUFACT:
  344. info->flash_id = FLASH_MAN_INTEL;
  345. break;
  346. case (FLASH_WORD_SIZE)SST_MANUFACT:
  347. info->flash_id = FLASH_MAN_SST;
  348. break;
  349. default:
  350. info->flash_id = FLASH_UNKNOWN;
  351. info->sector_count = 0;
  352. info->size = 0;
  353. return (0); /* no or unknown flash */
  354. }
  355. value = addr2[1]; /* device ID */
  356. /* printf("Device value %x\n",value); */
  357. switch (value) {
  358. case (FLASH_WORD_SIZE)AMD_ID_F040B:
  359. info->flash_id += FLASH_AM040;
  360. info->sector_count = 8;
  361. info->size = 0x0080000; /* => 512 ko */
  362. break;
  363. case (FLASH_WORD_SIZE)AMD_ID_LV400T:
  364. info->flash_id += FLASH_AM400T;
  365. info->sector_count = 11;
  366. info->size = 0x00080000;
  367. break; /* => 0.5 MB */
  368. case (FLASH_WORD_SIZE)AMD_ID_LV400B:
  369. info->flash_id += FLASH_AM400B;
  370. info->sector_count = 11;
  371. info->size = 0x00080000;
  372. break; /* => 0.5 MB */
  373. case (FLASH_WORD_SIZE)AMD_ID_LV800T:
  374. info->flash_id += FLASH_AM800T;
  375. info->sector_count = 19;
  376. info->size = 0x00100000;
  377. break; /* => 1 MB */
  378. case (FLASH_WORD_SIZE)AMD_ID_LV800B:
  379. info->flash_id += FLASH_AM800B;
  380. info->sector_count = 19;
  381. info->size = 0x00100000;
  382. break; /* => 1 MB */
  383. case (FLASH_WORD_SIZE)AMD_ID_LV160T:
  384. info->flash_id += FLASH_AM160T;
  385. info->sector_count = 35;
  386. info->size = 0x00200000;
  387. break; /* => 2 MB */
  388. case (FLASH_WORD_SIZE)AMD_ID_LV160B:
  389. info->flash_id += FLASH_AM160B;
  390. info->sector_count = 35;
  391. info->size = 0x00200000;
  392. break; /* => 2 MB */
  393. case (FLASH_WORD_SIZE)AMD_ID_LV320T:
  394. info->flash_id += FLASH_AM320T;
  395. info->sector_count = 67;
  396. info->size = 0x00400000;
  397. break; /* => 4 MB */
  398. case (FLASH_WORD_SIZE)AMD_ID_LV640U:
  399. info->flash_id += FLASH_AM640U;
  400. info->sector_count = 128;
  401. info->size = 0x00800000;
  402. break; /* => 8 MB */
  403. #if 0 /* enable when device IDs are available */
  404. case (FLASH_WORD_SIZE)AMD_ID_LV320B:
  405. info->flash_id += FLASH_AM320B;
  406. info->sector_count = 67;
  407. info->size = 0x00400000;
  408. break; /* => 4 MB */
  409. #endif
  410. case (FLASH_WORD_SIZE)SST_ID_xF800A:
  411. info->flash_id += FLASH_SST800A;
  412. info->sector_count = 16;
  413. info->size = 0x00100000;
  414. break; /* => 1 MB */
  415. case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
  416. info->flash_id += FLASH_INTEL320T;
  417. info->sector_count = 71;
  418. info->size = 0x00400000;
  419. break; /* => 4 MB */
  420. case (FLASH_WORD_SIZE)SST_ID_xF160A:
  421. info->flash_id += FLASH_SST160A;
  422. info->sector_count = 32;
  423. info->size = 0x00200000;
  424. break; /* => 2 MB */
  425. default:
  426. info->flash_id = FLASH_UNKNOWN;
  427. return (0); /* => no or unknown flash */
  428. }
  429. /* base address calculation */
  430. base=0-info->size;
  431. /* set up sector start address table */
  432. if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
  433. (info->flash_id == FLASH_AM040) ||
  434. (info->flash_id == FLASH_AM640U)){
  435. for (i = 0; i < info->sector_count; i++)
  436. info->start[i] = base + (i * 0x00010000);
  437. }
  438. else {
  439. if (info->flash_id & FLASH_BTYPE) {
  440. /* set sector offsets for bottom boot block type */
  441. info->start[0] = base + 0x00000000;
  442. info->start[1] = base + 0x00004000;
  443. info->start[2] = base + 0x00006000;
  444. info->start[3] = base + 0x00008000;
  445. for (i = 4; i < info->sector_count; i++)
  446. info->start[i] = base + (i * 0x00010000) - 0x00030000;
  447. }
  448. else {
  449. /* set sector offsets for top boot block type */
  450. i = info->sector_count - 1;
  451. if(info->sector_count==71) {
  452. info->start[i--] = base + info->size - 0x00002000;
  453. info->start[i--] = base + info->size - 0x00004000;
  454. info->start[i--] = base + info->size - 0x00006000;
  455. info->start[i--] = base + info->size - 0x00008000;
  456. info->start[i--] = base + info->size - 0x0000A000;
  457. info->start[i--] = base + info->size - 0x0000C000;
  458. info->start[i--] = base + info->size - 0x0000E000;
  459. for (; i >= 0; i--)
  460. info->start[i] = base + i * 0x000010000;
  461. }
  462. else {
  463. info->start[i--] = base + info->size - 0x00004000;
  464. info->start[i--] = base + info->size - 0x00006000;
  465. info->start[i--] = base + info->size - 0x00008000;
  466. for (; i >= 0; i--)
  467. info->start[i] = base + i * 0x00010000;
  468. }
  469. }
  470. }
  471. /* check for protected sectors */
  472. for (i = 0; i < info->sector_count; i++) {
  473. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  474. /* D0 = 1 if protected */
  475. addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
  476. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  477. info->protect[i] = 0;
  478. else
  479. info->protect[i] = addr2[2] & 1;
  480. }
  481. /*
  482. * Prevent writes to uninitialized FLASH.
  483. */
  484. if (info->flash_id != FLASH_UNKNOWN) {
  485. addr2 = (FLASH_WORD_SIZE *)info->start[0];
  486. *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  487. }
  488. return (info->size);
  489. }
  490. int wait_for_DQ7(flash_info_t *info, int sect)
  491. {
  492. ulong start, now, last;
  493. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  494. start = get_timer (0);
  495. last = start;
  496. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  497. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  498. printf ("Timeout\n");
  499. return -1;
  500. }
  501. /* show that we're waiting */
  502. if ((now - last) > 1000) { /* every second */
  503. putc ('.');
  504. last = now;
  505. }
  506. }
  507. return 0;
  508. }
  509. int intel_wait_for_DQ7(flash_info_t *info, int sect)
  510. {
  511. ulong start, now, last;
  512. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  513. start = get_timer (0);
  514. last = start;
  515. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  516. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  517. printf ("Timeout\n");
  518. return -1;
  519. }
  520. /* show that we're waiting */
  521. if ((now - last) > 1000) { /* every second */
  522. putc ('.');
  523. last = now;
  524. }
  525. }
  526. addr[0]=(FLASH_WORD_SIZE)0x00500050;
  527. return 0;
  528. }
  529. /*-----------------------------------------------------------------------
  530. */
  531. int flash_erase (flash_info_t *info, int s_first, int s_last)
  532. {
  533. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
  534. volatile FLASH_WORD_SIZE *addr2;
  535. int flag, prot, sect, l_sect;
  536. int i;
  537. if ((s_first < 0) || (s_first > s_last)) {
  538. if (info->flash_id == FLASH_UNKNOWN) {
  539. printf ("- missing\n");
  540. } else {
  541. printf ("- no sectors to erase\n");
  542. }
  543. return 1;
  544. }
  545. if (info->flash_id == FLASH_UNKNOWN) {
  546. printf ("Can't erase unknown flash type - aborted\n");
  547. return 1;
  548. }
  549. prot = 0;
  550. for (sect=s_first; sect<=s_last; ++sect) {
  551. if (info->protect[sect]) {
  552. prot++;
  553. }
  554. }
  555. if (prot) {
  556. printf ("- Warning: %d protected sectors will not be erased!\n",
  557. prot);
  558. } else {
  559. printf ("\n");
  560. }
  561. l_sect = -1;
  562. /* Disable interrupts which might cause a timeout here */
  563. flag = disable_interrupts();
  564. /* Start erase on unprotected sectors */
  565. for (sect = s_first; sect<=s_last; sect++) {
  566. if (info->protect[sect] == 0) { /* not protected */
  567. addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
  568. /* printf("Erasing sector %p\n", addr2); */ /* CLH */
  569. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
  570. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  571. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  572. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  573. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  574. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  575. addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
  576. for (i=0; i<50; i++)
  577. udelay(1000); /* wait 1 ms */
  578. wait_for_DQ7(info, sect);
  579. }
  580. else {
  581. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  582. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
  583. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  584. intel_wait_for_DQ7(info, sect);
  585. addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
  586. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  587. intel_wait_for_DQ7(info, sect);
  588. }
  589. else {
  590. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  591. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  592. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  593. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  594. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  595. addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
  596. wait_for_DQ7(info, sect);
  597. }
  598. }
  599. l_sect = sect;
  600. /*
  601. * Wait for each sector to complete, it's more
  602. * reliable. According to AMD Spec, you must
  603. * issue all erase commands within a specified
  604. * timeout. This has been seen to fail, especially
  605. * if printf()s are included (for debug)!!
  606. */
  607. /* wait_for_DQ7(info, sect); */
  608. }
  609. }
  610. /* re-enable interrupts if necessary */
  611. if (flag)
  612. enable_interrupts();
  613. /* wait at least 80us - let's wait 1 ms */
  614. udelay (1000);
  615. #if 0
  616. /*
  617. * We wait for the last triggered sector
  618. */
  619. if (l_sect < 0)
  620. goto DONE;
  621. wait_for_DQ7(info, l_sect);
  622. DONE:
  623. #endif
  624. /* reset to read mode */
  625. addr = (FLASH_WORD_SIZE *)info->start[0];
  626. addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  627. printf (" done\n");
  628. return 0;
  629. }
  630. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
  631. {
  632. int i;
  633. volatile FLASH_WORD_SIZE *addr2;
  634. long c;
  635. c= (long)cnt;
  636. for(i=info->sector_count-1;i>0;i--)
  637. {
  638. if(addr>=info->start[i])
  639. break;
  640. }
  641. do {
  642. addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
  643. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
  644. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
  645. intel_wait_for_DQ7(info, i);
  646. i++;
  647. c-=(info->start[i]-info->start[i-1]);
  648. }while(c>0);
  649. }
  650. /*-----------------------------------------------------------------------
  651. * Copy memory to flash, returns:
  652. * 0 - OK
  653. * 1 - write timeout
  654. * 2 - Flash not erased
  655. */
  656. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  657. {
  658. ulong cp, wp, data;
  659. int i, l, rc;
  660. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  661. unlock_intel_sectors(info,addr,cnt);
  662. }
  663. wp = (addr & ~3); /* get lower word aligned address */
  664. /*
  665. * handle unaligned start bytes
  666. */
  667. if ((l = addr - wp) != 0) {
  668. data = 0;
  669. for (i=0, cp=wp; i<l; ++i, ++cp) {
  670. data = (data << 8) | (*(uchar *)cp);
  671. }
  672. for (; i<4 && cnt>0; ++i) {
  673. data = (data << 8) | *src++;
  674. --cnt;
  675. ++cp;
  676. }
  677. for (; cnt==0 && i<4; ++i, ++cp) {
  678. data = (data << 8) | (*(uchar *)cp);
  679. }
  680. if ((rc = write_word(info, wp, data)) != 0) {
  681. return (rc);
  682. }
  683. wp += 4;
  684. }
  685. /*
  686. * handle word aligned part
  687. */
  688. while (cnt >= 4) {
  689. data = 0;
  690. for (i=0; i<4; ++i) {
  691. data = (data << 8) | *src++;
  692. }
  693. if ((rc = write_word(info, wp, data)) != 0) {
  694. return (rc);
  695. }
  696. wp += 4;
  697. if((wp % 0x10000)==0)
  698. printf("."); /* show Progress */
  699. cnt -= 4;
  700. }
  701. if (cnt == 0) {
  702. return (0);
  703. }
  704. /*
  705. * handle unaligned tail bytes
  706. */
  707. data = 0;
  708. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  709. data = (data << 8) | *src++;
  710. --cnt;
  711. }
  712. for (; i<4; ++i, ++cp) {
  713. data = (data << 8) | (*(uchar *)cp);
  714. }
  715. rc=write_word(info, wp, data);
  716. return rc;
  717. }
  718. /*-----------------------------------------------------------------------
  719. * Write a word to Flash, returns:
  720. * 0 - OK
  721. * 1 - write timeout
  722. * 2 - Flash not erased
  723. */
  724. static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
  725. static int write_word (flash_info_t *info, ulong dest, ulong data)
  726. {
  727. volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
  728. volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
  729. volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
  730. ulong start;
  731. int flag;
  732. int i;
  733. /* Check if Flash is (sufficiently) erased */
  734. if ((*((volatile FLASH_WORD_SIZE *)dest) &
  735. (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
  736. return (2);
  737. }
  738. /* Disable interrupts which might cause a timeout here */
  739. flag = disable_interrupts();
  740. for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
  741. {
  742. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  743. /* intel style writting */
  744. dest2[i] = (FLASH_WORD_SIZE)0x00500050;
  745. dest2[i] = (FLASH_WORD_SIZE)0x00400040;
  746. *read_val++ = data2[i];
  747. dest2[i] = data2[i];
  748. if (flag)
  749. enable_interrupts();
  750. /* data polling for D7 */
  751. start = get_timer (0);
  752. udelay(10);
  753. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
  754. {
  755. if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
  756. return (1);
  757. }
  758. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  759. udelay(10);
  760. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  761. if(dest2[i]!=data2[i])
  762. printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
  763. }
  764. else {
  765. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  766. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  767. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
  768. dest2[i] = data2[i];
  769. /* re-enable interrupts if necessary */
  770. if (flag)
  771. enable_interrupts();
  772. /* data polling for D7 */
  773. start = get_timer (0);
  774. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
  775. (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
  776. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  777. return (1);
  778. }
  779. }
  780. }
  781. }
  782. return (0);
  783. }
  784. /*-----------------------------------------------------------------------
  785. */