utx8245.c 3.6 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  4. *
  5. * (C) Copyright 2002
  6. * Gregory E. Allen, gallen@arlut.utexas.edu
  7. * Matthew E. Karger, karger@arlut.utexas.edu
  8. * Applied Research Laboratories, The University of Texas at Austin
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <mpc824x.h>
  30. #include <asm/processor.h>
  31. #include <asm/io.h>
  32. #include <asm/mmu.h>
  33. #include <pci.h>
  34. #define SAVE_SZ 32
  35. int checkboard(void)
  36. {
  37. ulong busfreq = get_bus_freq(0);
  38. char buf[32];
  39. printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf, busfreq));
  40. return 0;
  41. }
  42. long int initdram(int board_type)
  43. {
  44. long size;
  45. long new_bank0_end;
  46. long new_bank1_end;
  47. long mear1;
  48. long emear1;
  49. size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
  50. new_bank0_end = size/2 - 1;
  51. new_bank1_end = size - 1;
  52. mear1 = mpc824x_mpc107_getreg(MEAR1);
  53. emear1 = mpc824x_mpc107_getreg(EMEAR1);
  54. mear1 = (mear1 & 0xFFFF0000) |
  55. ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
  56. ((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
  57. emear1 = (emear1 & 0xFFFF0000) |
  58. ((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
  59. ((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
  60. mpc824x_mpc107_setreg(MEAR1, mear1);
  61. mpc824x_mpc107_setreg(EMEAR1, emear1);
  62. return (size);
  63. }
  64. /*
  65. * Initialize PCI Devices, report devices found.
  66. */
  67. static struct pci_config_table pci_utx8245_config_table[] = {
  68. #ifndef CONFIG_PCI_PNP
  69. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID,
  70. pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
  71. PCI_ENET0_MEMADDR,
  72. PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
  73. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID,
  74. pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR,
  75. PCI_FIREWIRE_MEMADDR,
  76. PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
  77. #endif /*CONFIG_PCI_PNP*/
  78. { }
  79. };
  80. static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  81. {
  82. if (PCI_DEV(dev) == 11)
  83. /* assign serial interrupt line 9 (int25) to FireWire */
  84. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 25);
  85. else if (PCI_DEV(dev) == 12)
  86. /* assign serial interrupt line 8 (int24) to Ethernet */
  87. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24);
  88. else if (PCI_DEV(dev) == 14)
  89. /* assign serial interrupt line 0 (int16) to PMC slot 0 */
  90. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16);
  91. else if (PCI_DEV(dev) == 15)
  92. /* assign serial interrupt line 1 (int17) to PMC slot 1 */
  93. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17);
  94. }
  95. static struct pci_controller utx8245_hose = {
  96. #ifndef CONFIG_PCI_PNP
  97. config_table: pci_utx8245_config_table,
  98. fixup_irq: pci_utx8245_fixup_irq,
  99. write_byte: pci_hose_write_config_byte
  100. #endif /*CONFIG_PCI_PNP*/
  101. };
  102. void pci_init_board (void)
  103. {
  104. pci_mpc824x_init(&utx8245_hose);
  105. icache_enable();
  106. }