fsl_diu_fb.c 16 KB

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  1. /*
  2. * Copyright 2007 Freescale Semiconductor, Inc.
  3. * York Sun <yorksun@freescale.com>
  4. *
  5. * FSL DIU Framebuffer driver
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <i2c.h>
  27. #include <malloc.h>
  28. #ifdef CONFIG_FSL_DIU_FB
  29. #include "fsl_diu_fb.h"
  30. #ifdef DEBUG
  31. #define DPRINTF(fmt, args...) printf("%s: " fmt,__FUNCTION__,## args)
  32. #else
  33. #define DPRINTF(fmt, args...)
  34. #endif
  35. struct fb_videomode {
  36. const char *name; /* optional */
  37. unsigned int refresh; /* optional */
  38. unsigned int xres;
  39. unsigned int yres;
  40. unsigned int pixclock;
  41. unsigned int left_margin;
  42. unsigned int right_margin;
  43. unsigned int upper_margin;
  44. unsigned int lower_margin;
  45. unsigned int hsync_len;
  46. unsigned int vsync_len;
  47. unsigned int sync;
  48. unsigned int vmode;
  49. unsigned int flag;
  50. };
  51. #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
  52. #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
  53. #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
  54. /*
  55. * These parameters give default parameters
  56. * for video output 1024x768,
  57. * FIXME - change timing to proper amounts
  58. * hsync 31.5kHz, vsync 60Hz
  59. */
  60. static struct fb_videomode fsl_diu_mode_1024 = {
  61. .refresh = 60,
  62. .xres = 1024,
  63. .yres = 768,
  64. .pixclock = 15385,
  65. .left_margin = 160,
  66. .right_margin = 24,
  67. .upper_margin = 29,
  68. .lower_margin = 3,
  69. .hsync_len = 136,
  70. .vsync_len = 6,
  71. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  72. .vmode = FB_VMODE_NONINTERLACED
  73. };
  74. static struct fb_videomode fsl_diu_mode_1280 = {
  75. .name = "1280x1024-60",
  76. .refresh = 60,
  77. .xres = 1280,
  78. .yres = 1024,
  79. .pixclock = 9375,
  80. .left_margin = 38,
  81. .right_margin = 128,
  82. .upper_margin = 2,
  83. .lower_margin = 7,
  84. .hsync_len = 216,
  85. .vsync_len = 37,
  86. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  87. .vmode = FB_VMODE_NONINTERLACED
  88. };
  89. /*
  90. * These are the fields of area descriptor(in DDR memory) for every plane
  91. */
  92. struct diu_ad {
  93. /* Word 0(32-bit) in DDR memory */
  94. unsigned int pix_fmt; /* hard coding pixel format */
  95. /* Word 1(32-bit) in DDR memory */
  96. unsigned int addr;
  97. /* Word 2(32-bit) in DDR memory */
  98. unsigned int src_size_g_alpha;
  99. /* Word 3(32-bit) in DDR memory */
  100. unsigned int aoi_size;
  101. /* Word 4(32-bit) in DDR memory */
  102. unsigned int offset_xyi;
  103. /* Word 5(32-bit) in DDR memory */
  104. unsigned int offset_xyd;
  105. /* Word 6(32-bit) in DDR memory */
  106. unsigned int ckmax_r:8;
  107. unsigned int ckmax_g:8;
  108. unsigned int ckmax_b:8;
  109. unsigned int res9:8;
  110. /* Word 7(32-bit) in DDR memory */
  111. unsigned int ckmin_r:8;
  112. unsigned int ckmin_g:8;
  113. unsigned int ckmin_b:8;
  114. unsigned int res10:8;
  115. /* Word 8(32-bit) in DDR memory */
  116. unsigned int next_ad;
  117. /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
  118. unsigned int res1;
  119. unsigned int res2;
  120. unsigned int res3;
  121. }__attribute__ ((packed));
  122. /*
  123. * DIU register map
  124. */
  125. struct diu {
  126. unsigned int desc[3];
  127. unsigned int gamma;
  128. unsigned int pallete;
  129. unsigned int cursor;
  130. unsigned int curs_pos;
  131. unsigned int diu_mode;
  132. unsigned int bgnd;
  133. unsigned int bgnd_wb;
  134. unsigned int disp_size;
  135. unsigned int wb_size;
  136. unsigned int wb_mem_addr;
  137. unsigned int hsyn_para;
  138. unsigned int vsyn_para;
  139. unsigned int syn_pol;
  140. unsigned int thresholds;
  141. unsigned int int_status;
  142. unsigned int int_mask;
  143. unsigned int colorbar[8];
  144. unsigned int filling;
  145. unsigned int plut;
  146. } __attribute__ ((packed));
  147. struct diu_hw {
  148. struct diu *diu_reg;
  149. volatile unsigned int mode; /* DIU operation mode */
  150. };
  151. struct diu_addr {
  152. unsigned char * paddr; /* Virtual address */
  153. unsigned int offset;
  154. };
  155. #define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of Display Interface Unit */
  156. /*
  157. * Modes of operation of DIU
  158. */
  159. #define MFB_MODE0 0 /* DIU off */
  160. #define MFB_MODE1 1 /* All three planes output to display */
  161. #define MFB_MODE2 2 /* Plane 1 to display,
  162. * planes 2+3 written back to memory */
  163. #define MFB_MODE3 3 /* All three planes written back to memory */
  164. #define MFB_MODE4 4 /* Color bar generation */
  165. #define MAX_CURS 32
  166. static struct fb_info fsl_fb_info;
  167. static struct diu_addr gamma, cursor;
  168. static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
  169. static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
  170. static unsigned char *dummy_fb;
  171. static struct diu_hw dr = {
  172. .mode = MFB_MODE1,
  173. };
  174. int fb_enabled = 0;
  175. int fb_initialized = 0;
  176. const int default_xres = 1280;
  177. const int default_pixel_format = 0x88882317;
  178. static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
  179. static void enable_lcdc(void);
  180. static void disable_lcdc(void);
  181. static int fsl_diu_enable_panel(struct fb_info *info);
  182. static int fsl_diu_disable_panel(struct fb_info *info);
  183. static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
  184. static u32 get_busfreq(void);
  185. int fsl_diu_init(int xres,
  186. unsigned int pixel_format,
  187. int gamma_fix,
  188. unsigned char *splash_bmp)
  189. {
  190. struct fb_videomode *fsl_diu_mode_db;
  191. struct diu_ad *ad = &fsl_diu_fb_ad;
  192. struct diu *hw;
  193. struct fb_info *info = &fsl_fb_info;
  194. struct fb_var_screeninfo *var = &info->var;
  195. volatile immap_t *immap = (immap_t *)CFG_IMMR;
  196. volatile ccsr_gur_t *gur = &immap->im_gur;
  197. volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
  198. unsigned char *gamma_table_base;
  199. unsigned int i, j;
  200. unsigned long speed_ccb, temp, pixval;
  201. DPRINTF("Enter fsl_diu_init\n");
  202. dr.diu_reg = (struct diu *) (CFG_IMMR + FSL_DIU_BASE_OFFSET);
  203. hw = (struct diu *) dr.diu_reg;
  204. disable_lcdc();
  205. if (xres == 1280) {
  206. fsl_diu_mode_db = &fsl_diu_mode_1280;
  207. } else {
  208. fsl_diu_mode_db = &fsl_diu_mode_1024;
  209. }
  210. if (0 == fb_initialized) {
  211. allocate_buf(&gamma, 768, 32);
  212. DPRINTF("gamma is allocated @ 0x%x\n",
  213. (unsigned int)gamma.paddr);
  214. allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
  215. DPRINTF("curosr is allocated @ 0x%x\n",
  216. (unsigned int)cursor.paddr);
  217. /* create a dummy fb and dummy ad */
  218. dummy_fb = malloc(64);
  219. if (NULL == dummy_fb) {
  220. printf("Cannot allocate dummy fb\n");
  221. return -1;
  222. }
  223. dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
  224. dummy_ad.pix_fmt = 0x88882317;
  225. dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
  226. dummy_ad.aoi_size = 0x02000400;
  227. dummy_ad.offset_xyi = 0;
  228. dummy_ad.offset_xyd = 0;
  229. dummy_ad.next_ad = 0;
  230. /* Memory allocation for framebuffer */
  231. if (map_video_memory(info, 32)) {
  232. printf("Unable to allocate fb memory 1\n");
  233. return -1;
  234. }
  235. } else {
  236. memset(info->screen_base, 0, info->smem_len);
  237. }
  238. dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
  239. dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
  240. dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
  241. DPRINTF("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
  242. DPRINTF("dummy desc[0] = 0x%x\n", hw->desc[0]);
  243. /* read mode info */
  244. var->xres = fsl_diu_mode_db->xres;
  245. var->yres = fsl_diu_mode_db->yres;
  246. var->bits_per_pixel = 32;
  247. var->pixclock = fsl_diu_mode_db->pixclock;
  248. var->left_margin = fsl_diu_mode_db->left_margin;
  249. var->right_margin = fsl_diu_mode_db->right_margin;
  250. var->upper_margin = fsl_diu_mode_db->upper_margin;
  251. var->lower_margin = fsl_diu_mode_db->lower_margin;
  252. var->hsync_len = fsl_diu_mode_db->hsync_len;
  253. var->vsync_len = fsl_diu_mode_db->vsync_len;
  254. var->sync = fsl_diu_mode_db->sync;
  255. var->vmode = fsl_diu_mode_db->vmode;
  256. info->line_length = var->xres * var->bits_per_pixel / 8;
  257. info->logo_size = 0;
  258. info->logo_height = 0;
  259. ad->pix_fmt = pixel_format;
  260. ad->addr = cpu_to_le32((unsigned int)info->screen_base);
  261. ad->src_size_g_alpha
  262. = cpu_to_le32((var->yres << 12) | var->xres);
  263. /* fix me. AOI should not be greater than display size */
  264. ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
  265. ad->offset_xyi = 0;
  266. ad->offset_xyd = 0;
  267. /* Disable chroma keying function */
  268. ad->ckmax_r = 0;
  269. ad->ckmax_g = 0;
  270. ad->ckmax_b = 0;
  271. ad->ckmin_r = 255;
  272. ad->ckmin_g = 255;
  273. ad->ckmin_b = 255;
  274. gamma_table_base = gamma.paddr;
  275. DPRINTF("gamma_table_base is allocated @ 0x%x\n",
  276. (unsigned int)gamma_table_base);
  277. /* Prep for DIU init - gamma table */
  278. for (i = 0; i <= 2; i++)
  279. for (j = 0; j <= 255; j++)
  280. *gamma_table_base++ = j;
  281. if (gamma_fix == 1) { /* fix the gamma */
  282. DPRINTF("Fix gamma table\n");
  283. gamma_table_base = gamma.paddr;
  284. for (i = 0; i < 256*3; i++) {
  285. gamma_table_base[i] = (gamma_table_base[i] << 2)
  286. | ((gamma_table_base[i] >> 6) & 0x03);
  287. }
  288. }
  289. DPRINTF("update-lcdc: HW - %p\n Disabling DIU\n", hw);
  290. /* Program DIU registers */
  291. hw->gamma = (unsigned int) gamma.paddr;
  292. hw->cursor= (unsigned int) cursor.paddr;
  293. hw->bgnd = 0x007F7F7F; /* BGND */
  294. hw->bgnd_wb = 0; /* BGND_WB */
  295. hw->disp_size = var->yres << 16 | var->xres; /* DISP SIZE */
  296. hw->wb_size = 0; /* WB SIZE */
  297. hw->wb_mem_addr = 0; /* WB MEM ADDR */
  298. hw->hsyn_para = var->left_margin << 22 | /* BP_H */
  299. var->hsync_len << 11 | /* PW_H */
  300. var->right_margin; /* FP_H */
  301. hw->vsyn_para = var->upper_margin << 22 | /* BP_V */
  302. var->vsync_len << 11 | /* PW_V */
  303. var->lower_margin; /* FP_V */
  304. /* Pixel Clock configuration */
  305. DPRINTF("DIU: Bus Frequency = %d\n", get_busfreq());
  306. speed_ccb = get_busfreq();
  307. DPRINTF("DIU pixclock in ps - %d\n", var->pixclock);
  308. temp = 1;
  309. temp *= 1000000000;
  310. temp /= var->pixclock;
  311. temp *= 1000;
  312. pixval = speed_ccb / temp;
  313. DPRINTF("DIU pixval = %lu\n", pixval);
  314. hw->syn_pol = 0; /* SYNC SIGNALS POLARITY */
  315. hw->thresholds = 0x00037800; /* The Thresholds */
  316. hw->int_status = 0; /* INTERRUPT STATUS */
  317. hw->int_mask = 0; /* INT MASK */
  318. hw->plut = 0x01F5F666;
  319. /* Modify PXCLK in GUTS CLKDVDR */
  320. DPRINTF("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
  321. temp = *guts_clkdvdr & 0x2000FFFF;
  322. *guts_clkdvdr = temp; /* turn off clock */
  323. *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
  324. DPRINTF("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
  325. fb_initialized = 1;
  326. if (splash_bmp) {
  327. info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
  328. info->logo_size = info->logo_height * info->line_length;
  329. DPRINTF("logo height %d, logo_size 0x%x\n",
  330. info->logo_height,info->logo_size);
  331. }
  332. /* Enable the DIU */
  333. fsl_diu_enable_panel(info);
  334. enable_lcdc();
  335. return 0;
  336. }
  337. char *fsl_fb_open(struct fb_info **info)
  338. {
  339. *info = &fsl_fb_info;
  340. return (char *) ((unsigned int)(*info)->screen_base
  341. + (*info)->logo_size);
  342. }
  343. void fsl_diu_close(void)
  344. {
  345. struct fb_info *info = &fsl_fb_info;
  346. fsl_diu_disable_panel(info);
  347. }
  348. static int fsl_diu_enable_panel(struct fb_info *info)
  349. {
  350. struct diu *hw = dr.diu_reg;
  351. struct diu_ad *ad = &fsl_diu_fb_ad;
  352. DPRINTF("Entered: enable_panel\n");
  353. if (hw->desc[0] != (unsigned int)ad)
  354. hw->desc[0] = (unsigned int)ad;
  355. DPRINTF("desc[0] = 0x%x\n", hw->desc[0]);
  356. return 0;
  357. }
  358. static int fsl_diu_disable_panel(struct fb_info *info)
  359. {
  360. struct diu *hw = dr.diu_reg;
  361. DPRINTF("Entered: disable_panel\n");
  362. if (hw->desc[0] != (unsigned int)&dummy_ad)
  363. hw->desc[0] = (unsigned int)&dummy_ad;
  364. return 0;
  365. }
  366. static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
  367. {
  368. unsigned long offset;
  369. unsigned long mask;
  370. DPRINTF("Entered: map_video_memory\n");
  371. /* allocate maximum 1280*1024 with 32bpp */
  372. info->smem_len = 1280 * 4 *1024 + bytes_align;
  373. DPRINTF("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
  374. info->screen_base = malloc(info->smem_len);
  375. if (info->screen_base == NULL) {
  376. printf("Unable to allocate fb memory\n");
  377. return -1;
  378. }
  379. info->smem_start = (unsigned int) info->screen_base;
  380. mask = bytes_align - 1;
  381. offset = (unsigned long)info->screen_base & mask;
  382. if (offset) {
  383. info->screen_base += offset;
  384. info->smem_len = info->smem_len - (bytes_align - offset);
  385. } else
  386. info->smem_len = info->smem_len - bytes_align;
  387. info->screen_size = info->smem_len;
  388. DPRINTF("Allocated fb @ 0x%08lx, size=%d.\n",
  389. info->smem_start, info->smem_len);
  390. return 0;
  391. }
  392. static void enable_lcdc(void)
  393. {
  394. struct diu *hw = dr.diu_reg;
  395. DPRINTF("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
  396. if (!fb_enabled) {
  397. hw->diu_mode = dr.mode;
  398. fb_enabled++;
  399. }
  400. DPRINTF("diu_mode = %d\n", hw->diu_mode);
  401. }
  402. static void disable_lcdc(void)
  403. {
  404. struct diu *hw = dr.diu_reg;
  405. DPRINTF("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
  406. if (fb_enabled) {
  407. hw->diu_mode = 0;
  408. fb_enabled = 0;
  409. }
  410. }
  411. static u32 get_busfreq(void)
  412. {
  413. u32 fs_busfreq = 0;
  414. fs_busfreq = get_bus_freq(0);
  415. return fs_busfreq;
  416. }
  417. /*
  418. * Align to 64-bit(8-byte), 32-byte, etc.
  419. */
  420. static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
  421. {
  422. u32 offset, ssize;
  423. u32 mask;
  424. DPRINTF("Entered: allocate_buf\n");
  425. ssize = size + bytes_align;
  426. buf->paddr = malloc(ssize);
  427. if (!buf->paddr)
  428. return -1;
  429. memset(buf->paddr, 0, ssize);
  430. mask = bytes_align - 1;
  431. offset = (u32)buf->paddr & mask;
  432. if (offset) {
  433. buf->offset = bytes_align - offset;
  434. buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
  435. } else
  436. buf->offset = 0;
  437. return 0;
  438. }
  439. int fsl_diu_display_bmp(unsigned char *bmp,
  440. int xoffset,
  441. int yoffset,
  442. int transpar)
  443. {
  444. struct fb_info *info = &fsl_fb_info;
  445. unsigned char r, g, b;
  446. unsigned int *fb_t, val;
  447. unsigned char *bitmap;
  448. unsigned int palette[256];
  449. int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
  450. if (!bmp) {
  451. printf("Must supply a bitmap address\n");
  452. return 0;
  453. }
  454. raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24);
  455. width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18];
  456. height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22];
  457. bpp = (bmp[29] << 8) | (bmp[28]);
  458. ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24);
  459. bitmap = bmp + raster;
  460. cpp = info->var.bits_per_pixel / 8;
  461. DPRINTF("bmp = 0x%08x\n", (unsigned int)bmp);
  462. DPRINTF("bitmap = 0x%08x\n", (unsigned int)bitmap);
  463. DPRINTF("width = %d\n", width);
  464. DPRINTF("height = %d\n", height);
  465. DPRINTF("bpp = %d\n", bpp);
  466. DPRINTF("ncolors = %d\n", ncolors);
  467. DPRINTF("xres = %d\n", info->var.xres);
  468. DPRINTF("yres = %d\n", info->var.yres);
  469. DPRINTF("Screen_base = 0x%x\n", (unsigned int)info->screen_base);
  470. if (((width+xoffset) > info->var.xres) ||
  471. ((height+yoffset) > info->var.yres)) {
  472. printf("bitmap is out of range, image too large or too much offset\n");
  473. return 0;
  474. }
  475. if (bpp < 24) {
  476. for (i = 0, offset = 54; i < ncolors; i++, offset += 4)
  477. palette[i] = (bmp[offset+2] << 16)
  478. + (bmp[offset+1] << 8) + bmp[offset];
  479. }
  480. switch (bpp) {
  481. case 1:
  482. for (y = height - 1; y >= 0; y--) {
  483. fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
  484. for (x = 0; x < width; x += 8) {
  485. b = *bitmap++;
  486. for (k = 0; k < 8; k++) {
  487. if (b & 0x80)
  488. *fb_t = palette[1];
  489. else
  490. *fb_t = palette[0];
  491. b = b << 1;
  492. }
  493. }
  494. for (i = (width / 2) % 4; i > 0; i--)
  495. bitmap++;
  496. }
  497. break;
  498. case 4:
  499. for (y = height - 1; y >= 0; y--) {
  500. fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
  501. for (x = 0; x < width; x += 2) {
  502. b = *bitmap++;
  503. r = (b >> 4) & 0x0F;
  504. g = b & 0x0F;
  505. *fb_t++ = palette[r];
  506. *fb_t++ = palette[g];
  507. }
  508. for (i = (width / 2) % 4; i > 0; i--)
  509. bitmap++;
  510. }
  511. break;
  512. case 8:
  513. for (y = height - 1; y >= 0; y--) {
  514. fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
  515. for (x = 0; x < width; x++) {
  516. *fb_t++ = palette[ *bitmap++ ];
  517. }
  518. for (i = (width / 2) % 4; i > 0; i--)
  519. bitmap++;
  520. }
  521. break;
  522. case 24:
  523. for (y = height - 1; y >= 0; y--) {
  524. fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
  525. for (x = 0; x < width; x++) {
  526. b = *bitmap++;
  527. g = *bitmap++;
  528. r = *bitmap++;
  529. val = (r << 16) + (g << 8) + b;
  530. *fb_t++ = val;
  531. }
  532. for (; (x % 4) != 0; x++) /* 4-byte alignment */
  533. bitmap++;
  534. }
  535. break;
  536. }
  537. return height;
  538. }
  539. void fsl_diu_clear_screen(void)
  540. {
  541. struct fb_info *info = &fsl_fb_info;
  542. memset(info->screen_base, 0, info->smem_len);
  543. }
  544. #endif /* CONFIG_FSL_DIU_FB */