M5329EVB.h 7.1 KB

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  1. /*
  2. * Configuation settings for the Freescale MCF5329 FireEngine board.
  3. *
  4. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  5. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. /*
  26. * board/config.h - configuration options, board specific
  27. */
  28. #ifndef _M5329EVB_H
  29. #define _M5329EVB_H
  30. /*
  31. * High Level Configuration Options
  32. * (easy to change)
  33. */
  34. #define CONFIG_MCF532x /* define processor family */
  35. #define CONFIG_M5329 /* define processor type */
  36. #undef DEBUG
  37. #define CONFIG_MCFSERIAL
  38. #define CONFIG_BAUDRATE 115200
  39. #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
  40. #undef CONFIG_WATCHDOG
  41. #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
  42. #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
  43. CFG_CMD_CACHE | \
  44. CFG_CMD_DATE | \
  45. CFG_CMD_ELF | \
  46. CFG_CMD_FLASH | \
  47. (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
  48. CFG_CMD_MEMORY | \
  49. CFG_CMD_MISC | \
  50. CFG_CMD_MII | \
  51. CFG_CMD_NET | \
  52. CFG_CMD_PING | \
  53. CFG_CMD_REGINFO \
  54. )
  55. #define CONFIG_MCFFEC
  56. #ifdef CONFIG_MCFFEC
  57. # define CONFIG_NET_MULTI 1
  58. # define CONFIG_MII 1
  59. # define CFG_DISCOVER_PHY
  60. # define CFG_RX_ETH_BUFFER 8
  61. # define CFG_FAULT_ECHO_LINK_DOWN
  62. # define CFG_FEC0_PINMUX 0
  63. # define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
  64. # define MCFFEC_TOUT_LOOP 50000
  65. /* If CFG_DISCOVER_PHY is not defined - hardcoded */
  66. # ifndef CFG_DISCOVER_PHY
  67. # define FECDUPLEX FULL
  68. # define FECSPEED _100BASET
  69. # else
  70. # ifndef CFG_FAULT_ECHO_LINK_DOWN
  71. # define CFG_FAULT_ECHO_LINK_DOWN
  72. # endif
  73. # endif /* CFG_DISCOVER_PHY */
  74. #endif
  75. #define CONFIG_MCFUART
  76. #define CFG_UART_PORT (0)
  77. #define CONFIG_MCFRTC
  78. #undef RTC_DEBUG
  79. /* Timer */
  80. #define CONFIG_MCFTMR
  81. #undef CONFIG_MCFPIT
  82. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  83. #include <cmd_confdefs.h>
  84. #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
  85. #ifdef CONFIG_MCFFEC
  86. # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
  87. # define CONFIG_IPADDR 192.162.1.2
  88. # define CONFIG_NETMASK 255.255.255.0
  89. # define CONFIG_SERVERIP 192.162.1.1
  90. # define CONFIG_GATEWAYIP 192.162.1.1
  91. # define CONFIG_OVERWRITE_ETHADDR_ONCE
  92. #endif /* FEC_ENET */
  93. #define CONFIG_HOSTNAME M5329EVB
  94. #define CONFIG_EXTRA_ENV_SETTINGS \
  95. "netdev=eth0\0" \
  96. "loadaddr=40010000\0" \
  97. "u-boot=u-boot.bin\0" \
  98. "load=tftp ${loadaddr) ${u-boot}\0" \
  99. "upd=run load; run prog\0" \
  100. "prog=prot off 0 2ffff;" \
  101. "era 0 2ffff;" \
  102. "cp.b ${loadaddr} 0 ${filesize};" \
  103. "save\0" \
  104. ""
  105. #define CONFIG_PRAM 512 /* 512 KB */
  106. #define CFG_PROMPT "-> "
  107. #define CFG_LONGHELP /* undef to save memory */
  108. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  109. # define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  110. #else
  111. # define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  112. #endif
  113. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  114. #define CFG_MAXARGS 16 /* max number of command args */
  115. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  116. #define CFG_LOAD_ADDR 0x40010000
  117. #define CFG_HZ 1000
  118. #define CFG_CLK 80000000
  119. #define CFG_CPU_CLK CFG_CLK * 3
  120. #define CFG_MBAR 0xFC000000
  121. /*
  122. * Low Level Configuration Settings
  123. * (address mappings, register initial values, etc.)
  124. * You should know what you are doing if you make changes here.
  125. */
  126. /*-----------------------------------------------------------------------
  127. * Definitions for initial stack pointer and data area (in DPRAM)
  128. */
  129. #define CFG_INIT_RAM_ADDR 0x80000000
  130. #define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
  131. #define CFG_INIT_RAM_CTRL 0x221
  132. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  133. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  134. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  135. /*-----------------------------------------------------------------------
  136. * Start addresses for the final memory configuration
  137. * (Set up by the startup code)
  138. * Please note that CFG_SDRAM_BASE _must_ start at 0
  139. */
  140. #define CFG_SDRAM_BASE 0x40000000
  141. #define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
  142. #define CFG_SDRAM_CFG1 0x53722730
  143. #define CFG_SDRAM_CFG2 0x56670000
  144. #define CFG_SDRAM_CTRL 0xE1092000
  145. #define CFG_SDRAM_EMOD 0x40010000
  146. #define CFG_SDRAM_MODE 0x018D0000
  147. #define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400
  148. #define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20)
  149. #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
  150. #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  151. #define CFG_BOOTPARAMS_LEN 64*1024
  152. #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
  153. /*
  154. * For booting Linux, the board info and command line data
  155. * have to be in the first 8 MB of memory, since this is
  156. * the maximum mapped by the Linux kernel during initialization ??
  157. */
  158. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  159. /*-----------------------------------------------------------------------
  160. * FLASH organization
  161. */
  162. #define CFG_FLASH_CFI
  163. #ifdef CFG_FLASH_CFI
  164. # define CFG_FLASH_CFI_DRIVER 1
  165. # define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */
  166. # define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  167. # define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  168. # define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
  169. # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
  170. #endif
  171. #define CFG_FLASH_BASE 0
  172. #define CFG_FLASH0_BASE (CFG_CS0_BASE << 16)
  173. /* Configuration for environment
  174. * Environment is embedded in u-boot in the second sector of the flash
  175. */
  176. #define CFG_ENV_OFFSET 0x4000
  177. #define CFG_ENV_SECT_SIZE 0x2000
  178. #define CFG_ENV_IS_IN_FLASH 1
  179. #define CFG_ENV_IS_EMBEDDED 1
  180. /*-----------------------------------------------------------------------
  181. * Cache Configuration
  182. */
  183. #define CFG_CACHELINE_SIZE 16
  184. /*-----------------------------------------------------------------------
  185. * Chipselect bank definitions
  186. */
  187. /*
  188. * CS0 - NOR Flash 1, 2, 4, or 8MB
  189. * CS1 - CompactFlash and registers
  190. * CS2 - NAND Flash 16, 32, or 64MB
  191. * CS3 - Available
  192. * CS4 - Available
  193. * CS5 - Available
  194. */
  195. #define CFG_CS0_BASE 0
  196. #define CFG_CS0_MASK 0x007f0001
  197. #define CFG_CS0_CTRL 0x00001fa0
  198. #define CFG_CS1_BASE 0x1000
  199. #define CFG_CS1_MASK 0x001f0001
  200. #define CFG_CS1_CTRL 0x002A3780
  201. #ifdef NANDFLASH_SIZE
  202. #define CFG_CS2_BASE 0x00800000
  203. #define CFG_CS2_MASK 0x00ff0001
  204. #define CFG_CS2_CTRL 0x00001f60
  205. #endif
  206. #define CONFIG_UDP_CHECKSUM
  207. #endif /* _M5329EVB_H */