pcm051.h 8.8 KB

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  1. /*
  2. * pcm051.h
  3. *
  4. * Phytec phyCORE-AM335x (pcm051) boards information header
  5. *
  6. * Copyright (C) 2013 Lemonage Software GmbH
  7. * Author Lars Poeschel <poeschel@lemonage.de>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation version 2.
  12. *
  13. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  14. * kind, whether express or implied; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #ifndef __CONFIG_PCM051_H
  19. #define __CONFIG_PCM051_H
  20. #define CONFIG_AM33XX
  21. #define CONFIG_OMAP
  22. #include <asm/arch/omap.h>
  23. #define CONFIG_DMA_COHERENT
  24. #define CONFIG_DMA_COHERENT_SIZE (1 << 20)
  25. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
  26. #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
  27. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  28. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  29. #define CONFIG_SYS_PROMPT "U-Boot# "
  30. #define CONFIG_SYS_NO_FLASH
  31. #define MACH_TYPE_PCM051 4144 /* Until the next sync */
  32. #define CONFIG_MACH_TYPE MACH_TYPE_PCM051
  33. #define CONFIG_OF_LIBFDT
  34. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  35. #define CONFIG_SETUP_MEMORY_TAGS
  36. #define CONFIG_INITRD_TAG
  37. /* commands to include */
  38. #include <config_cmd_default.h>
  39. #define CONFIG_CMD_ASKENV
  40. #define CONFIG_VERSION_VARIABLE
  41. /* set to negative value for no autoboot */
  42. #define CONFIG_BOOTDELAY 1
  43. #define CONFIG_ENV_VARS_UBOOT_CONFIG
  44. #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  45. #define CONFIG_EXTRA_ENV_SETTINGS \
  46. "loadaddr=0x80007fc0\0" \
  47. "fdtaddr=0x80000000\0" \
  48. "rdaddr=0x81000000\0" \
  49. "bootfile=uImage\0" \
  50. "fdtfile=pcm051.dtb\0" \
  51. "console=ttyO0,115200n8\0" \
  52. "optargs=\0" \
  53. "mmcdev=0\0" \
  54. "mmcroot=/dev/mmcblk0p2 ro\0" \
  55. "mmcrootfstype=ext4 rootwait\0" \
  56. "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
  57. "ramrootfstype=ext2\0" \
  58. "mmcargs=setenv bootargs console=${console} " \
  59. "${optargs} " \
  60. "root=${mmcroot} " \
  61. "rootfstype=${mmcrootfstype}\0" \
  62. "bootenv=uEnv.txt\0" \
  63. "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
  64. "importbootenv=echo Importing environment from mmc ...; " \
  65. "env import -t $loadaddr $filesize\0" \
  66. "ramargs=setenv bootargs console=${console} " \
  67. "${optargs} " \
  68. "root=${ramroot} " \
  69. "rootfstype=${ramrootfstype}\0" \
  70. "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
  71. "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
  72. "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
  73. "mmcboot=echo Booting from mmc ...; " \
  74. "run mmcargs; " \
  75. "bootm ${loadaddr}\0" \
  76. "ramboot=echo Booting from ramdisk ...; " \
  77. "run ramargs; " \
  78. "bootm ${loadaddr}\0" \
  79. #define CONFIG_BOOTCOMMAND \
  80. "mmc dev ${mmcdev}; if mmc rescan; then " \
  81. "echo SD/MMC found on device ${mmcdev};" \
  82. "if run loadbootenv; then " \
  83. "echo Loaded environment from ${bootenv};" \
  84. "run importbootenv;" \
  85. "fi;" \
  86. "if test -n $uenvcmd; then " \
  87. "echo Running uenvcmd ...;" \
  88. "run uenvcmd;" \
  89. "fi;" \
  90. "if run loaduimage; then " \
  91. "run mmcboot;" \
  92. "fi;" \
  93. "fi;" \
  94. /* Clock Defines */
  95. #define V_OSCK 25000000 /* Clock output from T2 */
  96. #define V_SCLK (V_OSCK)
  97. #define CONFIG_CMD_ECHO
  98. /* max number of command args */
  99. #define CONFIG_SYS_MAXARGS 16
  100. /* Console I/O Buffer Size */
  101. #define CONFIG_SYS_CBSIZE 512
  102. /* Print Buffer Size */
  103. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
  104. + sizeof(CONFIG_SYS_PROMPT) + 16)
  105. /* Boot Argument Buffer Size */
  106. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  107. /*
  108. * memtest works on 8 MB in DRAM after skipping 32MB from
  109. * start addr of ram disk
  110. */
  111. #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
  112. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
  113. + (8 * 1024 * 1024))
  114. #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */
  115. #define CONFIG_MMC
  116. #define CONFIG_GENERIC_MMC
  117. #define CONFIG_OMAP_HSMMC
  118. #define CONFIG_CMD_MMC
  119. #define CONFIG_DOS_PARTITION
  120. #define CONFIG_CMD_FAT
  121. #define CONFIG_CMD_EXT2
  122. #define CONFIG_SPI
  123. #define CONFIG_OMAP3_SPI
  124. #define CONFIG_MTD_DEVICE
  125. #define CONFIG_SPI_FLASH
  126. #define CONFIG_SPI_FLASH_WINBOND
  127. #define CONFIG_CMD_SF
  128. #define CONFIG_SF_DEFAULT_SPEED 24000000
  129. /* Physical Memory Map */
  130. #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
  131. #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
  132. #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
  133. #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
  134. #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
  135. GENERATED_GBL_DATA_SIZE)
  136. /* Platform/Board specific defs */
  137. #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
  138. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  139. #define CONFIG_SYS_HZ 1000 /* 1ms clock */
  140. #define CONFIG_CONS_INDEX 1
  141. /* NS16550 Configuration */
  142. #define CONFIG_SYS_NS16550
  143. #define CONFIG_SYS_NS16550_SERIAL
  144. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  145. #define CONFIG_SYS_NS16550_CLK (48000000)
  146. #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
  147. #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
  148. #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
  149. #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
  150. #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
  151. #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
  152. /* I2C Configuration */
  153. #define CONFIG_I2C
  154. #define CONFIG_CMD_I2C
  155. #define CONFIG_HARD_I2C
  156. #define CONFIG_SYS_I2C_SPEED 100000
  157. #define CONFIG_SYS_I2C_SLAVE 1
  158. #define CONFIG_I2C_MULTI_BUS
  159. #define CONFIG_DRIVER_OMAP24XX_I2C
  160. #define CONFIG_CMD_EEPROM
  161. #define CONFIG_ENV_EEPROM_IS_ON_I2C
  162. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
  163. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  164. #define CONFIG_SYS_I2C_MULTI_EEPROMS
  165. #define CONFIG_OMAP_GPIO
  166. #define CONFIG_BAUDRATE 115200
  167. #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
  168. 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
  169. /* CPU */
  170. #define CONFIG_ARCH_CPU_INIT
  171. #define CONFIG_ENV_OVERWRITE
  172. #define CONFIG_SYS_CONSOLE_INFO_QUIET
  173. #define CONFIG_ENV_IS_NOWHERE
  174. /* Defines for SPL */
  175. #define CONFIG_SPL
  176. #define CONFIG_SPL_FRAMEWORK
  177. #define CONFIG_SPL_TEXT_BASE 0x402F0400
  178. #define CONFIG_SPL_MAX_SIZE (101 * 1024)
  179. #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
  180. #define CONFIG_SPL_BSS_START_ADDR 0x80000000
  181. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
  182. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
  183. #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
  184. #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
  185. #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
  186. #define CONFIG_SPL_MMC_SUPPORT
  187. #define CONFIG_SPL_FAT_SUPPORT
  188. #define CONFIG_SPL_I2C_SUPPORT
  189. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  190. #define CONFIG_SPL_LIBDISK_SUPPORT
  191. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  192. #define CONFIG_SPL_SERIAL_SUPPORT
  193. #define CONFIG_SPL_GPIO_SUPPORT
  194. #define CONFIG_SPL_YMODEM_SUPPORT
  195. #define CONFIG_SPL_NET_SUPPORT
  196. #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
  197. #define CONFIG_SPL_ETH_SUPPORT
  198. #define CONFIG_SPL_SPI_SUPPORT
  199. #define CONFIG_SPL_SPI_FLASH_SUPPORT
  200. #define CONFIG_SPL_SPI_LOAD
  201. #define CONFIG_SPL_SPI_BUS 0
  202. #define CONFIG_SPL_SPI_CS 0
  203. #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
  204. #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
  205. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
  206. /*
  207. * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  208. * 64 bytes before this address should be set aside for u-boot.img's
  209. * header. That is 0x800FFFC0--0x80100000 should not be used for any
  210. * other needs.
  211. */
  212. #define CONFIG_SYS_TEXT_BASE 0x80800000
  213. #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  214. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  215. /* Since SPL did pll and ddr initialization for us,
  216. * we don't need to do it twice.
  217. */
  218. #ifndef CONFIG_SPL_BUILD
  219. #define CONFIG_SKIP_LOWLEVEL_INIT
  220. #endif
  221. /*
  222. * USB configuration
  223. */
  224. #define CONFIG_USB_MUSB_DSPS
  225. #define CONFIG_ARCH_MISC_INIT
  226. #define CONFIG_MUSB_GADGET
  227. #define CONFIG_MUSB_PIO_ONLY
  228. #define CONFIG_USB_GADGET_DUALSPEED
  229. #define CONFIG_MUSB_HOST
  230. #define CONFIG_AM335X_USB0
  231. #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
  232. #define CONFIG_AM335X_USB1
  233. #define CONFIG_AM335X_USB1_MODE MUSB_HOST
  234. #ifdef CONFIG_MUSB_HOST
  235. #define CONFIG_CMD_USB
  236. #define CONFIG_USB_STORAGE
  237. #endif
  238. #ifdef CONFIG_MUSB_GADGET
  239. #define CONFIG_USB_ETHER
  240. #define CONFIG_USB_ETH_RNDIS
  241. #endif /* CONFIG_MUSB_GADGET */
  242. /* Unsupported features */
  243. #undef CONFIG_USE_IRQ
  244. #define CONFIG_CMD_NET
  245. #define CONFIG_CMD_DHCP
  246. #define CONFIG_CMD_PING
  247. #define CONFIG_DRIVER_TI_CPSW
  248. #define CONFIG_MII
  249. #define CONFIG_BOOTP_DEFAULT
  250. #define CONFIG_BOOTP_DNS
  251. #define CONFIG_BOOTP_DNS2
  252. #define CONFIG_BOOTP_SEND_HOSTNAME
  253. #define CONFIG_BOOTP_GATEWAY
  254. #define CONFIG_BOOTP_SUBNETMASK
  255. #define CONFIG_NET_RETRY_COUNT 10
  256. #define CONFIG_NET_MULTI
  257. #define CONFIG_PHY_GIGE
  258. #define CONFIG_PHYLIB
  259. #define CONFIG_PHY_ADDR 0
  260. #define CONFIG_PHY_SMSC
  261. #endif /* ! __CONFIG_PCM051_H */