ptrace.h 2.4 KB

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  1. /*
  2. * linux/include/asm-arm/proc-armv/ptrace.h
  3. *
  4. * Copyright (C) 1996-1999 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #ifndef __ASM_PROC_PTRACE_H
  11. #define __ASM_PROC_PTRACE_H
  12. #include <linux/config.h>
  13. #define USR26_MODE 0x00
  14. #define FIQ26_MODE 0x01
  15. #define IRQ26_MODE 0x02
  16. #define SVC26_MODE 0x03
  17. #define USR_MODE 0x10
  18. #define FIQ_MODE 0x11
  19. #define IRQ_MODE 0x12
  20. #define SVC_MODE 0x13
  21. #define ABT_MODE 0x17
  22. #define UND_MODE 0x1b
  23. #define SYSTEM_MODE 0x1f
  24. #define MODE_MASK 0x1f
  25. #define T_BIT 0x20
  26. #define F_BIT 0x40
  27. #define I_BIT 0x80
  28. #define CC_V_BIT (1 << 28)
  29. #define CC_C_BIT (1 << 29)
  30. #define CC_Z_BIT (1 << 30)
  31. #define CC_N_BIT (1 << 31)
  32. #define PCMASK 0
  33. #ifndef __ASSEMBLY__
  34. /* this struct defines the way the registers are stored on the
  35. stack during a system call. */
  36. struct pt_regs {
  37. long uregs[18];
  38. };
  39. #define ARM_cpsr uregs[16]
  40. #define ARM_pc uregs[15]
  41. #define ARM_lr uregs[14]
  42. #define ARM_sp uregs[13]
  43. #define ARM_ip uregs[12]
  44. #define ARM_fp uregs[11]
  45. #define ARM_r10 uregs[10]
  46. #define ARM_r9 uregs[9]
  47. #define ARM_r8 uregs[8]
  48. #define ARM_r7 uregs[7]
  49. #define ARM_r6 uregs[6]
  50. #define ARM_r5 uregs[5]
  51. #define ARM_r4 uregs[4]
  52. #define ARM_r3 uregs[3]
  53. #define ARM_r2 uregs[2]
  54. #define ARM_r1 uregs[1]
  55. #define ARM_r0 uregs[0]
  56. #define ARM_ORIG_r0 uregs[17]
  57. #define instruction_pointer(regs) ((regs)->ARM_ip)
  58. #ifdef __KERNEL__
  59. #define user_mode(regs) \
  60. (((regs)->ARM_cpsr & 0xf) == 0)
  61. #ifdef CONFIG_ARM_THUMB
  62. #define thumb_mode(regs) \
  63. (((regs)->ARM_cpsr & T_BIT))
  64. #else
  65. #define thumb_mode(regs) (0)
  66. #endif
  67. #define processor_mode(regs) \
  68. ((regs)->ARM_cpsr & MODE_MASK)
  69. #define interrupts_enabled(regs) \
  70. (!((regs)->ARM_cpsr & I_BIT))
  71. #define fast_interrupts_enabled(regs) \
  72. (!((regs)->ARM_cpsr & F_BIT))
  73. #define condition_codes(regs) \
  74. ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
  75. /* Are the current registers suitable for user mode?
  76. * (used to maintain security in signal handlers)
  77. */
  78. static inline int valid_user_regs(struct pt_regs *regs)
  79. {
  80. if ((regs->ARM_cpsr & 0xf) == 0 &&
  81. (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
  82. return 1;
  83. /*
  84. * Force CPSR to something logical...
  85. */
  86. regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
  87. return 0;
  88. }
  89. #endif /* __KERNEL__ */
  90. #endif /* __ASSEMBLY__ */
  91. #endif