panda.c 5.6 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Texas Instruments Incorporated, <www.ti.com>
  4. * Steve Sakoman <steve@sakoman.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <asm/arch/sys_proto.h>
  26. #include <asm/arch/mmc_host_def.h>
  27. #include <asm/arch/clocks.h>
  28. #include <asm/arch/gpio.h>
  29. #include <asm/gpio.h>
  30. #include "panda_mux_data.h"
  31. #ifdef CONFIG_USB_EHCI
  32. #include <usb.h>
  33. #include <asm/arch/ehci.h>
  34. #include <asm/ehci-omap.h>
  35. #endif
  36. #define PANDA_ULPI_PHY_TYPE_GPIO 182
  37. DECLARE_GLOBAL_DATA_PTR;
  38. const struct omap_sysinfo sysinfo = {
  39. "Board: OMAP4 Panda\n"
  40. };
  41. struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
  42. /**
  43. * @brief board_init
  44. *
  45. * @return 0
  46. */
  47. int board_init(void)
  48. {
  49. gpmc_init();
  50. gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
  51. gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
  52. return 0;
  53. }
  54. int board_eth_init(bd_t *bis)
  55. {
  56. return 0;
  57. }
  58. /**
  59. * @brief misc_init_r - Configure Panda board specific configurations
  60. * such as power configurations, ethernet initialization as phase2 of
  61. * boot sequence
  62. *
  63. * @return 0
  64. */
  65. int misc_init_r(void)
  66. {
  67. int phy_type;
  68. u32 auxclk, altclksrc;
  69. /* EHCI is not supported on ES1.0 */
  70. if (omap_revision() == OMAP4430_ES1_0)
  71. return 0;
  72. gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
  73. phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
  74. if (phy_type == 1) {
  75. /* ULPI PHY supplied by auxclk3 derived from sys_clk */
  76. debug("ULPI PHY supplied by auxclk3\n");
  77. auxclk = readl(&scrm->auxclk3);
  78. /* Select sys_clk */
  79. auxclk &= ~AUXCLK_SRCSELECT_MASK;
  80. auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
  81. /* Set the divisor to 2 */
  82. auxclk &= ~AUXCLK_CLKDIV_MASK;
  83. auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
  84. /* Request auxilary clock #3 */
  85. auxclk |= AUXCLK_ENABLE_MASK;
  86. writel(auxclk, &scrm->auxclk3);
  87. } else {
  88. /* ULPI PHY supplied by auxclk1 derived from PER dpll */
  89. debug("ULPI PHY supplied by auxclk1\n");
  90. auxclk = readl(&scrm->auxclk1);
  91. /* Select per DPLL */
  92. auxclk &= ~AUXCLK_SRCSELECT_MASK;
  93. auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
  94. /* Set the divisor to 16 */
  95. auxclk &= ~AUXCLK_CLKDIV_MASK;
  96. auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
  97. /* Request auxilary clock #3 */
  98. auxclk |= AUXCLK_ENABLE_MASK;
  99. writel(auxclk, &scrm->auxclk1);
  100. }
  101. altclksrc = readl(&scrm->altclksrc);
  102. /* Activate alternate system clock supplier */
  103. altclksrc &= ~ALTCLKSRC_MODE_MASK;
  104. altclksrc |= ALTCLKSRC_MODE_ACTIVE;
  105. /* enable clocks */
  106. altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
  107. writel(altclksrc, &scrm->altclksrc);
  108. return 0;
  109. }
  110. void set_muxconf_regs_essential(void)
  111. {
  112. do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
  113. sizeof(core_padconf_array_essential) /
  114. sizeof(struct pad_conf_entry));
  115. do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
  116. sizeof(wkup_padconf_array_essential) /
  117. sizeof(struct pad_conf_entry));
  118. if (omap_revision() >= OMAP4460_ES1_0)
  119. do_set_mux(CONTROL_PADCONF_WKUP,
  120. wkup_padconf_array_essential_4460,
  121. sizeof(wkup_padconf_array_essential_4460) /
  122. sizeof(struct pad_conf_entry));
  123. }
  124. void set_muxconf_regs_non_essential(void)
  125. {
  126. do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
  127. sizeof(core_padconf_array_non_essential) /
  128. sizeof(struct pad_conf_entry));
  129. if (omap_revision() < OMAP4460_ES1_0)
  130. do_set_mux(CONTROL_PADCONF_CORE,
  131. core_padconf_array_non_essential_4430,
  132. sizeof(core_padconf_array_non_essential_4430) /
  133. sizeof(struct pad_conf_entry));
  134. else
  135. do_set_mux(CONTROL_PADCONF_CORE,
  136. core_padconf_array_non_essential_4460,
  137. sizeof(core_padconf_array_non_essential_4460) /
  138. sizeof(struct pad_conf_entry));
  139. do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
  140. sizeof(wkup_padconf_array_non_essential) /
  141. sizeof(struct pad_conf_entry));
  142. if (omap_revision() < OMAP4460_ES1_0)
  143. do_set_mux(CONTROL_PADCONF_WKUP,
  144. wkup_padconf_array_non_essential_4430,
  145. sizeof(wkup_padconf_array_non_essential_4430) /
  146. sizeof(struct pad_conf_entry));
  147. }
  148. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
  149. int board_mmc_init(bd_t *bis)
  150. {
  151. omap_mmc_init(0);
  152. return 0;
  153. }
  154. #endif
  155. #ifdef CONFIG_USB_EHCI
  156. static struct omap_usbhs_board_data usbhs_bdata = {
  157. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  158. .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
  159. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  160. };
  161. int ehci_hcd_init(void)
  162. {
  163. int ret;
  164. unsigned int utmi_clk;
  165. /* Now we can enable our port clocks */
  166. utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
  167. utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
  168. sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
  169. ret = omap_ehci_hcd_init(&usbhs_bdata);
  170. if (ret < 0)
  171. return ret;
  172. return 0;
  173. }
  174. int ehci_hcd_stop(void)
  175. {
  176. return omap_ehci_hcd_stop();
  177. }
  178. #endif
  179. /*
  180. * get_board_rev() - get board revision
  181. */
  182. u32 get_board_rev(void)
  183. {
  184. return 0x20;
  185. }