omap1610innovator.c 8.0 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * See file CREDITS for list of people who contributed to this
  14. * project.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2 of
  19. * the License, or (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. */
  31. #include <common.h>
  32. #if defined(CONFIG_OMAP1610)
  33. #include <./configs/omap1510.h>
  34. #endif
  35. void flash__init (void);
  36. void ether__init (void);
  37. void set_muxconf_regs (void);
  38. void peripheral_power_enable (void);
  39. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  40. static inline void delay (unsigned long loops)
  41. {
  42. __asm__ volatile ("1:\n"
  43. "subs %0, %1, #1\n"
  44. "bne 1b":"=r" (loops):"0" (loops));
  45. }
  46. /*
  47. * Miscellaneous platform dependent initialisations
  48. */
  49. int board_init (void)
  50. {
  51. DECLARE_GLOBAL_DATA_PTR;
  52. /* arch number of OMAP 1510-Board */
  53. /* to be changed for OMAP 1610 Board */
  54. gd->bd->bi_arch_number = 234;
  55. /* adress of boot parameters */
  56. gd->bd->bi_boot_params = 0x10000100;
  57. /* Configure MUX settings */
  58. set_muxconf_regs ();
  59. peripheral_power_enable ();
  60. /* this speeds up your boot a quite a bit. However to make it
  61. * work, you need make sure your kernel startup flush bug is fixed.
  62. * ... rkw ...
  63. */
  64. icache_enable ();
  65. flash__init ();
  66. ether__init ();
  67. return 0;
  68. }
  69. int misc_init_r (void)
  70. {
  71. /* currently empty */
  72. return (0);
  73. }
  74. /******************************
  75. Routine:
  76. Description:
  77. ******************************/
  78. void flash__init (void)
  79. {
  80. #define EMIFS_GlB_Config_REG 0xfffecc0c
  81. unsigned int regval;
  82. regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
  83. /* Turn off write protection for flash devices. */
  84. regval = regval | 0x0001;
  85. *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
  86. }
  87. /*************************************************************
  88. Routine:ether__init
  89. Description: take the Ethernet controller out of reset and wait
  90. for the EEPROM load to complete.
  91. *************************************************************/
  92. void ether__init (void)
  93. {
  94. #define ETH_CONTROL_REG 0x0400000b
  95. *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
  96. udelay (3);
  97. }
  98. /******************************
  99. Routine:
  100. Description:
  101. ******************************/
  102. int dram_init (void)
  103. {
  104. DECLARE_GLOBAL_DATA_PTR;
  105. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  106. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  107. return 0;
  108. }
  109. /******************************************************
  110. Routine: set_muxconf_regs
  111. Description: Setting up the configuration Mux registers
  112. specific to the hardware
  113. *******************************************************/
  114. void set_muxconf_regs (void)
  115. {
  116. volatile unsigned int *MuxConfReg;
  117. /* set each registers to its reset value; */
  118. MuxConfReg =
  119. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  120. /* setup for UART1 */
  121. *MuxConfReg &= ~(0x02000000); /* bit 25 */
  122. /* setup for UART2 */
  123. *MuxConfReg &= ~(0x01000000); /* bit 24 */
  124. /* Disable Uwire CS Hi-Z */
  125. *MuxConfReg |= 0x08000000;
  126. MuxConfReg =
  127. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
  128. *MuxConfReg = 0x00000000;
  129. MuxConfReg =
  130. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
  131. *MuxConfReg = 0x00000000;
  132. MuxConfReg =
  133. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
  134. *MuxConfReg = 0x00000000;
  135. MuxConfReg =
  136. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
  137. /*setup mux for UART3 */
  138. *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
  139. *MuxConfReg &= ~0x0000003e;
  140. MuxConfReg =
  141. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
  142. *MuxConfReg = 0x00000000;
  143. MuxConfReg =
  144. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
  145. /* Disable Uwire CS Hi-Z */
  146. *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
  147. MuxConfReg =
  148. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
  149. /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
  150. /* hardware will actually use TX and RTS based on bit 25 in */
  151. /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
  152. *MuxConfReg |= 0x00201000;
  153. MuxConfReg =
  154. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
  155. *MuxConfReg = 0x00000000;
  156. MuxConfReg =
  157. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
  158. *MuxConfReg = 0x00000000;
  159. MuxConfReg =
  160. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
  161. /* setup for UART2 */
  162. /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
  163. /* hardware will actually use TX and RTS based on bit 24 in */
  164. /* FUNC_MUX_CTRL_0. */
  165. *MuxConfReg |= 0x09000000;
  166. MuxConfReg =
  167. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
  168. *MuxConfReg = 0x00000000;
  169. MuxConfReg =
  170. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
  171. *MuxConfReg = 0x00000000;
  172. /* mux setup for SD/MMC driver */
  173. MuxConfReg =
  174. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
  175. *MuxConfReg &= 0xFFFE0FFF;
  176. MuxConfReg =
  177. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
  178. *MuxConfReg = 0x00000000;
  179. MuxConfReg =
  180. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  181. /* bit 13 for MMC2 XOR_CLK */
  182. *MuxConfReg &= ~(0x00002000);
  183. /* bit 29 for UART 1 */
  184. *MuxConfReg &= ~(0x00002000);
  185. MuxConfReg =
  186. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  187. /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
  188. *MuxConfReg |= 0x000C0000;
  189. MuxConfReg =
  190. (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
  191. *MuxConfReg &= ~(0x00000070);
  192. *MuxConfReg &= ~(0x00000008);
  193. *MuxConfReg |= 0x00000003;
  194. *MuxConfReg |= 0x00000180;
  195. MuxConfReg =
  196. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  197. /* bit 17, software controls VBUS */
  198. *MuxConfReg &= ~(0x00020000);
  199. /* Enable USB 48 and 12M clocks */
  200. *MuxConfReg |= 0x00000200;
  201. *MuxConfReg &= ~(0x00000180);
  202. /*2.75V for MMCSDIO1 */
  203. MuxConfReg =
  204. (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
  205. *MuxConfReg = 0x00001FE7;
  206. MuxConfReg =
  207. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
  208. *MuxConfReg = 0x00000000;
  209. MuxConfReg =
  210. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
  211. *MuxConfReg = 0x00000000;
  212. MuxConfReg =
  213. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  214. *MuxConfReg = 0x00000000;
  215. MuxConfReg =
  216. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
  217. *MuxConfReg = 0x00000000;
  218. MuxConfReg =
  219. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
  220. *MuxConfReg = 0x00000000;
  221. MuxConfReg =
  222. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
  223. *MuxConfReg = 0x00000000;
  224. /* Turn on UART2 48 MHZ clock */
  225. MuxConfReg =
  226. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  227. *MuxConfReg |= 0x40000000;
  228. MuxConfReg =
  229. (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
  230. /* setup for USB VBus detection OMAP161x */
  231. *MuxConfReg |= 0x00040000; /* bit 18 */
  232. MuxConfReg =
  233. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  234. /* PullUps for SD/MMC driver */
  235. *MuxConfReg |= ~(0xFFFE0FFF);
  236. MuxConfReg =
  237. (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
  238. *MuxConfReg = COMP_MODE_ENABLE;
  239. }
  240. /******************************************************
  241. Routine: peripheral_power_enable
  242. Description: Enable the power for UART1
  243. *******************************************************/
  244. void peripheral_power_enable (void)
  245. {
  246. #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
  247. #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
  248. *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
  249. }