interrupts.c 8.5 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments <www.ti.com>
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11. * Alex Zuepke <azu@sysgo.de>
  12. *
  13. * (C) Copyright 2002-2004
  14. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15. *
  16. * (C) Copyright 2004
  17. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <arm925t.h>
  39. #include <asm/proc-armv/ptrace.h>
  40. #define TIMER_LOAD_VAL 0xffffffff
  41. /* macro to read the 32 bit timer */
  42. #ifdef CONFIG_OMAP
  43. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
  44. #endif
  45. #ifdef CONFIG_INTEGRATOR
  46. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  47. #endif
  48. #ifdef CONFIG_VERSATILE
  49. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  50. #endif
  51. #ifdef CONFIG_USE_IRQ
  52. /* enable IRQ interrupts */
  53. void enable_interrupts (void)
  54. {
  55. unsigned long temp;
  56. __asm__ __volatile__("mrs %0, cpsr\n"
  57. "bic %0, %0, #0x80\n"
  58. "msr cpsr_c, %0"
  59. : "=r" (temp)
  60. :
  61. : "memory");
  62. }
  63. /*
  64. * disable IRQ/FIQ interrupts
  65. * returns true if interrupts had been enabled before we disabled them
  66. */
  67. int disable_interrupts (void)
  68. {
  69. unsigned long old,temp;
  70. __asm__ __volatile__("mrs %0, cpsr\n"
  71. "orr %1, %0, #0xc0\n"
  72. "msr cpsr_c, %1"
  73. : "=r" (old), "=r" (temp)
  74. :
  75. : "memory");
  76. return (old & 0x80) == 0;
  77. }
  78. #else
  79. void enable_interrupts (void)
  80. {
  81. return;
  82. }
  83. int disable_interrupts (void)
  84. {
  85. return 0;
  86. }
  87. #endif
  88. void bad_mode (void)
  89. {
  90. panic ("Resetting CPU ...\n");
  91. reset_cpu (0);
  92. }
  93. void show_regs (struct pt_regs *regs)
  94. {
  95. unsigned long flags;
  96. const char *processor_modes[] = {
  97. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  98. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  99. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  100. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  101. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  102. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  103. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  104. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  105. };
  106. flags = condition_codes (regs);
  107. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  108. "sp : %08lx ip : %08lx fp : %08lx\n",
  109. instruction_pointer (regs),
  110. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  111. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  112. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  113. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  114. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  115. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  116. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  117. printf ("Flags: %c%c%c%c",
  118. flags & CC_N_BIT ? 'N' : 'n',
  119. flags & CC_Z_BIT ? 'Z' : 'z',
  120. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  121. printf (" IRQs %s FIQs %s Mode %s%s\n",
  122. interrupts_enabled (regs) ? "on" : "off",
  123. fast_interrupts_enabled (regs) ? "on" : "off",
  124. processor_modes[processor_mode (regs)],
  125. thumb_mode (regs) ? " (T)" : "");
  126. }
  127. void do_undefined_instruction (struct pt_regs *pt_regs)
  128. {
  129. printf ("undefined instruction\n");
  130. show_regs (pt_regs);
  131. bad_mode ();
  132. }
  133. void do_software_interrupt (struct pt_regs *pt_regs)
  134. {
  135. printf ("software interrupt\n");
  136. show_regs (pt_regs);
  137. bad_mode ();
  138. }
  139. void do_prefetch_abort (struct pt_regs *pt_regs)
  140. {
  141. printf ("prefetch abort\n");
  142. show_regs (pt_regs);
  143. bad_mode ();
  144. }
  145. void do_data_abort (struct pt_regs *pt_regs)
  146. {
  147. printf ("data abort\n");
  148. show_regs (pt_regs);
  149. bad_mode ();
  150. }
  151. void do_not_used (struct pt_regs *pt_regs)
  152. {
  153. printf ("not used\n");
  154. show_regs (pt_regs);
  155. bad_mode ();
  156. }
  157. void do_fiq (struct pt_regs *pt_regs)
  158. {
  159. printf ("fast interrupt request\n");
  160. show_regs (pt_regs);
  161. bad_mode ();
  162. }
  163. void do_irq (struct pt_regs *pt_regs)
  164. {
  165. printf ("interrupt request\n");
  166. show_regs (pt_regs);
  167. bad_mode ();
  168. }
  169. static ulong timestamp;
  170. static ulong lastdec;
  171. /* nothing really to do with interrupts, just starts up a counter. */
  172. int interrupt_init (void)
  173. {
  174. #ifdef CONFIG_OMAP
  175. int32_t val;
  176. /* Start the decrementer ticking down from 0xffffffff */
  177. *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
  178. val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
  179. *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
  180. #endif /* CONFIG_OMAP */
  181. #ifdef CONFIG_INTEGRATOR
  182. /* Load timer with initial value */
  183. *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
  184. /* Set timer to be enabled, free-running, no interrupts, 256 divider */
  185. *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
  186. #endif /* CONFIG_INTEGRATOR */
  187. #ifdef CONFIG_VERSATILE
  188. *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
  189. *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
  190. *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
  191. #endif /* CONFIG_VERSATILE */
  192. /* init the timestamp and lastdec value */
  193. reset_timer_masked();
  194. return (0);
  195. }
  196. /*
  197. * timer without interrupts
  198. */
  199. void reset_timer (void)
  200. {
  201. reset_timer_masked ();
  202. }
  203. ulong get_timer (ulong base)
  204. {
  205. return get_timer_masked () - base;
  206. }
  207. void set_timer (ulong t)
  208. {
  209. timestamp = t;
  210. }
  211. /* delay x useconds AND perserve advance timstamp value */
  212. void udelay (unsigned long usec)
  213. {
  214. ulong tmo, tmp;
  215. if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
  216. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  217. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  218. tmo /= 1000; /* finish normalize. */
  219. }else{ /* else small number, don't kill it prior to HZ multiply */
  220. tmo = usec * CFG_HZ;
  221. tmo /= (1000*1000);
  222. }
  223. tmp = get_timer (0); /* get current timestamp */
  224. if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
  225. reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
  226. else
  227. tmo += tmp; /* else, set advancing stamp wake up time */
  228. while (get_timer_masked () < tmo)/* loop till event */
  229. /*NOP*/;
  230. }
  231. void reset_timer_masked (void)
  232. {
  233. /* reset time */
  234. lastdec = READ_TIMER; /* capure current decrementer value time */
  235. timestamp = 0; /* start "advancing" time stamp from 0 */
  236. }
  237. ulong get_timer_masked (void)
  238. {
  239. ulong now = READ_TIMER; /* current tick value */
  240. if (lastdec >= now) { /* normal mode (non roll) */
  241. /* normal mode */
  242. timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
  243. } else { /* we have overflow of the count down timer */
  244. /* nts = ts + ld + (TLV - now)
  245. * ts=old stamp, ld=time that passed before passing through -1
  246. * (TLV-now) amount of time after passing though -1
  247. * nts = new "advancing time stamp"...it could also roll and cause problems.
  248. */
  249. timestamp += lastdec + TIMER_LOAD_VAL - now;
  250. }
  251. lastdec = now;
  252. return timestamp;
  253. }
  254. /* waits specified delay value and resets timestamp */
  255. void udelay_masked (unsigned long usec)
  256. {
  257. ulong tmo;
  258. if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
  259. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  260. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  261. tmo /= 1000; /* finish normalize. */
  262. }else{ /* else small number, don't kill it prior to HZ multiply */
  263. tmo = usec * CFG_HZ;
  264. tmo /= (1000*1000);
  265. }
  266. reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */
  267. while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
  268. /*NOP*/;
  269. }
  270. /*
  271. * This function is derived from PowerPC code (read timebase as long long).
  272. * On ARM it just returns the timer value.
  273. */
  274. unsigned long long get_ticks(void)
  275. {
  276. return get_timer(0);
  277. }
  278. /*
  279. * This function is derived from PowerPC code (timebase clock frequency).
  280. * On ARM it returns the number of timer ticks per second.
  281. */
  282. ulong get_tbclk (void)
  283. {
  284. ulong tbclk;
  285. tbclk = CFG_HZ;
  286. return tbclk;
  287. }