cmd_ide.c 50 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #ifdef CONFIG_ORION5X
  44. #include <asm/arch/orion5x.h>
  45. #elif defined CONFIG_KIRKWOOD
  46. #include <asm/arch/kirkwood.h>
  47. #endif
  48. #include <ide.h>
  49. #include <ata.h>
  50. #ifdef CONFIG_STATUS_LED
  51. # include <status_led.h>
  52. #endif
  53. #ifdef CONFIG_IDE_8xx_DIRECT
  54. DECLARE_GLOBAL_DATA_PTR;
  55. #endif
  56. #ifdef __PPC__
  57. # define EIEIO __asm__ volatile ("eieio")
  58. # define SYNC __asm__ volatile ("sync")
  59. #else
  60. # define EIEIO /* nothing */
  61. # define SYNC /* nothing */
  62. #endif
  63. #ifdef CONFIG_IDE_8xx_DIRECT
  64. /* Timings for IDE Interface
  65. *
  66. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  67. * 70 165 30 PIO-Mode 0, [ns]
  68. * 4 9 2 [Cycles]
  69. * 50 125 20 PIO-Mode 1, [ns]
  70. * 3 7 2 [Cycles]
  71. * 30 100 15 PIO-Mode 2, [ns]
  72. * 2 6 1 [Cycles]
  73. * 30 80 10 PIO-Mode 3, [ns]
  74. * 2 5 1 [Cycles]
  75. * 25 70 10 PIO-Mode 4, [ns]
  76. * 2 4 1 [Cycles]
  77. */
  78. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  79. {
  80. /* Setup Length Hold */
  81. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  82. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  83. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  84. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  85. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  86. };
  87. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  88. #ifndef CONFIG_SYS_PIO_MODE
  89. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  90. #endif
  91. static int pio_mode = CONFIG_SYS_PIO_MODE;
  92. /* Make clock cycles and always round up */
  93. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  94. #endif /* CONFIG_IDE_8xx_DIRECT */
  95. /* ------------------------------------------------------------------------- */
  96. /* Current I/O Device */
  97. static int curr_device = -1;
  98. /* Current offset for IDE0 / IDE1 bus access */
  99. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  100. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  101. CONFIG_SYS_ATA_IDE0_OFFSET,
  102. #endif
  103. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  104. CONFIG_SYS_ATA_IDE1_OFFSET,
  105. #endif
  106. };
  107. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  108. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  109. /* ------------------------------------------------------------------------- */
  110. #ifdef CONFIG_IDE_LED
  111. # if !defined(CONFIG_BMS2003) && \
  112. !defined(CONFIG_CPC45) && \
  113. !defined(CONFIG_KUP4K) && \
  114. !defined(CONFIG_KUP4X)
  115. static void ide_led (uchar led, uchar status);
  116. #else
  117. extern void ide_led (uchar led, uchar status);
  118. #endif
  119. #else
  120. #define ide_led(a,b) /* dummy */
  121. #endif
  122. #ifdef CONFIG_IDE_RESET
  123. static void ide_reset (void);
  124. #else
  125. #define ide_reset() /* dummy */
  126. #endif
  127. static void ide_ident (block_dev_desc_t *dev_desc);
  128. static uchar ide_wait (int dev, ulong t);
  129. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  130. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  131. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  132. static void input_data(int dev, ulong *sect_buf, int words);
  133. static void output_data(int dev, ulong *sect_buf, int words);
  134. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  135. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  136. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  137. #endif
  138. #ifdef CONFIG_ATAPI
  139. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  140. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  141. #endif
  142. #ifdef CONFIG_IDE_8xx_DIRECT
  143. static void set_pcmcia_timing (int pmode);
  144. #endif
  145. /* ------------------------------------------------------------------------- */
  146. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  147. {
  148. int rcode = 0;
  149. switch (argc) {
  150. case 0:
  151. case 1:
  152. return cmd_usage(cmdtp);
  153. case 2:
  154. if (strncmp(argv[1],"res",3) == 0) {
  155. puts ("\nReset IDE"
  156. #ifdef CONFIG_IDE_8xx_DIRECT
  157. " on PCMCIA " PCMCIA_SLOT_MSG
  158. #endif
  159. ": ");
  160. ide_init ();
  161. return 0;
  162. } else if (strncmp(argv[1],"inf",3) == 0) {
  163. int i;
  164. putc ('\n');
  165. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  166. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  167. continue; /* list only known devices */
  168. printf ("IDE device %d: ", i);
  169. dev_print(&ide_dev_desc[i]);
  170. }
  171. return 0;
  172. } else if (strncmp(argv[1],"dev",3) == 0) {
  173. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  174. puts ("\nno IDE devices available\n");
  175. return 1;
  176. }
  177. printf ("\nIDE device %d: ", curr_device);
  178. dev_print(&ide_dev_desc[curr_device]);
  179. return 0;
  180. } else if (strncmp(argv[1],"part",4) == 0) {
  181. int dev, ok;
  182. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  183. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  184. ++ok;
  185. if (dev)
  186. putc ('\n');
  187. print_part(&ide_dev_desc[dev]);
  188. }
  189. }
  190. if (!ok) {
  191. puts ("\nno IDE devices available\n");
  192. rcode ++;
  193. }
  194. return rcode;
  195. }
  196. return cmd_usage(cmdtp);
  197. case 3:
  198. if (strncmp(argv[1],"dev",3) == 0) {
  199. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  200. printf ("\nIDE device %d: ", dev);
  201. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  202. puts ("unknown device\n");
  203. return 1;
  204. }
  205. dev_print(&ide_dev_desc[dev]);
  206. /*ide_print (dev);*/
  207. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  208. return 1;
  209. }
  210. curr_device = dev;
  211. puts ("... is now current device\n");
  212. return 0;
  213. } else if (strncmp(argv[1],"part",4) == 0) {
  214. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  215. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  216. print_part(&ide_dev_desc[dev]);
  217. } else {
  218. printf ("\nIDE device %d not available\n", dev);
  219. rcode = 1;
  220. }
  221. return rcode;
  222. #if 0
  223. } else if (strncmp(argv[1],"pio",4) == 0) {
  224. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  225. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  226. puts ("\nSetting ");
  227. pio_mode = mode;
  228. ide_init ();
  229. } else {
  230. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  231. mode, IDE_MAX_PIO_MODE);
  232. }
  233. return;
  234. #endif
  235. }
  236. return cmd_usage(cmdtp);
  237. default:
  238. /* at least 4 args */
  239. if (strcmp(argv[1],"read") == 0) {
  240. ulong addr = simple_strtoul(argv[2], NULL, 16);
  241. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  242. ulong n;
  243. #ifdef CONFIG_SYS_64BIT_LBA
  244. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  245. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  246. curr_device, blk, cnt);
  247. #else
  248. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  249. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  250. curr_device, blk, cnt);
  251. #endif
  252. n = ide_dev_desc[curr_device].block_read (curr_device,
  253. blk, cnt,
  254. (ulong *)addr);
  255. /* flush cache after read */
  256. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  257. printf ("%ld blocks read: %s\n",
  258. n, (n==cnt) ? "OK" : "ERROR");
  259. if (n==cnt) {
  260. return 0;
  261. } else {
  262. return 1;
  263. }
  264. } else if (strcmp(argv[1],"write") == 0) {
  265. ulong addr = simple_strtoul(argv[2], NULL, 16);
  266. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  267. ulong n;
  268. #ifdef CONFIG_SYS_64BIT_LBA
  269. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  270. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  271. curr_device, blk, cnt);
  272. #else
  273. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  274. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  275. curr_device, blk, cnt);
  276. #endif
  277. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  278. printf ("%ld blocks written: %s\n",
  279. n, (n==cnt) ? "OK" : "ERROR");
  280. if (n==cnt)
  281. return 0;
  282. else
  283. return 1;
  284. } else {
  285. return cmd_usage(cmdtp);
  286. }
  287. return rcode;
  288. }
  289. }
  290. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  291. {
  292. char *boot_device = NULL;
  293. char *ep;
  294. int dev, part = 0;
  295. ulong addr, cnt;
  296. disk_partition_t info;
  297. image_header_t *hdr;
  298. int rcode = 0;
  299. #if defined(CONFIG_FIT)
  300. const void *fit_hdr = NULL;
  301. #endif
  302. show_boot_progress (41);
  303. switch (argc) {
  304. case 1:
  305. addr = CONFIG_SYS_LOAD_ADDR;
  306. boot_device = getenv ("bootdevice");
  307. break;
  308. case 2:
  309. addr = simple_strtoul(argv[1], NULL, 16);
  310. boot_device = getenv ("bootdevice");
  311. break;
  312. case 3:
  313. addr = simple_strtoul(argv[1], NULL, 16);
  314. boot_device = argv[2];
  315. break;
  316. default:
  317. show_boot_progress (-42);
  318. return cmd_usage(cmdtp);
  319. }
  320. show_boot_progress (42);
  321. if (!boot_device) {
  322. puts ("\n** No boot device **\n");
  323. show_boot_progress (-43);
  324. return 1;
  325. }
  326. show_boot_progress (43);
  327. dev = simple_strtoul(boot_device, &ep, 16);
  328. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  329. printf ("\n** Device %d not available\n", dev);
  330. show_boot_progress (-44);
  331. return 1;
  332. }
  333. show_boot_progress (44);
  334. if (*ep) {
  335. if (*ep != ':') {
  336. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  337. show_boot_progress (-45);
  338. return 1;
  339. }
  340. part = simple_strtoul(++ep, NULL, 16);
  341. }
  342. show_boot_progress (45);
  343. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  344. show_boot_progress (-46);
  345. return 1;
  346. }
  347. show_boot_progress (46);
  348. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  349. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  350. printf ("\n** Invalid partition type \"%.32s\""
  351. " (expect \"" BOOT_PART_TYPE "\")\n",
  352. info.type);
  353. show_boot_progress (-47);
  354. return 1;
  355. }
  356. show_boot_progress (47);
  357. printf ("\nLoading from IDE device %d, partition %d: "
  358. "Name: %.32s Type: %.32s\n",
  359. dev, part, info.name, info.type);
  360. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  361. info.start, info.size, info.blksz);
  362. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  363. printf ("** Read error on %d:%d\n", dev, part);
  364. show_boot_progress (-48);
  365. return 1;
  366. }
  367. show_boot_progress (48);
  368. switch (genimg_get_format ((void *)addr)) {
  369. case IMAGE_FORMAT_LEGACY:
  370. hdr = (image_header_t *)addr;
  371. show_boot_progress (49);
  372. if (!image_check_hcrc (hdr)) {
  373. puts ("\n** Bad Header Checksum **\n");
  374. show_boot_progress (-50);
  375. return 1;
  376. }
  377. show_boot_progress (50);
  378. image_print_contents (hdr);
  379. cnt = image_get_image_size (hdr);
  380. break;
  381. #if defined(CONFIG_FIT)
  382. case IMAGE_FORMAT_FIT:
  383. fit_hdr = (const void *)addr;
  384. puts ("Fit image detected...\n");
  385. cnt = fit_get_size (fit_hdr);
  386. break;
  387. #endif
  388. default:
  389. show_boot_progress (-49);
  390. puts ("** Unknown image type\n");
  391. return 1;
  392. }
  393. cnt += info.blksz - 1;
  394. cnt /= info.blksz;
  395. cnt -= 1;
  396. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  397. (ulong *)(addr+info.blksz)) != cnt) {
  398. printf ("** Read error on %d:%d\n", dev, part);
  399. show_boot_progress (-51);
  400. return 1;
  401. }
  402. show_boot_progress (51);
  403. #if defined(CONFIG_FIT)
  404. /* This cannot be done earlier, we need complete FIT image in RAM first */
  405. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  406. if (!fit_check_format (fit_hdr)) {
  407. show_boot_progress (-140);
  408. puts ("** Bad FIT image format\n");
  409. return 1;
  410. }
  411. show_boot_progress (141);
  412. fit_print_contents (fit_hdr);
  413. }
  414. #endif
  415. /* Loading ok, update default load address */
  416. load_addr = addr;
  417. /* Check if we should attempt an auto-start */
  418. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  419. char *local_args[2];
  420. local_args[0] = argv[0];
  421. local_args[1] = NULL;
  422. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  423. do_bootm (cmdtp, 0, 1, local_args);
  424. rcode = 1;
  425. }
  426. return rcode;
  427. }
  428. /* ------------------------------------------------------------------------- */
  429. void inline
  430. __ide_outb(int dev, int port, unsigned char val)
  431. {
  432. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  433. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  434. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  435. }
  436. void ide_outb (int dev, int port, unsigned char val)
  437. __attribute__((weak, alias("__ide_outb")));
  438. unsigned char inline
  439. __ide_inb(int dev, int port)
  440. {
  441. uchar val;
  442. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  443. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  444. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  445. return val;
  446. }
  447. unsigned char ide_inb(int dev, int port)
  448. __attribute__((weak, alias("__ide_inb")));
  449. #ifdef CONFIG_TUNE_PIO
  450. int inline
  451. __ide_set_piomode(int pio_mode)
  452. {
  453. return 0;
  454. }
  455. int inline ide_set_piomode(int pio_mode)
  456. __attribute__((weak, alias("__ide_set_piomode")));
  457. #endif
  458. void ide_init (void)
  459. {
  460. #ifdef CONFIG_IDE_8xx_DIRECT
  461. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  462. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  463. #endif
  464. unsigned char c;
  465. int i, bus;
  466. #if defined(CONFIG_SC3)
  467. unsigned int ata_reset_time = ATA_RESET_TIME;
  468. #endif
  469. #ifdef CONFIG_IDE_8xx_PCCARD
  470. extern int pcmcia_on (void);
  471. extern int ide_devices_found; /* Initialized in check_ide_device() */
  472. #endif /* CONFIG_IDE_8xx_PCCARD */
  473. #ifdef CONFIG_IDE_PREINIT
  474. extern int ide_preinit (void);
  475. WATCHDOG_RESET();
  476. if (ide_preinit ()) {
  477. puts ("ide_preinit failed\n");
  478. return;
  479. }
  480. #endif /* CONFIG_IDE_PREINIT */
  481. #ifdef CONFIG_IDE_8xx_PCCARD
  482. extern int pcmcia_on (void);
  483. extern int ide_devices_found; /* Initialized in check_ide_device() */
  484. WATCHDOG_RESET();
  485. ide_devices_found = 0;
  486. /* initialize the PCMCIA IDE adapter card */
  487. pcmcia_on();
  488. if (!ide_devices_found)
  489. return;
  490. udelay (1000000); /* 1 s */
  491. #endif /* CONFIG_IDE_8xx_PCCARD */
  492. WATCHDOG_RESET();
  493. #ifdef CONFIG_IDE_8xx_DIRECT
  494. /* Initialize PIO timing tables */
  495. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  496. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  497. gd->bus_clk);
  498. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  499. gd->bus_clk);
  500. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  501. gd->bus_clk);
  502. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  503. " len=%3d ns/%d clk"
  504. " hold=%2d ns/%d clk\n",
  505. i,
  506. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  507. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  508. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  509. }
  510. #endif /* CONFIG_IDE_8xx_DIRECT */
  511. /* Reset the IDE just to be sure.
  512. * Light LED's to show
  513. */
  514. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  515. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  516. #ifdef CONFIG_IDE_8xx_DIRECT
  517. /* PCMCIA / IDE initialization for common mem space */
  518. pcmp->pcmc_pgcrb = 0;
  519. /* start in PIO mode 0 - most relaxed timings */
  520. pio_mode = 0;
  521. set_pcmcia_timing (pio_mode);
  522. #endif /* CONFIG_IDE_8xx_DIRECT */
  523. /*
  524. * Wait for IDE to get ready.
  525. * According to spec, this can take up to 31 seconds!
  526. */
  527. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  528. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  529. #ifdef CONFIG_IDE_8xx_PCCARD
  530. /* Skip non-ide devices from probing */
  531. if ((ide_devices_found & (1 << bus)) == 0) {
  532. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  533. continue;
  534. }
  535. #endif
  536. printf ("Bus %d: ", bus);
  537. ide_bus_ok[bus] = 0;
  538. /* Select device
  539. */
  540. udelay (100000); /* 100 ms */
  541. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  542. udelay (100000); /* 100 ms */
  543. i = 0;
  544. do {
  545. udelay (10000); /* 10 ms */
  546. c = ide_inb (dev, ATA_STATUS);
  547. i++;
  548. #if defined(CONFIG_SC3)
  549. if (i > (ata_reset_time * 100)) {
  550. #else
  551. if (i > (ATA_RESET_TIME * 100)) {
  552. #endif
  553. puts ("** Timeout **\n");
  554. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  555. return;
  556. }
  557. if ((i >= 100) && ((i%100)==0)) {
  558. putc ('.');
  559. }
  560. } while (c & ATA_STAT_BUSY);
  561. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  562. puts ("not available ");
  563. debug ("Status = 0x%02X ", c);
  564. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  565. } else if ((c & ATA_STAT_READY) == 0) {
  566. puts ("not available ");
  567. debug ("Status = 0x%02X ", c);
  568. #endif
  569. } else {
  570. puts ("OK ");
  571. ide_bus_ok[bus] = 1;
  572. }
  573. WATCHDOG_RESET();
  574. }
  575. putc ('\n');
  576. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  577. curr_device = -1;
  578. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  579. #ifdef CONFIG_IDE_LED
  580. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  581. #endif
  582. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  583. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  584. ide_dev_desc[i].dev=i;
  585. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  586. ide_dev_desc[i].blksz=0;
  587. ide_dev_desc[i].lba=0;
  588. ide_dev_desc[i].block_read=ide_read;
  589. if (!ide_bus_ok[IDE_BUS(i)])
  590. continue;
  591. ide_led (led, 1); /* LED on */
  592. ide_ident(&ide_dev_desc[i]);
  593. ide_led (led, 0); /* LED off */
  594. dev_print(&ide_dev_desc[i]);
  595. /* ide_print (i); */
  596. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  597. init_part (&ide_dev_desc[i]); /* initialize partition type */
  598. if (curr_device < 0)
  599. curr_device = i;
  600. }
  601. }
  602. WATCHDOG_RESET();
  603. }
  604. /* ------------------------------------------------------------------------- */
  605. block_dev_desc_t * ide_get_dev(int dev)
  606. {
  607. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  608. }
  609. #ifdef CONFIG_IDE_8xx_DIRECT
  610. static void
  611. set_pcmcia_timing (int pmode)
  612. {
  613. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  614. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  615. ulong timings;
  616. debug ("Set timing for PIO Mode %d\n", pmode);
  617. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  618. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  619. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  620. ;
  621. /* IDE 0
  622. */
  623. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  624. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  625. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  626. | timings
  627. #endif
  628. ;
  629. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  630. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  631. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  632. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  633. | timings
  634. #endif
  635. ;
  636. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  637. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  638. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  639. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  640. | timings
  641. #endif
  642. ;
  643. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  644. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  645. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  646. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  647. | timings
  648. #endif
  649. ;
  650. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  651. /* IDE 1
  652. */
  653. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  654. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  655. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  656. | timings
  657. #endif
  658. ;
  659. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  660. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  661. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  662. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  663. | timings
  664. #endif
  665. ;
  666. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  667. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  668. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  669. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  670. | timings
  671. #endif
  672. ;
  673. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  674. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  675. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  676. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  677. | timings
  678. #endif
  679. ;
  680. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  681. }
  682. #endif /* CONFIG_IDE_8xx_DIRECT */
  683. /* ------------------------------------------------------------------------- */
  684. /* We only need to swap data if we are running on a big endian cpu. */
  685. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  686. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  687. #define input_swap_data(x,y,z) input_data(x,y,z)
  688. #else
  689. static void
  690. input_swap_data(int dev, ulong *sect_buf, int words)
  691. {
  692. #if defined(CONFIG_CPC45)
  693. uchar i;
  694. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  695. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  696. ushort *dbuf = (ushort *)sect_buf;
  697. while (words--) {
  698. for (i=0; i<2; i++) {
  699. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  700. *(uchar *)dbuf = *pbuf_odd;
  701. dbuf+=1;
  702. }
  703. }
  704. #else
  705. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  706. ushort *dbuf = (ushort *)sect_buf;
  707. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  708. while (words--) {
  709. #ifdef __MIPS__
  710. *dbuf++ = swab16p((u16*)pbuf);
  711. *dbuf++ = swab16p((u16*)pbuf);
  712. #elif defined(CONFIG_PCS440EP)
  713. *dbuf++ = *pbuf;
  714. *dbuf++ = *pbuf;
  715. #else
  716. *dbuf++ = ld_le16(pbuf);
  717. *dbuf++ = ld_le16(pbuf);
  718. #endif /* !MIPS */
  719. }
  720. #endif
  721. }
  722. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  723. #if defined(CONFIG_IDE_SWAP_IO)
  724. static void
  725. output_data(int dev, ulong *sect_buf, int words)
  726. {
  727. #if defined(CONFIG_CPC45)
  728. uchar *dbuf;
  729. volatile uchar *pbuf_even;
  730. volatile uchar *pbuf_odd;
  731. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  732. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  733. dbuf = (uchar *)sect_buf;
  734. while (words--) {
  735. EIEIO;
  736. *pbuf_even = *dbuf++;
  737. EIEIO;
  738. *pbuf_odd = *dbuf++;
  739. EIEIO;
  740. *pbuf_even = *dbuf++;
  741. EIEIO;
  742. *pbuf_odd = *dbuf++;
  743. }
  744. #else
  745. ushort *dbuf;
  746. volatile ushort *pbuf;
  747. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  748. dbuf = (ushort *)sect_buf;
  749. while (words--) {
  750. #if defined(CONFIG_PCS440EP)
  751. /* not tested, because CF was write protected */
  752. EIEIO;
  753. *pbuf = ld_le16(dbuf++);
  754. EIEIO;
  755. *pbuf = ld_le16(dbuf++);
  756. #else
  757. EIEIO;
  758. *pbuf = *dbuf++;
  759. EIEIO;
  760. *pbuf = *dbuf++;
  761. #endif
  762. }
  763. #endif
  764. }
  765. #else /* ! CONFIG_IDE_SWAP_IO */
  766. static void
  767. output_data(int dev, ulong *sect_buf, int words)
  768. {
  769. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  770. }
  771. #endif /* CONFIG_IDE_SWAP_IO */
  772. #if defined(CONFIG_IDE_SWAP_IO)
  773. static void
  774. input_data(int dev, ulong *sect_buf, int words)
  775. {
  776. #if defined(CONFIG_CPC45)
  777. uchar *dbuf;
  778. volatile uchar *pbuf_even;
  779. volatile uchar *pbuf_odd;
  780. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  781. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  782. dbuf = (uchar *)sect_buf;
  783. while (words--) {
  784. *dbuf++ = *pbuf_even;
  785. EIEIO;
  786. SYNC;
  787. *dbuf++ = *pbuf_odd;
  788. EIEIO;
  789. SYNC;
  790. *dbuf++ = *pbuf_even;
  791. EIEIO;
  792. SYNC;
  793. *dbuf++ = *pbuf_odd;
  794. EIEIO;
  795. SYNC;
  796. }
  797. #else
  798. ushort *dbuf;
  799. volatile ushort *pbuf;
  800. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  801. dbuf = (ushort *)sect_buf;
  802. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  803. while (words--) {
  804. #if defined(CONFIG_PCS440EP)
  805. EIEIO;
  806. *dbuf++ = ld_le16(pbuf);
  807. EIEIO;
  808. *dbuf++ = ld_le16(pbuf);
  809. #else
  810. EIEIO;
  811. *dbuf++ = *pbuf;
  812. EIEIO;
  813. *dbuf++ = *pbuf;
  814. #endif
  815. }
  816. #endif
  817. }
  818. #else /* ! CONFIG_IDE_SWAP_IO */
  819. static void
  820. input_data(int dev, ulong *sect_buf, int words)
  821. {
  822. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  823. }
  824. #endif /* CONFIG_IDE_SWAP_IO */
  825. /* -------------------------------------------------------------------------
  826. */
  827. static void ide_ident (block_dev_desc_t *dev_desc)
  828. {
  829. ulong iobuf[ATA_SECTORWORDS];
  830. unsigned char c;
  831. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  832. #ifdef CONFIG_ATAPI
  833. int retries = 0;
  834. int do_retry = 0;
  835. #endif
  836. #ifdef CONFIG_TUNE_PIO
  837. int pio_mode;
  838. #endif
  839. #if 0
  840. int mode, cycle_time;
  841. #endif
  842. int device;
  843. device=dev_desc->dev;
  844. printf (" Device %d: ", device);
  845. ide_led (DEVICE_LED(device), 1); /* LED on */
  846. /* Select device
  847. */
  848. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  849. dev_desc->if_type=IF_TYPE_IDE;
  850. #ifdef CONFIG_ATAPI
  851. do_retry = 0;
  852. retries = 0;
  853. /* Warning: This will be tricky to read */
  854. while (retries <= 1) {
  855. /* check signature */
  856. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  857. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  858. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  859. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  860. /* ATAPI Signature found */
  861. dev_desc->if_type=IF_TYPE_ATAPI;
  862. /* Start Ident Command
  863. */
  864. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  865. /*
  866. * Wait for completion - ATAPI devices need more time
  867. * to become ready
  868. */
  869. c = ide_wait (device, ATAPI_TIME_OUT);
  870. } else
  871. #endif
  872. {
  873. /* Start Ident Command
  874. */
  875. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  876. /* Wait for completion
  877. */
  878. c = ide_wait (device, IDE_TIME_OUT);
  879. }
  880. ide_led (DEVICE_LED(device), 0); /* LED off */
  881. if (((c & ATA_STAT_DRQ) == 0) ||
  882. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  883. #ifdef CONFIG_ATAPI
  884. {
  885. /* Need to soft reset the device in case it's an ATAPI... */
  886. debug ("Retrying...\n");
  887. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  888. udelay(100000);
  889. ide_outb (device, ATA_COMMAND, 0x08);
  890. udelay (500000); /* 500 ms */
  891. }
  892. /* Select device
  893. */
  894. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  895. retries++;
  896. #else
  897. return;
  898. #endif
  899. }
  900. #ifdef CONFIG_ATAPI
  901. else
  902. break;
  903. } /* see above - ugly to read */
  904. if (retries == 2) /* Not found */
  905. return;
  906. #endif
  907. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  908. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  909. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  910. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  911. #ifdef __LITTLE_ENDIAN
  912. /*
  913. * firmware revision, model, and serial number have Big Endian Byte
  914. * order in Word. Convert all three to little endian.
  915. *
  916. * See CF+ and CompactFlash Specification Revision 2.0:
  917. * 6.2.1.6: Identify Drive, Table 39 for more details
  918. */
  919. strswab (dev_desc->revision);
  920. strswab (dev_desc->vendor);
  921. strswab (dev_desc->product);
  922. #endif /* __LITTLE_ENDIAN */
  923. if ((iop->config & 0x0080)==0x0080)
  924. dev_desc->removable = 1;
  925. else
  926. dev_desc->removable = 0;
  927. #ifdef CONFIG_TUNE_PIO
  928. /* Mode 0 - 2 only, are directly determined by word 51. */
  929. pio_mode = iop->tPIO;
  930. if (pio_mode > 2) {
  931. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  932. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  933. }
  934. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  935. * shall set bit 1 of word 53 to one and support the fields contained
  936. * in words 64 through 70.
  937. */
  938. if (iop->field_valid & 0x02) {
  939. /* Mode 3 and above are possible. Check in order from slow
  940. * to fast, so we wind up with the highest mode allowed.
  941. */
  942. if (iop->eide_pio_modes & 0x01)
  943. pio_mode = 3;
  944. if (iop->eide_pio_modes & 0x02)
  945. pio_mode = 4;
  946. if (ata_id_is_cfa((u16 *)iop)) {
  947. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  948. pio_mode = 5;
  949. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  950. pio_mode = 6;
  951. }
  952. }
  953. /* System-specific, depends on bus speeds, etc. */
  954. ide_set_piomode(pio_mode);
  955. #endif /* CONFIG_TUNE_PIO */
  956. #if 0
  957. /*
  958. * Drive PIO mode autoselection
  959. */
  960. mode = iop->tPIO;
  961. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  962. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  963. mode = 2;
  964. debug ("Override tPIO -> 2\n");
  965. }
  966. if (iop->field_valid & 2) { /* drive implements ATA2? */
  967. debug ("Drive implements ATA2\n");
  968. if (iop->capability & 8) { /* drive supports use_iordy? */
  969. cycle_time = iop->eide_pio_iordy;
  970. } else {
  971. cycle_time = iop->eide_pio;
  972. }
  973. debug ("cycle time = %d\n", cycle_time);
  974. mode = 4;
  975. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  976. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  977. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  978. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  979. }
  980. printf ("PIO mode to use: PIO %d\n", mode);
  981. #endif /* 0 */
  982. #ifdef CONFIG_ATAPI
  983. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  984. atapi_inquiry(dev_desc);
  985. return;
  986. }
  987. #endif /* CONFIG_ATAPI */
  988. #ifdef __BIG_ENDIAN
  989. /* swap shorts */
  990. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  991. #else /* ! __BIG_ENDIAN */
  992. /*
  993. * do not swap shorts on little endian
  994. *
  995. * See CF+ and CompactFlash Specification Revision 2.0:
  996. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  997. */
  998. dev_desc->lba = iop->lba_capacity;
  999. #endif /* __BIG_ENDIAN */
  1000. #ifdef CONFIG_LBA48
  1001. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1002. dev_desc->lba48 = 1;
  1003. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1004. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1005. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1006. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1007. } else {
  1008. dev_desc->lba48 = 0;
  1009. }
  1010. #endif /* CONFIG_LBA48 */
  1011. /* assuming HD */
  1012. dev_desc->type=DEV_TYPE_HARDDISK;
  1013. dev_desc->blksz=ATA_BLOCKSIZE;
  1014. dev_desc->lun=0; /* just to fill something in... */
  1015. #if 0 /* only used to test the powersaving mode,
  1016. * if enabled, the drive goes after 5 sec
  1017. * in standby mode */
  1018. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1019. c = ide_wait (device, IDE_TIME_OUT);
  1020. ide_outb (device, ATA_SECT_CNT, 1);
  1021. ide_outb (device, ATA_LBA_LOW, 0);
  1022. ide_outb (device, ATA_LBA_MID, 0);
  1023. ide_outb (device, ATA_LBA_HIGH, 0);
  1024. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1025. ide_outb (device, ATA_COMMAND, 0xe3);
  1026. udelay (50);
  1027. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1028. #endif
  1029. }
  1030. /* ------------------------------------------------------------------------- */
  1031. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1032. {
  1033. ulong n = 0;
  1034. unsigned char c;
  1035. unsigned char pwrsave=0; /* power save */
  1036. #ifdef CONFIG_LBA48
  1037. unsigned char lba48 = 0;
  1038. if (blknr & 0x0000fffff0000000ULL) {
  1039. /* more than 28 bits used, use 48bit mode */
  1040. lba48 = 1;
  1041. }
  1042. #endif
  1043. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1044. device, blknr, blkcnt, (ulong)buffer);
  1045. ide_led (DEVICE_LED(device), 1); /* LED on */
  1046. /* Select device
  1047. */
  1048. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1049. c = ide_wait (device, IDE_TIME_OUT);
  1050. if (c & ATA_STAT_BUSY) {
  1051. printf ("IDE read: device %d not ready\n", device);
  1052. goto IDE_READ_E;
  1053. }
  1054. /* first check if the drive is in Powersaving mode, if yes,
  1055. * increase the timeout value */
  1056. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1057. udelay (50);
  1058. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1059. if (c & ATA_STAT_BUSY) {
  1060. printf ("IDE read: device %d not ready\n", device);
  1061. goto IDE_READ_E;
  1062. }
  1063. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1064. printf ("No Powersaving mode %X\n", c);
  1065. } else {
  1066. c = ide_inb(device,ATA_SECT_CNT);
  1067. debug ("Powersaving %02X\n",c);
  1068. if(c==0)
  1069. pwrsave=1;
  1070. }
  1071. while (blkcnt-- > 0) {
  1072. c = ide_wait (device, IDE_TIME_OUT);
  1073. if (c & ATA_STAT_BUSY) {
  1074. printf ("IDE read: device %d not ready\n", device);
  1075. break;
  1076. }
  1077. #ifdef CONFIG_LBA48
  1078. if (lba48) {
  1079. /* write high bits */
  1080. ide_outb (device, ATA_SECT_CNT, 0);
  1081. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1082. #ifdef CONFIG_SYS_64BIT_LBA
  1083. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1084. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1085. #else
  1086. ide_outb (device, ATA_LBA_MID, 0);
  1087. ide_outb (device, ATA_LBA_HIGH, 0);
  1088. #endif
  1089. }
  1090. #endif
  1091. ide_outb (device, ATA_SECT_CNT, 1);
  1092. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1093. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1094. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1095. #ifdef CONFIG_LBA48
  1096. if (lba48) {
  1097. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1098. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1099. } else
  1100. #endif
  1101. {
  1102. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1103. ATA_DEVICE(device) |
  1104. ((blknr >> 24) & 0xF) );
  1105. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1106. }
  1107. udelay (50);
  1108. if(pwrsave) {
  1109. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1110. pwrsave=0;
  1111. } else {
  1112. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1113. }
  1114. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1115. #if defined(CONFIG_SYS_64BIT_LBA)
  1116. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1117. device, blknr, c);
  1118. #else
  1119. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1120. device, (ulong)blknr, c);
  1121. #endif
  1122. break;
  1123. }
  1124. input_data (device, buffer, ATA_SECTORWORDS);
  1125. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1126. ++n;
  1127. ++blknr;
  1128. buffer += ATA_BLOCKSIZE;
  1129. }
  1130. IDE_READ_E:
  1131. ide_led (DEVICE_LED(device), 0); /* LED off */
  1132. return (n);
  1133. }
  1134. /* ------------------------------------------------------------------------- */
  1135. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1136. {
  1137. ulong n = 0;
  1138. unsigned char c;
  1139. #ifdef CONFIG_LBA48
  1140. unsigned char lba48 = 0;
  1141. if (blknr & 0x0000fffff0000000ULL) {
  1142. /* more than 28 bits used, use 48bit mode */
  1143. lba48 = 1;
  1144. }
  1145. #endif
  1146. ide_led (DEVICE_LED(device), 1); /* LED on */
  1147. /* Select device
  1148. */
  1149. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1150. while (blkcnt-- > 0) {
  1151. c = ide_wait (device, IDE_TIME_OUT);
  1152. if (c & ATA_STAT_BUSY) {
  1153. printf ("IDE read: device %d not ready\n", device);
  1154. goto WR_OUT;
  1155. }
  1156. #ifdef CONFIG_LBA48
  1157. if (lba48) {
  1158. /* write high bits */
  1159. ide_outb (device, ATA_SECT_CNT, 0);
  1160. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1161. #ifdef CONFIG_SYS_64BIT_LBA
  1162. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1163. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1164. #else
  1165. ide_outb (device, ATA_LBA_MID, 0);
  1166. ide_outb (device, ATA_LBA_HIGH, 0);
  1167. #endif
  1168. }
  1169. #endif
  1170. ide_outb (device, ATA_SECT_CNT, 1);
  1171. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1172. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1173. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1174. #ifdef CONFIG_LBA48
  1175. if (lba48) {
  1176. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1177. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1178. } else
  1179. #endif
  1180. {
  1181. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1182. ATA_DEVICE(device) |
  1183. ((blknr >> 24) & 0xF) );
  1184. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1185. }
  1186. udelay (50);
  1187. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1188. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1189. #if defined(CONFIG_SYS_64BIT_LBA)
  1190. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1191. device, blknr, c);
  1192. #else
  1193. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1194. device, (ulong)blknr, c);
  1195. #endif
  1196. goto WR_OUT;
  1197. }
  1198. output_data (device, buffer, ATA_SECTORWORDS);
  1199. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1200. ++n;
  1201. ++blknr;
  1202. buffer += ATA_BLOCKSIZE;
  1203. }
  1204. WR_OUT:
  1205. ide_led (DEVICE_LED(device), 0); /* LED off */
  1206. return (n);
  1207. }
  1208. /* ------------------------------------------------------------------------- */
  1209. /*
  1210. * copy src to dest, skipping leading and trailing blanks and null
  1211. * terminate the string
  1212. * "len" is the size of available memory including the terminating '\0'
  1213. */
  1214. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1215. {
  1216. unsigned char *end, *last;
  1217. last = dst;
  1218. end = src + len - 1;
  1219. /* reserve space for '\0' */
  1220. if (len < 2)
  1221. goto OUT;
  1222. /* skip leading white space */
  1223. while ((*src) && (src<end) && (*src==' '))
  1224. ++src;
  1225. /* copy string, omitting trailing white space */
  1226. while ((*src) && (src<end)) {
  1227. *dst++ = *src;
  1228. if (*src++ != ' ')
  1229. last = dst;
  1230. }
  1231. OUT:
  1232. *last = '\0';
  1233. }
  1234. /* ------------------------------------------------------------------------- */
  1235. /*
  1236. * Wait until Busy bit is off, or timeout (in ms)
  1237. * Return last status
  1238. */
  1239. static uchar ide_wait (int dev, ulong t)
  1240. {
  1241. ulong delay = 10 * t; /* poll every 100 us */
  1242. uchar c;
  1243. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1244. udelay (100);
  1245. if (delay-- == 0) {
  1246. break;
  1247. }
  1248. }
  1249. return (c);
  1250. }
  1251. /* ------------------------------------------------------------------------- */
  1252. #ifdef CONFIG_IDE_RESET
  1253. extern void ide_set_reset(int idereset);
  1254. static void ide_reset (void)
  1255. {
  1256. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1257. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1258. #endif
  1259. int i;
  1260. curr_device = -1;
  1261. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1262. ide_bus_ok[i] = 0;
  1263. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1264. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1265. ide_set_reset (1); /* assert reset */
  1266. /* the reset signal shall be asserted for et least 25 us */
  1267. udelay(25);
  1268. WATCHDOG_RESET();
  1269. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1270. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1271. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1272. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1273. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1274. /* wait 500 ms for the voltage to stabilize
  1275. */
  1276. for (i=0; i<500; ++i) {
  1277. udelay (1000);
  1278. }
  1279. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1280. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1281. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1282. /* configure IDE Motor voltage monitor pin as input */
  1283. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1284. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1285. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1286. /* wait up to 1 s for the motor voltage to stabilize
  1287. */
  1288. for (i=0; i<1000; ++i) {
  1289. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1290. break;
  1291. }
  1292. udelay (1000);
  1293. }
  1294. if (i == 1000) { /* Timeout */
  1295. printf ("\nWarning: 5V for IDE Motor missing\n");
  1296. # ifdef CONFIG_STATUS_LED
  1297. # ifdef STATUS_LED_YELLOW
  1298. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1299. # endif
  1300. # ifdef STATUS_LED_GREEN
  1301. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1302. # endif
  1303. # endif /* CONFIG_STATUS_LED */
  1304. }
  1305. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1306. WATCHDOG_RESET();
  1307. /* de-assert RESET signal */
  1308. ide_set_reset(0);
  1309. /* wait 250 ms */
  1310. for (i=0; i<250; ++i) {
  1311. udelay (1000);
  1312. }
  1313. }
  1314. #endif /* CONFIG_IDE_RESET */
  1315. /* ------------------------------------------------------------------------- */
  1316. #if defined(CONFIG_IDE_LED) && \
  1317. !defined(CONFIG_CPC45) && \
  1318. !defined(CONFIG_KUP4K) && \
  1319. !defined(CONFIG_KUP4X)
  1320. static uchar led_buffer = 0; /* Buffer for current LED status */
  1321. static void ide_led (uchar led, uchar status)
  1322. {
  1323. uchar *led_port = LED_PORT;
  1324. if (status) { /* switch LED on */
  1325. led_buffer |= led;
  1326. } else { /* switch LED off */
  1327. led_buffer &= ~led;
  1328. }
  1329. *led_port = led_buffer;
  1330. }
  1331. #endif /* CONFIG_IDE_LED */
  1332. #if defined(CONFIG_OF_IDE_FIXUP)
  1333. int ide_device_present(int dev)
  1334. {
  1335. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1336. return 0;
  1337. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1338. }
  1339. #endif
  1340. /* ------------------------------------------------------------------------- */
  1341. #ifdef CONFIG_ATAPI
  1342. /****************************************************************************
  1343. * ATAPI Support
  1344. */
  1345. #if defined(CONFIG_IDE_SWAP_IO)
  1346. /* since ATAPI may use commands with not 4 bytes alligned length
  1347. * we have our own transfer functions, 2 bytes alligned */
  1348. static void
  1349. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1350. {
  1351. #if defined(CONFIG_CPC45)
  1352. uchar *dbuf;
  1353. volatile uchar *pbuf_even;
  1354. volatile uchar *pbuf_odd;
  1355. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1356. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1357. while (shorts--) {
  1358. EIEIO;
  1359. *pbuf_even = *dbuf++;
  1360. EIEIO;
  1361. *pbuf_odd = *dbuf++;
  1362. }
  1363. #else
  1364. ushort *dbuf;
  1365. volatile ushort *pbuf;
  1366. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1367. dbuf = (ushort *)sect_buf;
  1368. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1369. while (shorts--) {
  1370. EIEIO;
  1371. *pbuf = *dbuf++;
  1372. }
  1373. #endif
  1374. }
  1375. static void
  1376. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1377. {
  1378. #if defined(CONFIG_CPC45)
  1379. uchar *dbuf;
  1380. volatile uchar *pbuf_even;
  1381. volatile uchar *pbuf_odd;
  1382. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1383. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1384. while (shorts--) {
  1385. EIEIO;
  1386. *dbuf++ = *pbuf_even;
  1387. EIEIO;
  1388. *dbuf++ = *pbuf_odd;
  1389. }
  1390. #else
  1391. ushort *dbuf;
  1392. volatile ushort *pbuf;
  1393. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1394. dbuf = (ushort *)sect_buf;
  1395. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1396. while (shorts--) {
  1397. EIEIO;
  1398. *dbuf++ = *pbuf;
  1399. }
  1400. #endif
  1401. }
  1402. #else /* ! CONFIG_IDE_SWAP_IO */
  1403. static void
  1404. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1405. {
  1406. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1407. }
  1408. static void
  1409. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1410. {
  1411. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1412. }
  1413. #endif /* CONFIG_IDE_SWAP_IO */
  1414. /*
  1415. * Wait until (Status & mask) == res, or timeout (in ms)
  1416. * Return last status
  1417. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1418. * and then they set their DRQ Bit
  1419. */
  1420. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1421. {
  1422. ulong delay = 10 * t; /* poll every 100 us */
  1423. uchar c;
  1424. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1425. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1426. /* break if error occurs (doesn't make sense to wait more) */
  1427. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1428. break;
  1429. udelay (100);
  1430. if (delay-- == 0) {
  1431. break;
  1432. }
  1433. }
  1434. return (c);
  1435. }
  1436. /*
  1437. * issue an atapi command
  1438. */
  1439. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1440. {
  1441. unsigned char c,err,mask,res;
  1442. int n;
  1443. ide_led (DEVICE_LED(device), 1); /* LED on */
  1444. /* Select device
  1445. */
  1446. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1447. res = 0;
  1448. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1449. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1450. if ((c & mask) != res) {
  1451. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1452. err=0xFF;
  1453. goto AI_OUT;
  1454. }
  1455. /* write taskfile */
  1456. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1457. ide_outb (device, ATA_SECT_CNT, 0);
  1458. ide_outb (device, ATA_SECT_NUM, 0);
  1459. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1460. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1461. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1462. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1463. udelay (50);
  1464. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1465. res = ATA_STAT_DRQ;
  1466. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1467. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1468. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1469. err=0xFF;
  1470. goto AI_OUT;
  1471. }
  1472. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1473. /* ATAPI Command written wait for completition */
  1474. udelay (5000); /* device must set bsy */
  1475. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1476. /* if no data wait for DRQ = 0 BSY = 0
  1477. * if data wait for DRQ = 1 BSY = 0 */
  1478. res=0;
  1479. if(buflen)
  1480. res = ATA_STAT_DRQ;
  1481. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1482. if ((c & mask) != res ) {
  1483. if (c & ATA_STAT_ERR) {
  1484. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1485. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1486. } else {
  1487. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1488. err=0xFF;
  1489. }
  1490. goto AI_OUT;
  1491. }
  1492. n=ide_inb(device, ATA_CYL_HIGH);
  1493. n<<=8;
  1494. n+=ide_inb(device, ATA_CYL_LOW);
  1495. if(n>buflen) {
  1496. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1497. err=0xff;
  1498. goto AI_OUT;
  1499. }
  1500. if((n==0)&&(buflen<0)) {
  1501. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1502. err=0xff;
  1503. goto AI_OUT;
  1504. }
  1505. if(n!=buflen) {
  1506. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1507. }
  1508. if(n!=0) { /* data transfer */
  1509. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1510. /* we transfer shorts */
  1511. n>>=1;
  1512. /* ok now decide if it is an in or output */
  1513. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1514. debug ("Write to device\n");
  1515. output_data_shorts(device,(unsigned short *)buffer,n);
  1516. } else {
  1517. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1518. input_data_shorts(device,(unsigned short *)buffer,n);
  1519. }
  1520. }
  1521. udelay(5000); /* seems that some CD ROMs need this... */
  1522. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1523. res=0;
  1524. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1525. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1526. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1527. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1528. } else {
  1529. err = 0;
  1530. }
  1531. AI_OUT:
  1532. ide_led (DEVICE_LED(device), 0); /* LED off */
  1533. return (err);
  1534. }
  1535. /*
  1536. * sending the command to atapi_issue. If an status other than good
  1537. * returns, an request_sense will be issued
  1538. */
  1539. #define ATAPI_DRIVE_NOT_READY 100
  1540. #define ATAPI_UNIT_ATTN 10
  1541. unsigned char atapi_issue_autoreq (int device,
  1542. unsigned char* ccb,
  1543. int ccblen,
  1544. unsigned char *buffer,
  1545. int buflen)
  1546. {
  1547. unsigned char sense_data[18],sense_ccb[12];
  1548. unsigned char res,key,asc,ascq;
  1549. int notready,unitattn;
  1550. unitattn=ATAPI_UNIT_ATTN;
  1551. notready=ATAPI_DRIVE_NOT_READY;
  1552. retry:
  1553. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1554. if (res==0)
  1555. return (0); /* Ok */
  1556. if (res==0xFF)
  1557. return (0xFF); /* error */
  1558. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1559. memset(sense_ccb,0,sizeof(sense_ccb));
  1560. memset(sense_data,0,sizeof(sense_data));
  1561. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1562. sense_ccb[4]=18; /* allocation Length */
  1563. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1564. key=(sense_data[2]&0xF);
  1565. asc=(sense_data[12]);
  1566. ascq=(sense_data[13]);
  1567. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1568. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1569. sense_data[0],
  1570. key,
  1571. asc,
  1572. ascq);
  1573. if((key==0))
  1574. return 0; /* ok device ready */
  1575. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1576. if(unitattn-->0) {
  1577. udelay(200*1000);
  1578. goto retry;
  1579. }
  1580. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1581. goto error;
  1582. }
  1583. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1584. if (notready-->0) {
  1585. udelay(200*1000);
  1586. goto retry;
  1587. }
  1588. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1589. goto error;
  1590. }
  1591. if(asc==0x3a) {
  1592. debug ("Media not present\n");
  1593. goto error;
  1594. }
  1595. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1596. error:
  1597. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1598. return (0xFF);
  1599. }
  1600. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1601. {
  1602. unsigned char ccb[12]; /* Command descriptor block */
  1603. unsigned char iobuf[64]; /* temp buf */
  1604. unsigned char c;
  1605. int device;
  1606. device=dev_desc->dev;
  1607. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1608. dev_desc->block_read=atapi_read;
  1609. memset(ccb,0,sizeof(ccb));
  1610. memset(iobuf,0,sizeof(iobuf));
  1611. ccb[0]=ATAPI_CMD_INQUIRY;
  1612. ccb[4]=40; /* allocation Legnth */
  1613. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1614. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1615. if (c!=0)
  1616. return;
  1617. /* copy device ident strings */
  1618. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1619. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1620. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1621. dev_desc->lun=0;
  1622. dev_desc->lba=0;
  1623. dev_desc->blksz=0;
  1624. dev_desc->type=iobuf[0] & 0x1f;
  1625. if ((iobuf[1]&0x80)==0x80)
  1626. dev_desc->removable = 1;
  1627. else
  1628. dev_desc->removable = 0;
  1629. memset(ccb,0,sizeof(ccb));
  1630. memset(iobuf,0,sizeof(iobuf));
  1631. ccb[0]=ATAPI_CMD_START_STOP;
  1632. ccb[4]=0x03; /* start */
  1633. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1634. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1635. if (c!=0)
  1636. return;
  1637. memset(ccb,0,sizeof(ccb));
  1638. memset(iobuf,0,sizeof(iobuf));
  1639. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1640. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1641. if (c!=0)
  1642. return;
  1643. memset(ccb,0,sizeof(ccb));
  1644. memset(iobuf,0,sizeof(iobuf));
  1645. ccb[0]=ATAPI_CMD_READ_CAP;
  1646. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1647. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1648. if (c!=0)
  1649. return;
  1650. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1651. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1652. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1653. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1654. ((unsigned long)iobuf[1]<<16) +
  1655. ((unsigned long)iobuf[2]<< 8) +
  1656. ((unsigned long)iobuf[3]);
  1657. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1658. ((unsigned long)iobuf[5]<<16) +
  1659. ((unsigned long)iobuf[6]<< 8) +
  1660. ((unsigned long)iobuf[7]);
  1661. #ifdef CONFIG_LBA48
  1662. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1663. #endif
  1664. return;
  1665. }
  1666. /*
  1667. * atapi_read:
  1668. * we transfer only one block per command, since the multiple DRQ per
  1669. * command is not yet implemented
  1670. */
  1671. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1672. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1673. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1674. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1675. {
  1676. ulong n = 0;
  1677. unsigned char ccb[12]; /* Command descriptor block */
  1678. ulong cnt;
  1679. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1680. device, blknr, blkcnt, (ulong)buffer);
  1681. do {
  1682. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1683. cnt=ATAPI_READ_MAX_BLOCK;
  1684. } else {
  1685. cnt=blkcnt;
  1686. }
  1687. ccb[0]=ATAPI_CMD_READ_12;
  1688. ccb[1]=0; /* reserved */
  1689. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1690. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1691. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1692. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1693. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1694. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1695. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1696. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1697. ccb[10]=0; /* reserved */
  1698. ccb[11]=0; /* reserved */
  1699. if (atapi_issue_autoreq(device,ccb,12,
  1700. (unsigned char *)buffer,
  1701. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1702. return (n);
  1703. }
  1704. n+=cnt;
  1705. blkcnt-=cnt;
  1706. blknr+=cnt;
  1707. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1708. } while (blkcnt > 0);
  1709. return (n);
  1710. }
  1711. /* ------------------------------------------------------------------------- */
  1712. #endif /* CONFIG_ATAPI */
  1713. U_BOOT_CMD(
  1714. ide, 5, 1, do_ide,
  1715. "IDE sub-system",
  1716. "reset - reset IDE controller\n"
  1717. "ide info - show available IDE devices\n"
  1718. "ide device [dev] - show or set current device\n"
  1719. "ide part [dev] - print partition table of one or all IDE devices\n"
  1720. "ide read addr blk# cnt\n"
  1721. "ide write addr blk# cnt - read/write `cnt'"
  1722. " blocks starting at block `blk#'\n"
  1723. " to/from memory address `addr'"
  1724. );
  1725. U_BOOT_CMD(
  1726. diskboot, 3, 1, do_diskboot,
  1727. "boot from IDE device",
  1728. "loadAddr dev:part"
  1729. );