rs5c372.c 7.0 KB

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  1. /*
  2. * rs5c372.c
  3. *
  4. * Device driver for Ricoh's Real Time Controller RS5C372A.
  5. *
  6. * Copyright (C) 2004 Gary Jennejohn garyj@denx.de
  7. *
  8. * Based in part in ds1307.c -
  9. * (C) Copyright 2001, 2002, 2003
  10. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  11. * Keith Outwater, keith_outwater@mvis.com`
  12. * Steven Scholz, steven.scholz@imc-berlin.de
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. */
  31. #include <common.h>
  32. #include <command.h>
  33. #include <rtc.h>
  34. #include <i2c.h>
  35. #if defined(CONFIG_RTC_RS5C372A) && (CONFIG_COMMANDS & CFG_CMD_DATE)
  36. /*
  37. * Reads are always done starting with register 15, which requires some
  38. * jumping-through-hoops to access the data correctly.
  39. *
  40. * Writes are always done starting with register 0.
  41. */
  42. #define DEBUG 0
  43. #if DEBUG
  44. static unsigned int rtc_debug = DEBUG;
  45. #else
  46. #define rtc_debug 0 /* gcc will remove all the debug code for us */
  47. #endif
  48. #ifndef CFG_I2C_RTC_ADDR
  49. #define CFG_I2C_RTC_ADDR 0x32
  50. #endif
  51. #define RS5C372_RAM_SIZE 0x10
  52. #define RATE_32000HZ 0x80 /* Rate Select 32.000KHz */
  53. #define RATE_32768HZ 0x00 /* Rate Select 32.768KHz */
  54. #define STATUS_XPT 0x10 /* data invalid because voltage was 0 */
  55. #define USE_24HOUR_MODE 0x20
  56. #define TWELVE_HOUR_MODE(n) ((((n) >> 5) & 1) == 0)
  57. #define HOURS_AP(n) (((n) >> 5) & 1)
  58. #define HOURS_12(n) bcd2bin((n) & 0x1F)
  59. #define HOURS_24(n) bcd2bin((n) & 0x3F)
  60. static uchar bin2bcd (unsigned int n);
  61. static unsigned bcd2bin (uchar c);
  62. static int setup_done = 0;
  63. static int
  64. rs5c372_readram(unsigned char *buf, int len)
  65. {
  66. int ret;
  67. ret = i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, len);
  68. if (ret != 0) {
  69. printf("%s: failed to read\n", __FUNCTION__);
  70. return ret;
  71. }
  72. if (buf[0] & STATUS_XPT)
  73. printf("### Warning: RTC lost power\n");
  74. return ret;
  75. }
  76. static void
  77. rs5c372_enable(void)
  78. {
  79. unsigned char buf[RS5C372_RAM_SIZE + 1];
  80. int ret;
  81. /* note that this returns reg. 15 in buf[1] */
  82. ret = rs5c372_readram(&buf[1], RS5C372_RAM_SIZE);
  83. if (ret != 0) {
  84. printf("%s: failed\n", __FUNCTION__);
  85. return;
  86. }
  87. buf[0] = 0;
  88. /* we want to start writing at register 0 so we have to copy the */
  89. /* register contents up one slot */
  90. for (ret = 2; ret < 9; ret++)
  91. buf[ret - 1] = buf[ret];
  92. /* registers 0 to 6 (time values) are not touched */
  93. buf[8] = RATE_32768HZ; /* reg. 7 */
  94. buf[9] = 0; /* reg. 8 */
  95. buf[10] = 0; /* reg. 9 */
  96. buf[11] = 0; /* reg. 10 */
  97. buf[12] = 0; /* reg. 11 */
  98. buf[13] = 0; /* reg. 12 */
  99. buf[14] = 0; /* reg. 13 */
  100. buf[15] = 0; /* reg. 14 */
  101. buf[16] = USE_24HOUR_MODE; /* reg. 15 */
  102. ret = i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, RS5C372_RAM_SIZE+1);
  103. if (ret != 0) {
  104. printf("%s: failed\n", __FUNCTION__);
  105. return;
  106. }
  107. setup_done = 1;
  108. return;
  109. }
  110. static void
  111. rs5c372_convert_to_time(struct rtc_time *dt, unsigned char *buf)
  112. {
  113. /* buf[0] is register 15 */
  114. dt->tm_sec = bcd2bin(buf[1]);
  115. dt->tm_min = bcd2bin(buf[2]);
  116. if (TWELVE_HOUR_MODE(buf[0])) {
  117. dt->tm_hour = HOURS_12(buf[3]);
  118. if (HOURS_AP(buf[3])) /* PM */
  119. dt->tm_hour += 12;
  120. } else /* 24-hour-mode */
  121. dt->tm_hour = HOURS_24(buf[3]);
  122. dt->tm_mday = bcd2bin(buf[5]);
  123. dt->tm_mon = bcd2bin(buf[6]);
  124. dt->tm_year = bcd2bin(buf[7]);
  125. if (dt->tm_year >= 70)
  126. dt->tm_year += 1900;
  127. else
  128. dt->tm_year += 2000;
  129. /* 0 is Sunday */
  130. dt->tm_wday = bcd2bin(buf[4] & 0x07);
  131. dt->tm_yday = 0;
  132. dt->tm_isdst= 0;
  133. if(rtc_debug > 2) {
  134. printf("rs5c372_convert_to_time: year = %d\n", dt->tm_year);
  135. printf("rs5c372_convert_to_time: mon = %d\n", dt->tm_mon);
  136. printf("rs5c372_convert_to_time: mday = %d\n", dt->tm_mday);
  137. printf("rs5c372_convert_to_time: hour = %d\n", dt->tm_hour);
  138. printf("rs5c372_convert_to_time: min = %d\n", dt->tm_min);
  139. printf("rs5c372_convert_to_time: sec = %d\n", dt->tm_sec);
  140. }
  141. }
  142. /*
  143. * Get the current time from the RTC
  144. */
  145. void
  146. rtc_get (struct rtc_time *tmp)
  147. {
  148. unsigned char buf[RS5C372_RAM_SIZE];
  149. int ret;
  150. if (!setup_done)
  151. rs5c372_enable();
  152. if (!setup_done)
  153. return;
  154. memset(buf, 0, sizeof(buf));
  155. /* note that this returns reg. 15 in buf[0] */
  156. ret = rs5c372_readram(buf, RS5C372_RAM_SIZE);
  157. if (ret != 0) {
  158. printf("%s: failed\n", __FUNCTION__);
  159. return;
  160. }
  161. rs5c372_convert_to_time(tmp, buf);
  162. return;
  163. }
  164. /*
  165. * Set the RTC
  166. */
  167. void
  168. rtc_set (struct rtc_time *tmp)
  169. {
  170. unsigned char buf[8], reg15;
  171. int ret;
  172. if (!setup_done)
  173. rs5c372_enable();
  174. if (!setup_done)
  175. return;
  176. if(rtc_debug > 2) {
  177. printf("rtc_set: tm_year = %d\n", tmp->tm_year);
  178. printf("rtc_set: tm_mon = %d\n", tmp->tm_mon);
  179. printf("rtc_set: tm_mday = %d\n", tmp->tm_mday);
  180. printf("rtc_set: tm_hour = %d\n", tmp->tm_hour);
  181. printf("rtc_set: tm_min = %d\n", tmp->tm_min);
  182. printf("rtc_set: tm_sec = %d\n", tmp->tm_sec);
  183. }
  184. memset(buf, 0, sizeof(buf));
  185. /* only read register 15 */
  186. ret = i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 1);
  187. if (ret == 0) {
  188. /* need to save register 15 */
  189. reg15 = buf[0];
  190. buf[0] = 0; /* register address on RS5C372 */
  191. buf[1] = bin2bcd(tmp->tm_sec);
  192. buf[2] = bin2bcd(tmp->tm_min);
  193. /* need to handle 12 hour mode */
  194. if (TWELVE_HOUR_MODE(reg15)) {
  195. if (tmp->tm_hour >= 12) { /* PM */
  196. /* 12 PM is a special case */
  197. if (tmp->tm_hour == 12)
  198. buf[3] = bin2bcd(tmp->tm_hour);
  199. else
  200. buf[3] = bin2bcd(tmp->tm_hour - 12);
  201. buf[3] |= 0x20;
  202. }
  203. } else {
  204. buf[3] = bin2bcd(tmp->tm_hour);
  205. }
  206. buf[4] = bin2bcd(tmp->tm_wday);
  207. buf[5] = bin2bcd(tmp->tm_mday);
  208. buf[6] = bin2bcd(tmp->tm_mon);
  209. if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
  210. printf("WARNING: year should be between 1970 and 2069!\n");
  211. buf[7] = bin2bcd(tmp->tm_year % 100);
  212. ret = i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 8);
  213. if (ret != 0)
  214. printf("rs5c372_set_datetime(), i2c_master_send() returned %d\n",ret);
  215. }
  216. return;
  217. }
  218. /*
  219. * Reset the RTC. We set the date back to 1970-01-01.
  220. */
  221. void
  222. rtc_reset (void)
  223. {
  224. struct rtc_time tmp;
  225. if (!setup_done)
  226. rs5c372_enable();
  227. if (!setup_done)
  228. return;
  229. tmp.tm_year = 1970;
  230. tmp.tm_mon = 1;
  231. /* Jan. 1, 1970 was a Thursday */
  232. tmp.tm_wday= 4;
  233. tmp.tm_mday= 1;
  234. tmp.tm_hour = 0;
  235. tmp.tm_min = 0;
  236. tmp.tm_sec = 0;
  237. rtc_set(&tmp);
  238. printf ("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
  239. tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
  240. tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
  241. return;
  242. }
  243. static unsigned int
  244. bcd2bin (unsigned char n)
  245. {
  246. return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
  247. }
  248. static unsigned char
  249. bin2bcd (unsigned int n)
  250. {
  251. return (((n / 10) << 4) | (n % 10));
  252. }
  253. #endif /* defined(CONFIG_RTC_RS5C372A) && (CONFIG_COMMANDS & CFG_CMD_DATE) */