usb_ohci.c 43 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  6. *
  7. * Note: Much of this code has been derived from Linux 2.4
  8. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  9. * (C) Copyright 2000-2002 David Brownell
  10. *
  11. * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  12. * ebenard@eukrea.com - based on s3c24x0's driver
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /*
  34. * IMPORTANT NOTES
  35. * 1 - you MUST define LITTLEENDIAN in the configuration file for the
  36. * board or this driver will NOT work!
  37. * 2 - this driver is intended for use with USB Mass Storage Devices
  38. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  39. * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  40. * to activate workaround for bug #41 or this driver will NOT work!
  41. */
  42. #include <common.h>
  43. /* #include <pci.h> no PCI on the S3C24X0 */
  44. #ifdef CONFIG_USB_OHCI
  45. #include <asm/arch/hardware.h>
  46. #include <malloc.h>
  47. #include <usb.h>
  48. #include "usb_ohci.h"
  49. /* #define OHCI_USE_NPS /\* force NoPowerSwitching mode *\/ */
  50. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  51. /* For initializing controller (mask in an HCFS mode too) */
  52. #define OHCI_CONTROL_INIT \
  53. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  54. #define readl(a) (*((vu_long *)(a)))
  55. #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  56. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  57. #undef DEBUG
  58. #ifdef DEBUG
  59. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  60. #else
  61. #define dbg(format, arg...) do {} while(0)
  62. #endif /* DEBUG */
  63. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  64. #undef SHOW_INFO
  65. #ifdef SHOW_INFO
  66. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  67. #else
  68. #define info(format, arg...) do {} while(0)
  69. #endif
  70. #define m16_swap(x) swap_16(x)
  71. #define m32_swap(x) swap_32(x)
  72. /* global ohci_t */
  73. static ohci_t gohci;
  74. /* this must be aligned to a 256 byte boundary */
  75. struct ohci_hcca ghcca[1];
  76. /* a pointer to the aligned storage */
  77. struct ohci_hcca *phcca;
  78. /* this allocates EDs for all possible endpoints */
  79. struct ohci_device ohci_dev;
  80. /* urb_priv */
  81. urb_priv_t urb_priv;
  82. /* RHSC flag */
  83. int got_rhsc;
  84. /* device which was disconnected */
  85. struct usb_device *devgone;
  86. /*-------------------------------------------------------------------------*/
  87. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  88. * The erratum (#4) description is incorrect. AMD's workaround waits
  89. * till some bits (mostly reserved) are clear; ok for all revs.
  90. */
  91. #define OHCI_QUIRK_AMD756 0xabcd
  92. #define read_roothub(hc, register, mask) ({ \
  93. u32 temp = readl (&hc->regs->roothub.register); \
  94. if (hc->flags & OHCI_QUIRK_AMD756) \
  95. while (temp & mask) \
  96. temp = readl (&hc->regs->roothub.register); \
  97. temp; })
  98. static u32 roothub_a (struct ohci *hc)
  99. { return read_roothub (hc, a, 0xfc0fe000); }
  100. static inline u32 roothub_b (struct ohci *hc)
  101. { return readl (&hc->regs->roothub.b); }
  102. static inline u32 roothub_status (struct ohci *hc)
  103. { return readl (&hc->regs->roothub.status); }
  104. static u32 roothub_portstatus (struct ohci *hc, int i)
  105. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  106. /* forward declaration */
  107. static int hc_interrupt (void);
  108. static void
  109. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  110. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  111. /*-------------------------------------------------------------------------*
  112. * URB support functions
  113. *-------------------------------------------------------------------------*/
  114. /* free HCD-private data associated with this URB */
  115. static void urb_free_priv (urb_priv_t * urb)
  116. {
  117. int i;
  118. int last;
  119. struct td * td;
  120. last = urb->length - 1;
  121. if (last >= 0) {
  122. for (i = 0; i <= last; i++) {
  123. td = urb->td[i];
  124. if (td) {
  125. td->usb_dev = NULL;
  126. urb->td[i] = NULL;
  127. }
  128. }
  129. }
  130. }
  131. /*-------------------------------------------------------------------------*/
  132. #ifdef DEBUG
  133. static int sohci_get_current_frame_number (struct usb_device * dev);
  134. /* debug| print the main components of an URB
  135. * small: 0) header + data packets 1) just header */
  136. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  137. int transfer_len, struct devrequest * setup, char * str, int small)
  138. {
  139. urb_priv_t * purb = &urb_priv;
  140. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  141. str,
  142. sohci_get_current_frame_number (dev),
  143. usb_pipedevice (pipe),
  144. usb_pipeendpoint (pipe),
  145. usb_pipeout (pipe)? 'O': 'I',
  146. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  147. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  148. purb->actual_length,
  149. transfer_len, dev->status);
  150. #ifdef OHCI_VERBOSE_DEBUG
  151. if (!small) {
  152. int i, len;
  153. if (usb_pipecontrol (pipe)) {
  154. printf (__FILE__ ": cmd(8):");
  155. for (i = 0; i < 8 ; i++)
  156. printf (" %02x", ((__u8 *) setup) [i]);
  157. printf ("\n");
  158. }
  159. if (transfer_len > 0 && buffer) {
  160. printf (__FILE__ ": data(%d/%d):",
  161. purb->actual_length,
  162. transfer_len);
  163. len = usb_pipeout (pipe)?
  164. transfer_len: purb->actual_length;
  165. for (i = 0; i < 16 && i < len; i++)
  166. printf (" %02x", ((__u8 *) buffer) [i]);
  167. printf ("%s\n", i < len? "...": "");
  168. }
  169. }
  170. #endif
  171. }
  172. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  173. void ep_print_int_eds (ohci_t *ohci, char * str) {
  174. int i, j;
  175. __u32 * ed_p;
  176. for (i= 0; i < 32; i++) {
  177. j = 5;
  178. ed_p = &(ohci->hcca->int_table [i]);
  179. if (*ed_p == 0)
  180. continue;
  181. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  182. while (*ed_p != 0 && j--) {
  183. ed_t *ed = (ed_t *)m32_swap(ed_p);
  184. printf (" ed: %4x;", ed->hwINFO);
  185. ed_p = &ed->hwNextED;
  186. }
  187. printf ("\n");
  188. }
  189. }
  190. static void ohci_dump_intr_mask (char *label, __u32 mask)
  191. {
  192. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  193. label,
  194. mask,
  195. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  196. (mask & OHCI_INTR_OC) ? " OC" : "",
  197. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  198. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  199. (mask & OHCI_INTR_UE) ? " UE" : "",
  200. (mask & OHCI_INTR_RD) ? " RD" : "",
  201. (mask & OHCI_INTR_SF) ? " SF" : "",
  202. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  203. (mask & OHCI_INTR_SO) ? " SO" : ""
  204. );
  205. }
  206. static void maybe_print_eds (char *label, __u32 value)
  207. {
  208. ed_t *edp = (ed_t *)value;
  209. if (value) {
  210. dbg ("%s %08x", label, value);
  211. dbg ("%08x", edp->hwINFO);
  212. dbg ("%08x", edp->hwTailP);
  213. dbg ("%08x", edp->hwHeadP);
  214. dbg ("%08x", edp->hwNextED);
  215. }
  216. }
  217. static char * hcfs2string (int state)
  218. {
  219. switch (state) {
  220. case OHCI_USB_RESET: return "reset";
  221. case OHCI_USB_RESUME: return "resume";
  222. case OHCI_USB_OPER: return "operational";
  223. case OHCI_USB_SUSPEND: return "suspend";
  224. }
  225. return "?";
  226. }
  227. /* dump control and status registers */
  228. static void ohci_dump_status (ohci_t *controller)
  229. {
  230. struct ohci_regs *regs = controller->regs;
  231. __u32 temp;
  232. temp = readl (&regs->revision) & 0xff;
  233. if (temp != 0x10)
  234. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  235. temp = readl (&regs->control);
  236. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  237. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  238. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  239. (temp & OHCI_CTRL_IR) ? " IR" : "",
  240. hcfs2string (temp & OHCI_CTRL_HCFS),
  241. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  242. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  243. (temp & OHCI_CTRL_IE) ? " IE" : "",
  244. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  245. temp & OHCI_CTRL_CBSR
  246. );
  247. temp = readl (&regs->cmdstatus);
  248. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  249. (temp & OHCI_SOC) >> 16,
  250. (temp & OHCI_OCR) ? " OCR" : "",
  251. (temp & OHCI_BLF) ? " BLF" : "",
  252. (temp & OHCI_CLF) ? " CLF" : "",
  253. (temp & OHCI_HCR) ? " HCR" : ""
  254. );
  255. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  256. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  257. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  258. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  259. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  260. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  261. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  262. maybe_print_eds ("donehead", readl (&regs->donehead));
  263. }
  264. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  265. {
  266. __u32 temp, ndp, i;
  267. temp = roothub_a (controller);
  268. ndp = (temp & RH_A_NDP);
  269. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  270. ndp = (ndp == 2) ? 1:0;
  271. #endif
  272. #if 0 /* def CONFIG_CPU_MONAHANS */
  273. data_buf [2] = (data_buf [2] == 2) ? 3:0;
  274. #endif
  275. if (verbose) {
  276. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  277. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  278. (temp & RH_A_NOCP) ? " NOCP" : "",
  279. (temp & RH_A_OCPM) ? " OCPM" : "",
  280. (temp & RH_A_DT) ? " DT" : "",
  281. (temp & RH_A_NPS) ? " NPS" : "",
  282. (temp & RH_A_PSM) ? " PSM" : "",
  283. ndp
  284. );
  285. temp = roothub_b (controller);
  286. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  287. temp,
  288. (temp & RH_B_PPCM) >> 16,
  289. (temp & RH_B_DR)
  290. );
  291. temp = roothub_status (controller);
  292. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  293. temp,
  294. (temp & RH_HS_CRWE) ? " CRWE" : "",
  295. (temp & RH_HS_OCIC) ? " OCIC" : "",
  296. (temp & RH_HS_LPSC) ? " LPSC" : "",
  297. (temp & RH_HS_DRWE) ? " DRWE" : "",
  298. (temp & RH_HS_OCI) ? " OCI" : "",
  299. (temp & RH_HS_LPS) ? " LPS" : ""
  300. );
  301. }
  302. for (i = 0; i < ndp; i++) {
  303. temp = roothub_portstatus (controller, i);
  304. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  305. i,
  306. temp,
  307. (temp & RH_PS_PRSC) ? " PRSC" : "",
  308. (temp & RH_PS_OCIC) ? " OCIC" : "",
  309. (temp & RH_PS_PSSC) ? " PSSC" : "",
  310. (temp & RH_PS_PESC) ? " PESC" : "",
  311. (temp & RH_PS_CSC) ? " CSC" : "",
  312. (temp & RH_PS_LSDA) ? " LSDA" : "",
  313. (temp & RH_PS_PPS) ? " PPS" : "",
  314. (temp & RH_PS_PRS) ? " PRS" : "",
  315. (temp & RH_PS_POCI) ? " POCI" : "",
  316. (temp & RH_PS_PSS) ? " PSS" : "",
  317. (temp & RH_PS_PES) ? " PES" : "",
  318. (temp & RH_PS_CCS) ? " CCS" : ""
  319. );
  320. }
  321. }
  322. static void ohci_dump (ohci_t *controller, int verbose)
  323. {
  324. dbg ("OHCI controller usb-%s state", controller->slot_name);
  325. /* dumps some of the state we know about */
  326. ohci_dump_status (controller);
  327. if (verbose)
  328. ep_print_int_eds (controller, "hcca");
  329. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  330. ohci_dump_roothub (controller, 1);
  331. }
  332. #endif /* DEBUG */
  333. /*-------------------------------------------------------------------------*
  334. * Interface functions (URB)
  335. *-------------------------------------------------------------------------*/
  336. /* get a transfer request */
  337. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  338. int transfer_len, struct devrequest *setup, int interval)
  339. {
  340. ohci_t *ohci;
  341. ed_t * ed;
  342. urb_priv_t *purb_priv;
  343. int i, size = 0;
  344. ohci = &gohci;
  345. /* when controller's hung, permit only roothub cleanup attempts
  346. * such as powering down ports */
  347. if (ohci->disabled) {
  348. err("sohci_submit_job: EPIPE");
  349. return -1;
  350. }
  351. /* every endpoint has a ed, locate and fill it */
  352. if (!(ed = ep_add_ed (dev, pipe))) {
  353. err("sohci_submit_job: ENOMEM");
  354. return -1;
  355. }
  356. /* for the private part of the URB we need the number of TDs (size) */
  357. switch (usb_pipetype (pipe)) {
  358. case PIPE_BULK: /* one TD for every 4096 Byte */
  359. size = (transfer_len - 1) / 4096 + 1;
  360. break;
  361. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  362. size = (transfer_len == 0)? 2:
  363. (transfer_len - 1) / 4096 + 3;
  364. break;
  365. }
  366. if (size >= (N_URB_TD - 1)) {
  367. err("need %d TDs, only have %d", size, N_URB_TD);
  368. return -1;
  369. }
  370. purb_priv = &urb_priv;
  371. purb_priv->pipe = pipe;
  372. /* fill the private part of the URB */
  373. purb_priv->length = size;
  374. purb_priv->ed = ed;
  375. purb_priv->actual_length = 0;
  376. /* allocate the TDs */
  377. /* note that td[0] was allocated in ep_add_ed */
  378. for (i = 0; i < size; i++) {
  379. purb_priv->td[i] = td_alloc (dev);
  380. if (!purb_priv->td[i]) {
  381. purb_priv->length = i;
  382. urb_free_priv (purb_priv);
  383. err("sohci_submit_job: ENOMEM");
  384. return -1;
  385. }
  386. }
  387. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  388. urb_free_priv (purb_priv);
  389. err("sohci_submit_job: EINVAL");
  390. return -1;
  391. }
  392. /* link the ed into a chain if is not already */
  393. if (ed->state != ED_OPER)
  394. ep_link (ohci, ed);
  395. /* fill the TDs and link it to the ed */
  396. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  397. return 0;
  398. }
  399. /*-------------------------------------------------------------------------*/
  400. #ifdef DEBUG
  401. /* tell us the current USB frame number */
  402. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  403. {
  404. ohci_t *ohci = &gohci;
  405. return m16_swap (ohci->hcca->frame_no);
  406. }
  407. #endif
  408. /*-------------------------------------------------------------------------*
  409. * ED handling functions
  410. *-------------------------------------------------------------------------*/
  411. /* link an ed into one of the HC chains */
  412. static int ep_link (ohci_t *ohci, ed_t *edi)
  413. {
  414. volatile ed_t *ed = edi;
  415. ed->state = ED_OPER;
  416. switch (ed->type) {
  417. case PIPE_CONTROL:
  418. ed->hwNextED = 0;
  419. if (ohci->ed_controltail == NULL) {
  420. writel (ed, &ohci->regs->ed_controlhead);
  421. } else {
  422. ohci->ed_controltail->hwNextED = m32_swap (ed);
  423. }
  424. ed->ed_prev = ohci->ed_controltail;
  425. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  426. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  427. ohci->hc_control |= OHCI_CTRL_CLE;
  428. writel (ohci->hc_control, &ohci->regs->control);
  429. }
  430. ohci->ed_controltail = edi;
  431. break;
  432. case PIPE_BULK:
  433. ed->hwNextED = 0;
  434. if (ohci->ed_bulktail == NULL) {
  435. writel (ed, &ohci->regs->ed_bulkhead);
  436. } else {
  437. ohci->ed_bulktail->hwNextED = m32_swap (ed);
  438. }
  439. ed->ed_prev = ohci->ed_bulktail;
  440. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  441. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  442. ohci->hc_control |= OHCI_CTRL_BLE;
  443. writel (ohci->hc_control, &ohci->regs->control);
  444. }
  445. ohci->ed_bulktail = edi;
  446. break;
  447. }
  448. return 0;
  449. }
  450. /*-------------------------------------------------------------------------*/
  451. /* unlink an ed from one of the HC chains.
  452. * just the link to the ed is unlinked.
  453. * the link from the ed still points to another operational ed or 0
  454. * so the HC can eventually finish the processing of the unlinked ed */
  455. static int ep_unlink (ohci_t *ohci, ed_t *ed)
  456. {
  457. ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
  458. switch (ed->type) {
  459. case PIPE_CONTROL:
  460. if (ed->ed_prev == NULL) {
  461. if (!ed->hwNextED) {
  462. ohci->hc_control &= ~OHCI_CTRL_CLE;
  463. writel (ohci->hc_control, &ohci->regs->control);
  464. }
  465. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  466. } else {
  467. ed->ed_prev->hwNextED = ed->hwNextED;
  468. }
  469. if (ohci->ed_controltail == ed) {
  470. ohci->ed_controltail = ed->ed_prev;
  471. } else {
  472. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  473. }
  474. break;
  475. case PIPE_BULK:
  476. if (ed->ed_prev == NULL) {
  477. if (!ed->hwNextED) {
  478. ohci->hc_control &= ~OHCI_CTRL_BLE;
  479. writel (ohci->hc_control, &ohci->regs->control);
  480. }
  481. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  482. } else {
  483. ed->ed_prev->hwNextED = ed->hwNextED;
  484. }
  485. if (ohci->ed_bulktail == ed) {
  486. ohci->ed_bulktail = ed->ed_prev;
  487. } else {
  488. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  489. }
  490. break;
  491. }
  492. ed->state = ED_UNLINK;
  493. return 0;
  494. }
  495. /*-------------------------------------------------------------------------*/
  496. /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
  497. * but the USB stack is a little bit stateless so we do it at every transaction
  498. * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
  499. * in all other cases the state is left unchanged
  500. * the ed info fields are setted anyway even though most of them should not change */
  501. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  502. {
  503. td_t *td;
  504. ed_t *ed_ret;
  505. volatile ed_t *ed;
  506. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  507. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  508. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  509. err("ep_add_ed: pending delete");
  510. /* pending delete request */
  511. return NULL;
  512. }
  513. if (ed->state == ED_NEW) {
  514. ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
  515. /* dummy td; end of td list for ed */
  516. td = td_alloc (usb_dev);
  517. ed->hwTailP = m32_swap (td);
  518. ed->hwHeadP = ed->hwTailP;
  519. ed->state = ED_UNLINK;
  520. ed->type = usb_pipetype (pipe);
  521. ohci_dev.ed_cnt++;
  522. }
  523. ed->hwINFO = m32_swap (usb_pipedevice (pipe)
  524. | usb_pipeendpoint (pipe) << 7
  525. | (usb_pipeisoc (pipe)? 0x8000: 0)
  526. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  527. | usb_pipeslow (pipe) << 13
  528. | usb_maxpacket (usb_dev, pipe) << 16);
  529. return ed_ret;
  530. }
  531. /*-------------------------------------------------------------------------*
  532. * TD handling functions
  533. *-------------------------------------------------------------------------*/
  534. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  535. static void td_fill (ohci_t *ohci, unsigned int info,
  536. void *data, int len,
  537. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  538. {
  539. volatile td_t *td, *td_pt;
  540. #ifdef OHCI_FILL_TRACE
  541. int i;
  542. #endif
  543. if (index > urb_priv->length) {
  544. err("index > length");
  545. return;
  546. }
  547. /* use this td as the next dummy */
  548. td_pt = urb_priv->td [index];
  549. td_pt->hwNextTD = 0;
  550. /* fill the old dummy TD */
  551. td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
  552. td->ed = urb_priv->ed;
  553. td->next_dl_td = NULL;
  554. td->index = index;
  555. td->data = (__u32)data;
  556. #ifdef OHCI_FILL_TRACE
  557. if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
  558. for (i = 0; i < len; i++)
  559. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  560. printf("\n");
  561. }
  562. #endif
  563. if (!len)
  564. data = 0;
  565. td->hwINFO = m32_swap (info);
  566. td->hwCBP = m32_swap (data);
  567. if (data)
  568. td->hwBE = m32_swap (data + len - 1);
  569. else
  570. td->hwBE = 0;
  571. td->hwNextTD = m32_swap (td_pt);
  572. td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
  573. /* append to queue */
  574. td->ed->hwTailP = td->hwNextTD;
  575. }
  576. /*-------------------------------------------------------------------------*/
  577. /* prepare all TDs of a transfer */
  578. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  579. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  580. {
  581. ohci_t *ohci = &gohci;
  582. int data_len = transfer_len;
  583. void *data;
  584. int cnt = 0;
  585. __u32 info = 0;
  586. unsigned int toggle = 0;
  587. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  588. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  589. toggle = TD_T_TOGGLE;
  590. } else {
  591. toggle = TD_T_DATA0;
  592. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  593. }
  594. urb->td_cnt = 0;
  595. if (data_len)
  596. data = buffer;
  597. else
  598. data = 0;
  599. switch (usb_pipetype (pipe)) {
  600. case PIPE_BULK:
  601. info = usb_pipeout (pipe)?
  602. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  603. while(data_len > 4096) {
  604. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  605. data += 4096; data_len -= 4096; cnt++;
  606. }
  607. info = usb_pipeout (pipe)?
  608. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  609. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  610. cnt++;
  611. if (!ohci->sleeping)
  612. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  613. break;
  614. case PIPE_CONTROL:
  615. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  616. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  617. if (data_len > 0) {
  618. info = usb_pipeout (pipe)?
  619. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  620. /* NOTE: mishandles transfers >8K, some >4K */
  621. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  622. }
  623. info = usb_pipeout (pipe)?
  624. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  625. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  626. if (!ohci->sleeping)
  627. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  628. break;
  629. }
  630. if (urb->length != cnt)
  631. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  632. }
  633. /*-------------------------------------------------------------------------*
  634. * Done List handling functions
  635. *-------------------------------------------------------------------------*/
  636. /* calculate the transfer length and update the urb */
  637. static void dl_transfer_length(td_t * td)
  638. {
  639. __u32 tdINFO, tdBE, tdCBP;
  640. urb_priv_t *lurb_priv = &urb_priv;
  641. tdINFO = m32_swap (td->hwINFO);
  642. tdBE = m32_swap (td->hwBE);
  643. tdCBP = m32_swap (td->hwCBP);
  644. if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
  645. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  646. if (tdBE != 0) {
  647. if (td->hwCBP == 0)
  648. lurb_priv->actual_length += tdBE - td->data + 1;
  649. else
  650. lurb_priv->actual_length += tdCBP - td->data;
  651. }
  652. }
  653. }
  654. /*-------------------------------------------------------------------------*/
  655. /* replies to the request have to be on a FIFO basis so
  656. * we reverse the reversed done-list */
  657. static td_t * dl_reverse_done_list (ohci_t *ohci)
  658. {
  659. __u32 td_list_hc;
  660. td_t *td_rev = NULL;
  661. td_t *td_list = NULL;
  662. urb_priv_t *lurb_priv = NULL;
  663. td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
  664. ohci->hcca->done_head = 0;
  665. while (td_list_hc) {
  666. td_list = (td_t *)td_list_hc;
  667. if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
  668. lurb_priv = &urb_priv;
  669. dbg(" USB-error/status: %x : %p",
  670. TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
  671. if (td_list->ed->hwHeadP & m32_swap (0x1)) {
  672. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  673. td_list->ed->hwHeadP =
  674. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
  675. (td_list->ed->hwHeadP & m32_swap (0x2));
  676. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  677. } else
  678. td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
  679. }
  680. }
  681. td_list->next_dl_td = td_rev;
  682. td_rev = td_list;
  683. td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
  684. }
  685. return td_list;
  686. }
  687. /*-------------------------------------------------------------------------*/
  688. /* td done list */
  689. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  690. {
  691. td_t *td_list_next = NULL;
  692. ed_t *ed;
  693. int cc = 0;
  694. int stat = 0;
  695. /* urb_t *urb; */
  696. urb_priv_t *lurb_priv;
  697. __u32 tdINFO, edHeadP, edTailP;
  698. while (td_list) {
  699. td_list_next = td_list->next_dl_td;
  700. lurb_priv = &urb_priv;
  701. tdINFO = m32_swap (td_list->hwINFO);
  702. ed = td_list->ed;
  703. dl_transfer_length(td_list);
  704. /* error code of transfer */
  705. cc = TD_CC_GET (tdINFO);
  706. if (cc != 0) {
  707. dbg("ConditionCode %#x", cc);
  708. stat = cc_to_error[cc];
  709. }
  710. if (ed->state != ED_NEW) {
  711. edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
  712. edTailP = m32_swap (ed->hwTailP);
  713. /* unlink eds if they are not busy */
  714. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  715. ep_unlink (ohci, ed);
  716. }
  717. td_list = td_list_next;
  718. }
  719. return stat;
  720. }
  721. /*-------------------------------------------------------------------------*
  722. * Virtual Root Hub
  723. *-------------------------------------------------------------------------*/
  724. /* Device descriptor */
  725. static __u8 root_hub_dev_des[] =
  726. {
  727. 0x12, /* __u8 bLength; */
  728. 0x01, /* __u8 bDescriptorType; Device */
  729. 0x10, /* __u16 bcdUSB; v1.1 */
  730. 0x01,
  731. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  732. 0x00, /* __u8 bDeviceSubClass; */
  733. 0x00, /* __u8 bDeviceProtocol; */
  734. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  735. 0x00, /* __u16 idVendor; */
  736. 0x00,
  737. 0x00, /* __u16 idProduct; */
  738. 0x00,
  739. 0x00, /* __u16 bcdDevice; */
  740. 0x00,
  741. 0x00, /* __u8 iManufacturer; */
  742. 0x01, /* __u8 iProduct; */
  743. 0x00, /* __u8 iSerialNumber; */
  744. 0x01 /* __u8 bNumConfigurations; */
  745. };
  746. /* Configuration descriptor */
  747. static __u8 root_hub_config_des[] =
  748. {
  749. 0x09, /* __u8 bLength; */
  750. 0x02, /* __u8 bDescriptorType; Configuration */
  751. 0x19, /* __u16 wTotalLength; */
  752. 0x00,
  753. 0x01, /* __u8 bNumInterfaces; */
  754. 0x01, /* __u8 bConfigurationValue; */
  755. 0x00, /* __u8 iConfiguration; */
  756. 0x40, /* __u8 bmAttributes;
  757. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  758. 0x00, /* __u8 MaxPower; */
  759. /* interface */
  760. 0x09, /* __u8 if_bLength; */
  761. 0x04, /* __u8 if_bDescriptorType; Interface */
  762. 0x00, /* __u8 if_bInterfaceNumber; */
  763. 0x00, /* __u8 if_bAlternateSetting; */
  764. 0x01, /* __u8 if_bNumEndpoints; */
  765. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  766. 0x00, /* __u8 if_bInterfaceSubClass; */
  767. 0x00, /* __u8 if_bInterfaceProtocol; */
  768. 0x00, /* __u8 if_iInterface; */
  769. /* endpoint */
  770. 0x07, /* __u8 ep_bLength; */
  771. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  772. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  773. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  774. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  775. 0x00,
  776. 0xff /* __u8 ep_bInterval; 255 ms */
  777. };
  778. static unsigned char root_hub_str_index0[] =
  779. {
  780. 0x04, /* __u8 bLength; */
  781. 0x03, /* __u8 bDescriptorType; String-descriptor */
  782. 0x09, /* __u8 lang ID */
  783. 0x04, /* __u8 lang ID */
  784. };
  785. static unsigned char root_hub_str_index1[] =
  786. {
  787. 28, /* __u8 bLength; */
  788. 0x03, /* __u8 bDescriptorType; String-descriptor */
  789. 'O', /* __u8 Unicode */
  790. 0, /* __u8 Unicode */
  791. 'H', /* __u8 Unicode */
  792. 0, /* __u8 Unicode */
  793. 'C', /* __u8 Unicode */
  794. 0, /* __u8 Unicode */
  795. 'I', /* __u8 Unicode */
  796. 0, /* __u8 Unicode */
  797. ' ', /* __u8 Unicode */
  798. 0, /* __u8 Unicode */
  799. 'R', /* __u8 Unicode */
  800. 0, /* __u8 Unicode */
  801. 'o', /* __u8 Unicode */
  802. 0, /* __u8 Unicode */
  803. 'o', /* __u8 Unicode */
  804. 0, /* __u8 Unicode */
  805. 't', /* __u8 Unicode */
  806. 0, /* __u8 Unicode */
  807. ' ', /* __u8 Unicode */
  808. 0, /* __u8 Unicode */
  809. 'H', /* __u8 Unicode */
  810. 0, /* __u8 Unicode */
  811. 'u', /* __u8 Unicode */
  812. 0, /* __u8 Unicode */
  813. 'b', /* __u8 Unicode */
  814. 0, /* __u8 Unicode */
  815. };
  816. /* Hub class-specific descriptor is constructed dynamically */
  817. /*-------------------------------------------------------------------------*/
  818. #define OK(x) len = (x); break
  819. #ifdef DEBUG
  820. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  821. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  822. #else
  823. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  824. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  825. #endif
  826. #define RD_RH_STAT roothub_status(&gohci)
  827. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  828. /* request to virtual root hub */
  829. int rh_check_port_status(ohci_t *controller)
  830. {
  831. __u32 temp, ndp, i;
  832. int res;
  833. res = -1;
  834. temp = roothub_a (controller);
  835. ndp = (temp & RH_A_NDP);
  836. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  837. ndp = (ndp == 2) ? 1:0;
  838. #endif
  839. for (i = 0; i < ndp; i++) {
  840. temp = roothub_portstatus (controller, i);
  841. /* check for a device disconnect */
  842. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  843. (RH_PS_PESC | RH_PS_CSC)) &&
  844. ((temp & RH_PS_CCS) == 0)) {
  845. res = i;
  846. break;
  847. }
  848. }
  849. return res;
  850. }
  851. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  852. void *buffer, int transfer_len, struct devrequest *cmd)
  853. {
  854. void * data = buffer;
  855. int leni = transfer_len;
  856. int len = 0;
  857. int stat = 0;
  858. __u32 datab[4];
  859. __u8 *data_buf = (__u8 *)datab;
  860. __u16 bmRType_bReq;
  861. __u16 wValue;
  862. __u16 wIndex;
  863. __u16 wLength;
  864. #ifdef DEBUG
  865. urb_priv.actual_length = 0;
  866. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  867. #else
  868. wait_ms(1);
  869. #endif
  870. if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
  871. info("Root-Hub submit IRQ: NOT implemented");
  872. return 0;
  873. }
  874. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  875. wValue = m16_swap (cmd->value);
  876. wIndex = m16_swap (cmd->index);
  877. wLength = m16_swap (cmd->length);
  878. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  879. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  880. switch (bmRType_bReq) {
  881. /* Request Destination:
  882. without flags: Device,
  883. RH_INTERFACE: interface,
  884. RH_ENDPOINT: endpoint,
  885. RH_CLASS means HUB here,
  886. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  887. */
  888. case RH_GET_STATUS:
  889. *(__u16 *) data_buf = m16_swap (1); OK (2);
  890. case RH_GET_STATUS | RH_INTERFACE:
  891. *(__u16 *) data_buf = m16_swap (0); OK (2);
  892. case RH_GET_STATUS | RH_ENDPOINT:
  893. *(__u16 *) data_buf = m16_swap (0); OK (2);
  894. case RH_GET_STATUS | RH_CLASS:
  895. *(__u32 *) data_buf = m32_swap (
  896. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  897. OK (4);
  898. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  899. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  900. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  901. switch (wValue) {
  902. case (RH_ENDPOINT_STALL): OK (0);
  903. }
  904. break;
  905. case RH_CLEAR_FEATURE | RH_CLASS:
  906. switch (wValue) {
  907. case RH_C_HUB_LOCAL_POWER:
  908. OK(0);
  909. case (RH_C_HUB_OVER_CURRENT):
  910. WR_RH_STAT(RH_HS_OCIC); OK (0);
  911. }
  912. break;
  913. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  914. switch (wValue) {
  915. case (RH_PORT_ENABLE):
  916. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  917. case (RH_PORT_SUSPEND):
  918. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  919. case (RH_PORT_POWER):
  920. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  921. case (RH_C_PORT_CONNECTION):
  922. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  923. case (RH_C_PORT_ENABLE):
  924. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  925. case (RH_C_PORT_SUSPEND):
  926. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  927. case (RH_C_PORT_OVER_CURRENT):
  928. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  929. case (RH_C_PORT_RESET):
  930. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  931. }
  932. break;
  933. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  934. switch (wValue) {
  935. case (RH_PORT_SUSPEND):
  936. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  937. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  938. if (RD_RH_PORTSTAT & RH_PS_CCS)
  939. WR_RH_PORTSTAT (RH_PS_PRS);
  940. OK (0);
  941. case (RH_PORT_POWER):
  942. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  943. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  944. if (RD_RH_PORTSTAT & RH_PS_CCS)
  945. WR_RH_PORTSTAT (RH_PS_PES );
  946. OK (0);
  947. }
  948. break;
  949. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  950. case RH_GET_DESCRIPTOR:
  951. switch ((wValue & 0xff00) >> 8) {
  952. case (0x01): /* device descriptor */
  953. len = min_t(unsigned int,
  954. leni,
  955. min_t(unsigned int,
  956. sizeof (root_hub_dev_des),
  957. wLength));
  958. data_buf = root_hub_dev_des; OK(len);
  959. case (0x02): /* configuration descriptor */
  960. len = min_t(unsigned int,
  961. leni,
  962. min_t(unsigned int,
  963. sizeof (root_hub_config_des),
  964. wLength));
  965. data_buf = root_hub_config_des; OK(len);
  966. case (0x03): /* string descriptors */
  967. if(wValue==0x0300) {
  968. len = min_t(unsigned int,
  969. leni,
  970. min_t(unsigned int,
  971. sizeof (root_hub_str_index0),
  972. wLength));
  973. data_buf = root_hub_str_index0;
  974. OK(len);
  975. }
  976. if(wValue==0x0301) {
  977. len = min_t(unsigned int,
  978. leni,
  979. min_t(unsigned int,
  980. sizeof (root_hub_str_index1),
  981. wLength));
  982. data_buf = root_hub_str_index1;
  983. OK(len);
  984. }
  985. default:
  986. stat = USB_ST_STALLED;
  987. }
  988. break;
  989. case RH_GET_DESCRIPTOR | RH_CLASS:
  990. {
  991. __u32 temp = roothub_a (&gohci);
  992. data_buf [0] = 9; /* min length; */
  993. data_buf [1] = 0x29;
  994. data_buf [2] = temp & RH_A_NDP;
  995. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  996. data_buf [2] = (data_buf [2] == 2) ? 1:0;
  997. #endif
  998. #if 0 /* def CONFIG_CPU_MONAHANS */
  999. data_buf [2] = (data_buf [2] == 2) ? 3:0;
  1000. #endif
  1001. data_buf [3] = 0;
  1002. if (temp & RH_A_PSM) /* per-port power switching? */
  1003. data_buf [3] |= 0x1;
  1004. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  1005. data_buf [3] |= 0x10;
  1006. #if 1
  1007. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  1008. data_buf [3] |= 0x8;
  1009. #endif
  1010. /* corresponds to data_buf[4-7] */
  1011. datab [1] = 0;
  1012. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  1013. temp = roothub_b (&gohci);
  1014. data_buf [7] = temp & RH_B_DR;
  1015. if (data_buf [2] < 7) {
  1016. data_buf [8] = 0xff;
  1017. } else {
  1018. data_buf [0] += 2;
  1019. data_buf [8] = (temp & RH_B_DR) >> 8;
  1020. data_buf [10] = data_buf [9] = 0xff;
  1021. }
  1022. len = min_t(unsigned int, leni,
  1023. min_t(unsigned int, data_buf [0], wLength));
  1024. OK (len);
  1025. }
  1026. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1027. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1028. default:
  1029. dbg ("unsupported root hub command");
  1030. stat = USB_ST_STALLED;
  1031. }
  1032. #ifdef DEBUG
  1033. ohci_dump_roothub (&gohci, 1);
  1034. #else
  1035. wait_ms(1);
  1036. #endif
  1037. len = min_t(int, len, leni);
  1038. if (data != data_buf)
  1039. memcpy (data, data_buf, len);
  1040. dev->act_len = len;
  1041. dev->status = stat;
  1042. #ifdef DEBUG
  1043. if (transfer_len)
  1044. urb_priv.actual_length = transfer_len;
  1045. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1046. #else
  1047. wait_ms(1);
  1048. #endif
  1049. return stat;
  1050. }
  1051. /*-------------------------------------------------------------------------*/
  1052. /* common code for handling submit messages - used for all but root hub */
  1053. /* accesses. */
  1054. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1055. int transfer_len, struct devrequest *setup, int interval)
  1056. {
  1057. int stat = 0;
  1058. int maxsize = usb_maxpacket(dev, pipe);
  1059. int timeout;
  1060. /* device pulled? Shortcut the action. */
  1061. if (devgone == dev) {
  1062. dev->status = USB_ST_CRC_ERR;
  1063. return 0;
  1064. }
  1065. #ifdef DEBUG
  1066. urb_priv.actual_length = 0;
  1067. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1068. #else
  1069. wait_ms(1);
  1070. #endif
  1071. if (!maxsize) {
  1072. err("submit_common_message: pipesize for pipe %lx is zero",
  1073. pipe);
  1074. return -1;
  1075. }
  1076. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1077. err("sohci_submit_job failed");
  1078. return -1;
  1079. }
  1080. wait_ms(10);
  1081. /* ohci_dump_status(&gohci); */
  1082. /* allow more time for a BULK device to react - some are slow */
  1083. #define BULK_TO 5000 /* timeout in milliseconds */
  1084. if (usb_pipetype (pipe) == PIPE_BULK)
  1085. timeout = BULK_TO;
  1086. else
  1087. timeout = 100;
  1088. /* wait for it to complete */
  1089. for (;;) {
  1090. /* check whether the controller is done */
  1091. stat = hc_interrupt();
  1092. if (stat < 0) {
  1093. stat = USB_ST_CRC_ERR;
  1094. break;
  1095. }
  1096. if (stat >= 0 && stat != 0xff) {
  1097. /* 0xff is returned for an SF-interrupt */
  1098. break;
  1099. }
  1100. if (--timeout) {
  1101. wait_ms(1);
  1102. } else {
  1103. err("CTL:TIMEOUT ");
  1104. stat = USB_ST_CRC_ERR;
  1105. break;
  1106. }
  1107. }
  1108. /* we got an Root Hub Status Change interrupt */
  1109. if (got_rhsc) {
  1110. #ifdef DEBUG
  1111. ohci_dump_roothub (&gohci, 1);
  1112. #endif
  1113. got_rhsc = 0;
  1114. /* abuse timeout */
  1115. timeout = rh_check_port_status(&gohci);
  1116. if (timeout >= 0) {
  1117. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1118. /* the called routine adds 1 to the passed value */
  1119. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1120. #endif
  1121. /*
  1122. * XXX
  1123. * This is potentially dangerous because it assumes
  1124. * that only one device is ever plugged in!
  1125. */
  1126. devgone = dev;
  1127. }
  1128. }
  1129. dev->status = stat;
  1130. dev->act_len = transfer_len;
  1131. #ifdef DEBUG
  1132. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1133. #else
  1134. wait_ms(1);
  1135. #endif
  1136. /* free TDs in urb_priv */
  1137. urb_free_priv (&urb_priv);
  1138. return 0;
  1139. }
  1140. /* submit routines called from usb.c */
  1141. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1142. int transfer_len)
  1143. {
  1144. info("submit_bulk_msg");
  1145. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1146. }
  1147. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1148. int transfer_len, struct devrequest *setup)
  1149. {
  1150. int maxsize = usb_maxpacket(dev, pipe);
  1151. info("submit_control_msg");
  1152. #ifdef DEBUG
  1153. urb_priv.actual_length = 0;
  1154. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1155. #else
  1156. wait_ms(1);
  1157. #endif
  1158. if (!maxsize) {
  1159. err("submit_control_message: pipesize for pipe %lx is zero",
  1160. pipe);
  1161. return -1;
  1162. }
  1163. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1164. gohci.rh.dev = dev;
  1165. /* root hub - redirect */
  1166. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1167. setup);
  1168. }
  1169. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1170. }
  1171. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1172. int transfer_len, int interval)
  1173. {
  1174. info("submit_int_msg");
  1175. return -1;
  1176. }
  1177. /*-------------------------------------------------------------------------*
  1178. * HC functions
  1179. *-------------------------------------------------------------------------*/
  1180. /* reset the HC and BUS */
  1181. static int hc_reset (ohci_t *ohci)
  1182. {
  1183. int timeout = 30;
  1184. int smm_timeout = 50; /* 0,5 sec */
  1185. dbg("%s\n", __FUNCTION__);
  1186. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1187. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1188. info("USB HC TakeOver from SMM");
  1189. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1190. wait_ms (10);
  1191. if (--smm_timeout == 0) {
  1192. err("USB HC TakeOver failed!");
  1193. return -1;
  1194. }
  1195. }
  1196. }
  1197. /* Disable HC interrupts */
  1198. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1199. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
  1200. ohci->slot_name,
  1201. readl(&ohci->regs->control));
  1202. /* Reset USB (needed by some controllers) */
  1203. writel (0, &ohci->regs->control);
  1204. /* HC Reset requires max 10 us delay */
  1205. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1206. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1207. if (--timeout == 0) {
  1208. err("USB HC reset timed out!");
  1209. return -1;
  1210. }
  1211. udelay (1);
  1212. }
  1213. return 0;
  1214. }
  1215. /*-------------------------------------------------------------------------*/
  1216. /* Start an OHCI controller, set the BUS operational
  1217. * enable interrupts
  1218. * connect the virtual root hub */
  1219. static int hc_start (ohci_t * ohci)
  1220. {
  1221. __u32 mask;
  1222. unsigned int fminterval;
  1223. ohci->disabled = 1;
  1224. /* Tell the controller where the control and bulk lists are
  1225. * The lists are empty now. */
  1226. writel (0, &ohci->regs->ed_controlhead);
  1227. writel (0, &ohci->regs->ed_bulkhead);
  1228. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1229. fminterval = 0x2edf;
  1230. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1231. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1232. writel (fminterval, &ohci->regs->fminterval);
  1233. writel (0x628, &ohci->regs->lsthresh);
  1234. /* start controller operations */
  1235. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1236. ohci->disabled = 0;
  1237. writel (ohci->hc_control, &ohci->regs->control);
  1238. /* disable all interrupts */
  1239. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1240. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1241. OHCI_INTR_OC | OHCI_INTR_MIE);
  1242. writel (mask, &ohci->regs->intrdisable);
  1243. /* clear all interrupts */
  1244. mask &= ~OHCI_INTR_MIE;
  1245. writel (mask, &ohci->regs->intrstatus);
  1246. /* Choose the interrupts we care about now - but w/o MIE */
  1247. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1248. writel (mask, &ohci->regs->intrenable);
  1249. #ifdef OHCI_USE_NPS
  1250. /* required for AMD-756 and some Mac platforms */
  1251. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1252. &ohci->regs->roothub.a);
  1253. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1254. #endif /* OHCI_USE_NPS */
  1255. #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
  1256. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1257. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1258. /* connect the virtual root hub */
  1259. ohci->rh.devnum = 0;
  1260. return 0;
  1261. }
  1262. /*-------------------------------------------------------------------------*/
  1263. /* an interrupt happens */
  1264. static int
  1265. hc_interrupt (void)
  1266. {
  1267. ohci_t *ohci = &gohci;
  1268. struct ohci_regs *regs = ohci->regs;
  1269. int ints;
  1270. int stat = -1;
  1271. if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
  1272. ints = OHCI_INTR_WDH;
  1273. } else {
  1274. ints = readl (&regs->intrstatus);
  1275. }
  1276. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1277. if (ints & OHCI_INTR_RHSC) {
  1278. got_rhsc = 1;
  1279. }
  1280. if (ints & OHCI_INTR_UE) {
  1281. ohci->disabled++;
  1282. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1283. ohci->slot_name);
  1284. /* e.g. due to PCI Master/Target Abort */
  1285. #ifdef DEBUG
  1286. ohci_dump (ohci, 1);
  1287. #else
  1288. wait_ms(1);
  1289. #endif
  1290. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1291. /* Make some non-interrupt context restart the controller. */
  1292. /* Count and limit the retries though; either hardware or */
  1293. /* software errors can go forever... */
  1294. hc_reset (ohci);
  1295. return -1;
  1296. }
  1297. if (ints & OHCI_INTR_WDH) {
  1298. wait_ms(1);
  1299. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1300. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1301. writel (OHCI_INTR_WDH, &regs->intrenable);
  1302. }
  1303. if (ints & OHCI_INTR_SO) {
  1304. dbg("USB Schedule overrun\n");
  1305. writel (OHCI_INTR_SO, &regs->intrenable);
  1306. stat = -1;
  1307. }
  1308. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1309. if (ints & OHCI_INTR_SF) {
  1310. unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
  1311. wait_ms(1);
  1312. writel (OHCI_INTR_SF, &regs->intrdisable);
  1313. if (ohci->ed_rm_list[frame] != NULL)
  1314. writel (OHCI_INTR_SF, &regs->intrenable);
  1315. stat = 0xff;
  1316. }
  1317. writel (ints, &regs->intrstatus);
  1318. return stat;
  1319. }
  1320. /*-------------------------------------------------------------------------*/
  1321. /*-------------------------------------------------------------------------*/
  1322. /* De-allocate all resources.. */
  1323. static void hc_release_ohci (ohci_t *ohci)
  1324. {
  1325. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1326. if (!ohci->disabled)
  1327. hc_reset (ohci);
  1328. }
  1329. /*-------------------------------------------------------------------------*/
  1330. /*
  1331. * low level initalisation routine, called from usb.c
  1332. */
  1333. static char ohci_inited = 0;
  1334. int usb_lowlevel_init(void)
  1335. {
  1336. /* do board dependant init */
  1337. if(usb_board_init())
  1338. return -1;
  1339. memset (&gohci, 0, sizeof (ohci_t));
  1340. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1341. /* align the storage */
  1342. if ((__u32)&ghcca[0] & 0xff) {
  1343. err("HCCA not aligned!!");
  1344. return -1;
  1345. }
  1346. phcca = &ghcca[0];
  1347. info("aligned ghcca %p", phcca);
  1348. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1349. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1350. err("EDs not aligned!!");
  1351. return -1;
  1352. }
  1353. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1354. if ((__u32)gtd & 0x7) {
  1355. err("TDs not aligned!!");
  1356. return -1;
  1357. }
  1358. ptd = gtd;
  1359. gohci.hcca = phcca;
  1360. memset (phcca, 0, sizeof (struct ohci_hcca));
  1361. gohci.disabled = 1;
  1362. gohci.sleeping = 0;
  1363. gohci.irq = -1;
  1364. gohci.regs = (struct ohci_regs *)OHCI_REGS_BASE;
  1365. gohci.flags = 0;
  1366. gohci.slot_name = "delta/zylonite";
  1367. if (hc_reset (&gohci) < 0) {
  1368. hc_release_ohci (&gohci);
  1369. err ("can't reset usb-%s", gohci.slot_name);
  1370. /* Initialization failed disable clocks */
  1371. CKENA &= ~(CKENA_2_USBHOST | CKENA_20_UDC);
  1372. return -1;
  1373. }
  1374. /* FIXME this is a second HC reset; why?? */
  1375. /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
  1376. wait_ms(10); */
  1377. if (hc_start (&gohci) < 0) {
  1378. err ("can't start usb-%s", gohci.slot_name);
  1379. hc_release_ohci (&gohci);
  1380. /* Initialization failed */
  1381. CKENA &= ~(CKENA_2_USBHOST | CKENA_20_UDC);
  1382. return -1;
  1383. }
  1384. #ifdef DEBUG
  1385. ohci_dump (&gohci, 1);
  1386. #else
  1387. wait_ms(1);
  1388. #endif
  1389. ohci_inited = 1;
  1390. return 0;
  1391. }
  1392. int usb_lowlevel_stop(void)
  1393. {
  1394. /* this gets called really early - before the controller has */
  1395. /* even been initialized! */
  1396. if (!ohci_inited)
  1397. return 0;
  1398. /* TODO release any interrupts, etc. */
  1399. /* call hc_release_ohci() here ? */
  1400. hc_reset (&gohci);
  1401. /* board dependant cleanup */
  1402. if(usb_board_stop())
  1403. return -1;
  1404. return 0;
  1405. }
  1406. #endif /* CONFIG_USB_OHCI */