lattice.c 8.9 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  4. *
  5. * (C) Copyright 2002
  6. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  7. *
  8. * ispVM functions adapted from Lattice's ispmVMEmbedded code:
  9. * Copyright 2009 Lattice Semiconductor Corp.
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. *
  29. */
  30. #include <common.h>
  31. #include <malloc.h>
  32. #include <fpga.h>
  33. #include <lattice.h>
  34. static lattice_board_specific_func *pfns;
  35. static char *fpga_image;
  36. static unsigned long read_bytes;
  37. static unsigned long bufsize;
  38. static unsigned short expectedCRC;
  39. /*
  40. * External variables and functions declared in ivm_core.c module.
  41. */
  42. extern unsigned short g_usCalculatedCRC;
  43. extern unsigned short g_usDataType;
  44. extern unsigned char *g_pucIntelBuffer;
  45. extern unsigned char *g_pucHeapMemory;
  46. extern unsigned short g_iHeapCounter;
  47. extern unsigned short g_iHEAPSize;
  48. extern unsigned short g_usIntelDataIndex;
  49. extern unsigned short g_usIntelBufferSize;
  50. extern char *const g_szSupportedVersions[];
  51. /*
  52. * ispVMDelay
  53. *
  54. * Users must implement a delay to observe a_usTimeDelay, where
  55. * bit 15 of the a_usTimeDelay defines the unit.
  56. * 1 = milliseconds
  57. * 0 = microseconds
  58. * Example:
  59. * a_usTimeDelay = 0x0001 = 1 microsecond delay.
  60. * a_usTimeDelay = 0x8001 = 1 millisecond delay.
  61. *
  62. * This subroutine is called upon to provide a delay from 1 millisecond to a few
  63. * hundreds milliseconds each time.
  64. * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
  65. * bits integer, this function is restricted to produce a delay to 64000
  66. * micro-seconds or 32000 milli-second maximum. The VME file will never pass on
  67. * to this function a delay time > those maximum number. If it needs more than
  68. * those maximum, the VME file will launch the delay function several times to
  69. * realize a larger delay time cummulatively.
  70. * It is perfectly alright to provide a longer delay than required. It is not
  71. * acceptable if the delay is shorter.
  72. */
  73. void ispVMDelay(unsigned short delay)
  74. {
  75. if (delay & 0x8000)
  76. delay = (delay & ~0x8000) * 1000;
  77. udelay(delay);
  78. }
  79. void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
  80. {
  81. a_ucValue = a_ucValue ? 1 : 0;
  82. switch (a_ucPins) {
  83. case g_ucPinTDI:
  84. pfns->jtag_set_tdi(a_ucValue);
  85. break;
  86. case g_ucPinTCK:
  87. pfns->jtag_set_tck(a_ucValue);
  88. break;
  89. case g_ucPinTMS:
  90. pfns->jtag_set_tms(a_ucValue);
  91. break;
  92. default:
  93. printf("%s: requested unknown pin\n", __func__);
  94. }
  95. }
  96. unsigned char readPort(void)
  97. {
  98. return pfns->jtag_get_tdo();
  99. }
  100. void sclock(void)
  101. {
  102. writePort(g_ucPinTCK, 0x01);
  103. writePort(g_ucPinTCK, 0x00);
  104. }
  105. void calibration(void)
  106. {
  107. /* Apply 2 pulses to TCK. */
  108. writePort(g_ucPinTCK, 0x00);
  109. writePort(g_ucPinTCK, 0x01);
  110. writePort(g_ucPinTCK, 0x00);
  111. writePort(g_ucPinTCK, 0x01);
  112. writePort(g_ucPinTCK, 0x00);
  113. ispVMDelay(0x8001);
  114. /* Apply 2 pulses to TCK. */
  115. writePort(g_ucPinTCK, 0x01);
  116. writePort(g_ucPinTCK, 0x00);
  117. writePort(g_ucPinTCK, 0x01);
  118. writePort(g_ucPinTCK, 0x00);
  119. }
  120. /*
  121. * GetByte
  122. *
  123. * Returns a byte to the caller. The returned byte depends on the
  124. * g_usDataType register. If the HEAP_IN bit is set, then the byte
  125. * is returned from the HEAP. If the LHEAP_IN bit is set, then
  126. * the byte is returned from the intelligent buffer. Otherwise,
  127. * the byte is returned directly from the VME file.
  128. */
  129. unsigned char GetByte(void)
  130. {
  131. unsigned char ucData;
  132. unsigned int block_size = 4 * 1024;
  133. if (g_usDataType & HEAP_IN) {
  134. /*
  135. * Get data from repeat buffer.
  136. */
  137. if (g_iHeapCounter > g_iHEAPSize) {
  138. /*
  139. * Data over-run.
  140. */
  141. return 0xFF;
  142. }
  143. ucData = g_pucHeapMemory[g_iHeapCounter++];
  144. } else if (g_usDataType & LHEAP_IN) {
  145. /*
  146. * Get data from intel buffer.
  147. */
  148. if (g_usIntelDataIndex >= g_usIntelBufferSize) {
  149. return 0xFF;
  150. }
  151. ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
  152. } else {
  153. if (read_bytes == bufsize) {
  154. return 0xFF;
  155. }
  156. ucData = *fpga_image++;
  157. read_bytes++;
  158. if (!(read_bytes % block_size)) {
  159. printf("Downloading FPGA %ld/%ld completed\r",
  160. read_bytes,
  161. bufsize);
  162. }
  163. if (expectedCRC != 0) {
  164. ispVMCalculateCRC32(ucData);
  165. }
  166. }
  167. return ucData;
  168. }
  169. signed char ispVM(void)
  170. {
  171. char szFileVersion[9] = { 0 };
  172. signed char cRetCode = 0;
  173. signed char cIndex = 0;
  174. signed char cVersionIndex = 0;
  175. unsigned char ucReadByte = 0;
  176. unsigned short crc;
  177. g_pucHeapMemory = NULL;
  178. g_iHeapCounter = 0;
  179. g_iHEAPSize = 0;
  180. g_usIntelDataIndex = 0;
  181. g_usIntelBufferSize = 0;
  182. g_usCalculatedCRC = 0;
  183. expectedCRC = 0;
  184. ucReadByte = GetByte();
  185. switch (ucReadByte) {
  186. case FILE_CRC:
  187. crc = (unsigned char)GetByte();
  188. crc <<= 8;
  189. crc |= GetByte();
  190. expectedCRC = crc;
  191. for (cIndex = 0; cIndex < 8; cIndex++)
  192. szFileVersion[cIndex] = GetByte();
  193. break;
  194. default:
  195. szFileVersion[0] = (signed char) ucReadByte;
  196. for (cIndex = 1; cIndex < 8; cIndex++)
  197. szFileVersion[cIndex] = GetByte();
  198. break;
  199. }
  200. /*
  201. *
  202. * Compare the VME file version against the supported version.
  203. *
  204. */
  205. for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
  206. cVersionIndex++) {
  207. for (cIndex = 0; cIndex < 8; cIndex++) {
  208. if (szFileVersion[cIndex] !=
  209. g_szSupportedVersions[cVersionIndex][cIndex]) {
  210. cRetCode = VME_VERSION_FAILURE;
  211. break;
  212. }
  213. cRetCode = 0;
  214. }
  215. if (cRetCode == 0) {
  216. break;
  217. }
  218. }
  219. if (cRetCode < 0) {
  220. return VME_VERSION_FAILURE;
  221. }
  222. printf("VME file checked: starting downloading to FPGA\n");
  223. ispVMStart();
  224. cRetCode = ispVMCode();
  225. ispVMEnd();
  226. ispVMFreeMem();
  227. puts("\n");
  228. if (cRetCode == 0 && expectedCRC != 0 &&
  229. (expectedCRC != g_usCalculatedCRC)) {
  230. printf("Expected CRC: 0x%.4X\n", expectedCRC);
  231. printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
  232. return VME_CRC_FAILURE;
  233. }
  234. return cRetCode;
  235. }
  236. static int lattice_validate(Lattice_desc *desc, const char *fn)
  237. {
  238. int ret_val = FALSE;
  239. if (desc) {
  240. if ((desc->family > min_lattice_type) &&
  241. (desc->family < max_lattice_type)) {
  242. if ((desc->iface > min_lattice_iface_type) &&
  243. (desc->iface < max_lattice_iface_type)) {
  244. if (desc->size) {
  245. ret_val = TRUE;
  246. } else {
  247. printf("%s: NULL part size\n", fn);
  248. }
  249. } else {
  250. printf("%s: Invalid Interface type, %d\n",
  251. fn, desc->iface);
  252. }
  253. } else {
  254. printf("%s: Invalid family type, %d\n",
  255. fn, desc->family);
  256. }
  257. } else {
  258. printf("%s: NULL descriptor!\n", fn);
  259. }
  260. return ret_val;
  261. }
  262. int lattice_load(Lattice_desc *desc, void *buf, size_t bsize)
  263. {
  264. int ret_val = FPGA_FAIL;
  265. if (!lattice_validate(desc, (char *)__func__)) {
  266. printf("%s: Invalid device descriptor\n", __func__);
  267. } else {
  268. pfns = desc->iface_fns;
  269. switch (desc->family) {
  270. case Lattice_XP2:
  271. fpga_image = buf;
  272. read_bytes = 0;
  273. bufsize = bsize;
  274. debug("%s: Launching the Lattice ISPVME Loader:"
  275. " addr 0x%x size 0x%x...\n",
  276. __func__, fpga_image, bufsize);
  277. ret_val = ispVM();
  278. if (ret_val)
  279. printf("%s: error %d downloading FPGA image\n",
  280. __func__, ret_val);
  281. else
  282. puts("FPGA downloaded successfully\n");
  283. break;
  284. default:
  285. printf("%s: Unsupported family type, %d\n",
  286. __func__, desc->family);
  287. }
  288. }
  289. return ret_val;
  290. }
  291. int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize)
  292. {
  293. puts("Dump not supported for Lattice FPGA\n");
  294. return FPGA_FAIL;
  295. }
  296. int lattice_info(Lattice_desc *desc)
  297. {
  298. int ret_val = FPGA_FAIL;
  299. if (lattice_validate(desc, (char *)__func__)) {
  300. printf("Family: \t");
  301. switch (desc->family) {
  302. case Lattice_XP2:
  303. puts("XP2\n");
  304. break;
  305. /* Add new family types here */
  306. default:
  307. printf("Unknown family type, %d\n", desc->family);
  308. }
  309. puts("Interface type:\t");
  310. switch (desc->iface) {
  311. case lattice_jtag_mode:
  312. puts("JTAG Mode\n");
  313. break;
  314. /* Add new interface types here */
  315. default:
  316. printf("Unsupported interface type, %d\n", desc->iface);
  317. }
  318. printf("Device Size: \t%d bytes\n",
  319. desc->size);
  320. if (desc->iface_fns) {
  321. printf("Device Function Table @ 0x%p\n",
  322. desc->iface_fns);
  323. switch (desc->family) {
  324. case Lattice_XP2:
  325. break;
  326. /* Add new family types here */
  327. default:
  328. break;
  329. }
  330. } else {
  331. puts("No Device Function Table.\n");
  332. }
  333. if (desc->desc)
  334. printf("Model: \t%s\n", desc->desc);
  335. ret_val = FPGA_SUCCESS;
  336. } else {
  337. printf("%s: Invalid device descriptor\n", __func__);
  338. }
  339. return ret_val;
  340. }