flash.c 11 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. /* #define DEBUG */
  28. #include <common.h>
  29. #include <environment.h>
  30. #define FLASH_BANK_SIZE 0x1000000 /* 2 x 8 MB */
  31. #define MAIN_SECT_SIZE 0x40000 /* 2 x 128 kB */
  32. flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
  33. #define CMD_READ_ARRAY 0x00FF00FF
  34. #define CMD_IDENTIFY 0x00900090
  35. #define CMD_ERASE_SETUP 0x00200020
  36. #define CMD_ERASE_CONFIRM 0x00D000D0
  37. #define CMD_PROGRAM 0x00400040
  38. #define CMD_RESUME 0x00D000D0
  39. #define CMD_SUSPEND 0x00B000B0
  40. #define CMD_STATUS_READ 0x00700070
  41. #define CMD_STATUS_RESET 0x00500050
  42. #define BIT_BUSY 0x00800080
  43. #define BIT_ERASE_SUSPEND 0x00400040
  44. #define BIT_ERASE_ERROR 0x00200020
  45. #define BIT_PROGRAM_ERROR 0x00100010
  46. #define BIT_VPP_RANGE_ERROR 0x00080008
  47. #define BIT_PROGRAM_SUSPEND 0x00040004
  48. #define BIT_PROTECT_ERROR 0x00020002
  49. #define BIT_UNDEFINED 0x00010001
  50. #define BIT_SEQUENCE_ERROR 0x00300030
  51. #define BIT_TIMEOUT 0x80000000
  52. /*-----------------------------------------------------------------------
  53. */
  54. ulong flash_init (void)
  55. {
  56. int i, j;
  57. ulong size = 0;
  58. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
  59. ulong flashbase = 0;
  60. flash_info[i].flash_id =
  61. (INTEL_MANUFACT & FLASH_VENDMASK) |
  62. (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
  63. flash_info[i].size = FLASH_BANK_SIZE;
  64. flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
  65. memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
  66. if (i == 0)
  67. flashbase = CFG_FLASH_BASE;
  68. else
  69. panic ("configured too many flash banks!\n");
  70. for (j = 0; j < flash_info[i].sector_count; j++) {
  71. flash_info[i].start[j] = flashbase;
  72. /* uniform sector size */
  73. flashbase += MAIN_SECT_SIZE;
  74. }
  75. size += flash_info[i].size;
  76. }
  77. /*
  78. * Protect monitor and environment sectors
  79. */
  80. flash_protect ( FLAG_PROTECT_SET,
  81. CFG_FLASH_BASE,
  82. CFG_FLASH_BASE + monitor_flash_len - 1,
  83. &flash_info[0]);
  84. flash_protect ( FLAG_PROTECT_SET,
  85. CFG_ENV_ADDR,
  86. CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
  87. #ifdef CFG_ENV_ADDR_REDUND
  88. flash_protect ( FLAG_PROTECT_SET,
  89. CFG_ENV_ADDR_REDUND,
  90. CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
  91. &flash_info[0]);
  92. #endif
  93. return size;
  94. }
  95. /*-----------------------------------------------------------------------
  96. */
  97. void flash_print_info (flash_info_t * info)
  98. {
  99. int i;
  100. switch (info->flash_id & FLASH_VENDMASK) {
  101. case (INTEL_MANUFACT & FLASH_VENDMASK):
  102. printf ("Intel: ");
  103. break;
  104. default:
  105. printf ("Unknown Vendor ");
  106. break;
  107. }
  108. switch (info->flash_id & FLASH_TYPEMASK) {
  109. case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
  110. printf ("2x 28F640J3A (64Mbit)\n");
  111. break;
  112. default:
  113. printf ("Unknown Chip Type\n");
  114. goto Done;
  115. break;
  116. }
  117. printf (" Size: %ld MB in %d Sectors\n",
  118. info->size >> 20, info->sector_count);
  119. printf (" Sector Start Addresses:");
  120. for (i = 0; i < info->sector_count; i++) {
  121. if ((i % 5) == 0) {
  122. printf ("\n ");
  123. }
  124. printf (" %08lX%s",
  125. info->start[i],
  126. info->protect[i] ? " (RO)" : " ");
  127. }
  128. printf ("\n");
  129. Done:
  130. }
  131. /*-----------------------------------------------------------------------
  132. */
  133. int flash_error (ulong code)
  134. {
  135. /* Check bit patterns */
  136. /* SR.7=0 is busy, SR.7=1 is ready */
  137. /* all other flags indicate error on 1 */
  138. /* SR.0 is undefined */
  139. /* Timeout is our faked flag */
  140. /* sequence is described in Intel 290644-005 document */
  141. /* check Timeout */
  142. if (code & BIT_TIMEOUT) {
  143. puts ("Timeout\n");
  144. return ERR_TIMOUT;
  145. }
  146. /* check Busy, SR.7 */
  147. if (~code & BIT_BUSY) {
  148. puts ("Busy\n");
  149. return ERR_PROG_ERROR;
  150. }
  151. /* check Vpp low, SR.3 */
  152. if (code & BIT_VPP_RANGE_ERROR) {
  153. puts ("Vpp range error\n");
  154. return ERR_PROG_ERROR;
  155. }
  156. /* check Device Protect Error, SR.1 */
  157. if (code & BIT_PROTECT_ERROR) {
  158. puts ("Device protect error\n");
  159. return ERR_PROG_ERROR;
  160. }
  161. /* check Command Seq Error, SR.4 & SR.5 */
  162. if (code & BIT_SEQUENCE_ERROR) {
  163. puts ("Command seqence error\n");
  164. return ERR_PROG_ERROR;
  165. }
  166. /* check Block Erase Error, SR.5 */
  167. if (code & BIT_ERASE_ERROR) {
  168. puts ("Block erase error\n");
  169. return ERR_PROG_ERROR;
  170. }
  171. /* check Program Error, SR.4 */
  172. if (code & BIT_PROGRAM_ERROR) {
  173. puts ("Program error\n");
  174. return ERR_PROG_ERROR;
  175. }
  176. /* check Block Erase Suspended, SR.6 */
  177. if (code & BIT_ERASE_SUSPEND) {
  178. puts ("Block erase suspended\n");
  179. return ERR_PROG_ERROR;
  180. }
  181. /* check Program Suspended, SR.2 */
  182. if (code & BIT_PROGRAM_SUSPEND) {
  183. puts ("Program suspended\n");
  184. return ERR_PROG_ERROR;
  185. }
  186. /* OK, no error */
  187. return ERR_OK;
  188. }
  189. /*-----------------------------------------------------------------------
  190. */
  191. int flash_erase (flash_info_t * info, int s_first, int s_last)
  192. {
  193. ulong result, result1;
  194. int iflag, prot, sect;
  195. int rc = ERR_OK;
  196. #ifdef USE_920T_MMU
  197. int cflag;
  198. #endif
  199. debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
  200. /* first look for protection bits */
  201. if (info->flash_id == FLASH_UNKNOWN)
  202. return ERR_UNKNOWN_FLASH_TYPE;
  203. if ((s_first < 0) || (s_first > s_last)) {
  204. return ERR_INVAL;
  205. }
  206. if ((info->flash_id & FLASH_VENDMASK) !=
  207. (INTEL_MANUFACT & FLASH_VENDMASK)) {
  208. return ERR_UNKNOWN_FLASH_VENDOR;
  209. }
  210. prot = 0;
  211. for (sect = s_first; sect <= s_last; ++sect) {
  212. if (info->protect[sect]) {
  213. prot++;
  214. }
  215. }
  216. if (prot) {
  217. printf ("- Warning: %d protected sectors will not be erased!\n",
  218. prot);
  219. } else {
  220. printf ("\n");
  221. }
  222. /*
  223. * Disable interrupts which might cause a timeout
  224. * here. Remember that our exception vectors are
  225. * at address 0 in the flash, and we don't want a
  226. * (ticker) exception to happen while the flash
  227. * chip is in programming mode.
  228. */
  229. #ifdef USE_920T_MMU
  230. cflag = dcache_status ();
  231. dcache_disable ();
  232. #endif
  233. iflag = disable_interrupts ();
  234. /* Start erase on unprotected sectors */
  235. for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
  236. debug ("Erasing sector %2d @ %08lX... ",
  237. sect, info->start[sect]);
  238. /* arm simple, non interrupt dependent timer */
  239. reset_timer_masked ();
  240. if (info->protect[sect] == 0) { /* not protected */
  241. vu_long *addr = (vu_long *) (info->start[sect]);
  242. ulong bsR7, bsR7_2, bsR5, bsR5_2;
  243. /* *addr = CMD_STATUS_RESET; */
  244. *addr = CMD_ERASE_SETUP;
  245. *addr = CMD_ERASE_CONFIRM;
  246. /* wait until flash is ready */
  247. do {
  248. /* check timeout */
  249. if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
  250. *addr = CMD_STATUS_RESET;
  251. result = BIT_TIMEOUT;
  252. break;
  253. }
  254. *addr = CMD_STATUS_READ;
  255. result = *addr;
  256. bsR7 = result & (1 << 7);
  257. bsR7_2 = result & (1 << 23);
  258. } while (!bsR7 | !bsR7_2);
  259. *addr = CMD_STATUS_READ;
  260. result1 = *addr;
  261. bsR5 = result1 & (1 << 5);
  262. bsR5_2 = result1 & (1 << 21);
  263. #ifdef SAMSUNG_FLASH_DEBUG
  264. printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
  265. if (bsR5 != 0 && bsR5_2 != 0)
  266. printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
  267. #endif
  268. *addr = CMD_READ_ARRAY;
  269. *addr = CMD_RESUME;
  270. if ((rc = flash_error (result)) != ERR_OK)
  271. goto outahere;
  272. #if 0
  273. printf ("ok.\n");
  274. } else { /* it was protected */
  275. printf ("protected!\n");
  276. #endif
  277. }
  278. }
  279. outahere:
  280. /* allow flash to settle - wait 10 ms */
  281. udelay_masked (10000);
  282. if (iflag)
  283. enable_interrupts ();
  284. #ifdef USE_920T_MMU
  285. if (cflag)
  286. dcache_enable ();
  287. #endif
  288. return rc;
  289. }
  290. /*-----------------------------------------------------------------------
  291. * Copy memory to flash
  292. */
  293. volatile static int write_word (flash_info_t * info, ulong dest,
  294. ulong data)
  295. {
  296. vu_long *addr = (vu_long *) dest;
  297. ulong result;
  298. int rc = ERR_OK;
  299. int iflag;
  300. #ifdef USE_920T_MMU
  301. int cflag;
  302. #endif
  303. /*
  304. * Check if Flash is (sufficiently) erased
  305. */
  306. result = *addr;
  307. if ((result & data) != data)
  308. return ERR_NOT_ERASED;
  309. /*
  310. * Disable interrupts which might cause a timeout
  311. * here. Remember that our exception vectors are
  312. * at address 0 in the flash, and we don't want a
  313. * (ticker) exception to happen while the flash
  314. * chip is in programming mode.
  315. */
  316. #ifdef USE_920T_MMU
  317. cflag = dcache_status ();
  318. dcache_disable ();
  319. #endif
  320. iflag = disable_interrupts ();
  321. /* *addr = CMD_STATUS_RESET; */
  322. *addr = CMD_PROGRAM;
  323. *addr = data;
  324. /* arm simple, non interrupt dependent timer */
  325. reset_timer_masked ();
  326. /* wait until flash is ready */
  327. do {
  328. /* check timeout */
  329. if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
  330. *addr = CMD_SUSPEND;
  331. result = BIT_TIMEOUT;
  332. break;
  333. }
  334. *addr = CMD_STATUS_READ;
  335. result = *addr;
  336. } while (~result & BIT_BUSY);
  337. /* *addr = CMD_READ_ARRAY; */
  338. *addr = CMD_STATUS_READ;
  339. result = *addr;
  340. rc = flash_error (result);
  341. if (iflag)
  342. enable_interrupts ();
  343. #ifdef USE_920T_MMU
  344. if (cflag)
  345. dcache_enable ();
  346. #endif
  347. *addr = CMD_READ_ARRAY;
  348. *addr = CMD_RESUME;
  349. return rc;
  350. }
  351. /*-----------------------------------------------------------------------
  352. * Copy memory to flash.
  353. */
  354. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  355. {
  356. ulong cp, wp, data;
  357. int l;
  358. int i, rc;
  359. wp = (addr & ~3); /* get lower word aligned address */
  360. /*
  361. * handle unaligned start bytes
  362. */
  363. if ((l = addr - wp) != 0) {
  364. data = 0;
  365. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  366. data = (data >> 8) | (*(uchar *) cp << 24);
  367. }
  368. for (; i < 4 && cnt > 0; ++i) {
  369. data = (data >> 8) | (*src++ << 24);
  370. --cnt;
  371. ++cp;
  372. }
  373. for (; cnt == 0 && i < 4; ++i, ++cp) {
  374. data = (data >> 8) | (*(uchar *) cp << 24);
  375. }
  376. if ((rc = write_word (info, wp, data)) != 0) {
  377. return (rc);
  378. }
  379. wp += 4;
  380. }
  381. /*
  382. * handle word aligned part
  383. */
  384. while (cnt >= 4) {
  385. data = *((vu_long *) src);
  386. if ((rc = write_word (info, wp, data)) != 0) {
  387. return (rc);
  388. }
  389. src += 4;
  390. wp += 4;
  391. cnt -= 4;
  392. }
  393. if (cnt == 0) {
  394. return ERR_OK;
  395. }
  396. /*
  397. * handle unaligned tail bytes
  398. */
  399. data = 0;
  400. for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
  401. data = (data >> 8) | (*src++ << 24);
  402. --cnt;
  403. }
  404. for (; i < 4; ++i, ++cp) {
  405. data = (data >> 8) | (*(uchar *) cp << 24);
  406. }
  407. return write_word (info, wp, data);
  408. }