io.h 8.3 KB

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  1. /*
  2. * IO header file
  3. *
  4. * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  5. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __ASM_M68K_IO_H__
  26. #define __ASM_M68K_IO_H__
  27. #include <asm/byteorder.h>
  28. #ifndef _IO_BASE
  29. #define _IO_BASE 0
  30. #endif
  31. #define __raw_readb(addr) (*(volatile u8 *)(addr))
  32. #define __raw_readw(addr) (*(volatile u16 *)(addr))
  33. #define __raw_readl(addr) (*(volatile u32 *)(addr))
  34. #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
  35. #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
  36. #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))
  37. #define readb(addr) in_8((volatile u8 *)(addr))
  38. #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
  39. #if !defined(__BIG_ENDIAN)
  40. #define readw(addr) (*(volatile u16 *) (addr))
  41. #define readl(addr) (*(volatile u32 *) (addr))
  42. #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
  43. #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
  44. #else
  45. #define readw(addr) in_le16((volatile u16 *)(addr))
  46. #define readl(addr) in_le32((volatile u32 *)(addr))
  47. #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
  48. #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
  49. #endif
  50. /*
  51. * The insw/outsw/insl/outsl macros don't do byte-swapping.
  52. * They are only used in practice for transferring buffers which
  53. * are arrays of bytes, and byte-swapping is not appropriate in
  54. * that case. - paulus
  55. */
  56. #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
  57. #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
  58. #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
  59. #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
  60. #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
  61. #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
  62. #define inb(port) in_8((u8 *)((port)+_IO_BASE))
  63. #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
  64. #if !defined(__BIG_ENDIAN)
  65. #define inw(port) in_be16((u16 *)((port)+_IO_BASE))
  66. #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
  67. #define inl(port) in_be32((u32 *)((port)+_IO_BASE))
  68. #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
  69. #else
  70. #define inw(port) in_le16((u16 *)((port)+_IO_BASE))
  71. #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
  72. #define inl(port) in_le32((u32 *)((port)+_IO_BASE))
  73. #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
  74. #endif
  75. #define mb() __asm__ __volatile__ ("" : : : "memory")
  76. extern inline void _insb(volatile u8 * port, void *buf, int ns)
  77. {
  78. u8 *data = (u8 *) buf;
  79. while (ns--)
  80. *data++ = *port;
  81. }
  82. extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
  83. {
  84. u8 *data = (u8 *) buf;
  85. while (ns--)
  86. *port = *data++;
  87. }
  88. extern inline void _insw(volatile u16 * port, void *buf, int ns)
  89. {
  90. u16 *data = (u16 *) buf;
  91. while (ns--)
  92. *data++ = __sw16(*port);
  93. }
  94. extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
  95. {
  96. u16 *data = (u16 *) buf;
  97. while (ns--) {
  98. *port = __sw16(*data);
  99. data++;
  100. }
  101. }
  102. extern inline void _insl(volatile u32 * port, void *buf, int nl)
  103. {
  104. u32 *data = (u32 *) buf;
  105. while (nl--)
  106. *data++ = __sw32(*port);
  107. }
  108. extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
  109. {
  110. u32 *data = (u32 *) buf;
  111. while (nl--) {
  112. *port = __sw32(*data);
  113. data++;
  114. }
  115. }
  116. extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
  117. {
  118. u16 *data = (u16 *) buf;
  119. while (ns--)
  120. *data++ = *port;
  121. }
  122. extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
  123. {
  124. u16 *data = (u16 *) buf;
  125. while (ns--) {
  126. *port = *data++;
  127. }
  128. }
  129. extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
  130. {
  131. u32 *data = (u32 *) buf;
  132. while (nl--)
  133. *data++ = *port;
  134. }
  135. extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
  136. {
  137. u32 *data = (u32 *) buf;
  138. while (nl--) {
  139. *port = *data;
  140. data++;
  141. }
  142. }
  143. /*
  144. * The *_ns versions below don't do byte-swapping.
  145. * Neither do the standard versions now, these are just here
  146. * for older code.
  147. */
  148. #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
  149. #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
  150. #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
  151. #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
  152. #define IO_SPACE_LIMIT ~0
  153. /*
  154. * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
  155. */
  156. extern inline int in_8(volatile u8 * addr)
  157. {
  158. return (int)*addr;
  159. }
  160. extern inline void out_8(volatile u8 * addr, int val)
  161. {
  162. *addr = (u8) val;
  163. }
  164. extern inline int in_le16(volatile u16 * addr)
  165. {
  166. return __sw16(*addr);
  167. }
  168. extern inline int in_be16(volatile u16 * addr)
  169. {
  170. return (*addr & 0xFFFF);
  171. }
  172. extern inline void out_le16(volatile u16 * addr, int val)
  173. {
  174. *addr = __sw16(val);
  175. }
  176. extern inline void out_be16(volatile u16 * addr, int val)
  177. {
  178. *addr = (u16) val;
  179. }
  180. extern inline unsigned in_le32(volatile u32 * addr)
  181. {
  182. return __sw32(*addr);
  183. }
  184. extern inline unsigned in_be32(volatile u32 * addr)
  185. {
  186. return (*addr);
  187. }
  188. extern inline void out_le32(volatile unsigned *addr, int val)
  189. {
  190. *addr = __sw32(val);
  191. }
  192. extern inline void out_be32(volatile unsigned *addr, int val)
  193. {
  194. *addr = val;
  195. }
  196. /* Clear and set bits in one shot. These macros can be used to clear and
  197. * set multiple bits in a register using a single call. These macros can
  198. * also be used to set a multiple-bit bit pattern using a mask, by
  199. * specifying the mask in the 'clear' parameter and the new bit pattern
  200. * in the 'set' parameter.
  201. */
  202. #define clrbits(type, addr, clear) \
  203. out_##type((addr), in_##type(addr) & ~(clear))
  204. #define setbits(type, addr, set) \
  205. out_##type((addr), in_##type(addr) | (set))
  206. #define clrsetbits(type, addr, clear, set) \
  207. out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
  208. #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
  209. #define setbits_be32(addr, set) setbits(be32, addr, set)
  210. #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
  211. #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
  212. #define setbits_le32(addr, set) setbits(le32, addr, set)
  213. #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
  214. #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
  215. #define setbits_be16(addr, set) setbits(be16, addr, set)
  216. #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
  217. #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
  218. #define setbits_le16(addr, set) setbits(le16, addr, set)
  219. #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
  220. #define clrbits_8(addr, clear) clrbits(8, addr, clear)
  221. #define setbits_8(addr, set) setbits(8, addr, set)
  222. #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
  223. static inline void sync(void)
  224. {
  225. /* This sync function is for PowerPC or other architecture instruction
  226. * ColdFire does not have this instruction. Dummy function, added for
  227. * compatibility (CFI driver)
  228. */
  229. }
  230. /*
  231. * Given a physical address and a length, return a virtual address
  232. * that can be used to access the memory range with the caching
  233. * properties specified by "flags".
  234. */
  235. #define MAP_NOCACHE (0)
  236. #define MAP_WRCOMBINE (0)
  237. #define MAP_WRBACK (0)
  238. #define MAP_WRTHROUGH (0)
  239. static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
  240. unsigned long flags)
  241. {
  242. return (void *)paddr;
  243. }
  244. /*
  245. * Take down a mapping set up by map_physmem().
  246. */
  247. static inline void unmap_physmem(void *vaddr, unsigned long flags)
  248. {
  249. }
  250. static inline phys_addr_t virt_to_phys(void * vaddr)
  251. {
  252. return (phys_addr_t)(vaddr);
  253. }
  254. #endif /* __ASM_M68K_IO_H__ */