README 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105
  1. CONTENT:
  2. i2c.h
  3. i2c1.c
  4. i2c2.s
  5. WHAT ARE THESE FILES:
  6. These files contain MPC8240 (Kahlua) I2C
  7. driver routines. The driver routines are not
  8. written for any specific operating system.
  9. They serves the purpose of code sample, and
  10. jump-start for using the MPC8240 I2C unit.
  11. For the reason of correctness of C language
  12. syntax, these files are compiled by Metaware
  13. C compiler and assembler.
  14. ENDIAN NOTATION:
  15. The algorithm is designed for big-endian mode,
  16. software is responsible for byte swapping.
  17. USAGE:
  18. 1. The host system that is running on MPC8240
  19. shall link the files listed here. The memory
  20. location of driver routines shall take into
  21. account of that driver routines need to run
  22. in supervisor mode and they process I2C
  23. interrupt.
  24. 2. The host system is responsible for configuring
  25. the MPC8240 including Embedded Utilities Memory
  26. Block. All I2C driver functions require the
  27. content of Embedded Utilities Memory Block
  28. Base Address Register, EUMBBAR, as the first
  29. parameter.
  30. 3. Before I2C unit of MPC8240 can be used,
  31. initialize I2C unit by calling I2C_Init
  32. with the corresponding parameters.
  33. Note that the I2CFDR register shall be written
  34. once during the initialization. If it is written
  35. in the midst of transers, or after I2C STOPs or
  36. REPEAT STATRs, depending on the data written,
  37. a long reset time may be encountered.
  38. 4. After I2C unit has been successfully initialized,
  39. use the Application level API to send data or
  40. receive data upon the desired mode, Master or
  41. Slave.
  42. 5. If the host system is also using the EPIC unit
  43. on MPC8240, the system can register the
  44. I2C_ISR with the EPIC including other
  45. desired resources.
  46. If the host system does not using the EPIC unit
  47. on MPC8240, I2C_Timer_Event function can
  48. be called for each desired time interval.
  49. In both cases, the host system is free to provide
  50. its own timer event handler and interrupt service
  51. routine.
  52. 6. The I2C driver routines contains a set
  53. of utilities, Set and Get, for host system
  54. to query and modify the desired I2C registers.
  55. 7. It is the host system's responsibility of
  56. queueing the I2C I/O request. The host
  57. system shall check the I2C_ISR return code
  58. for I2C I/O status. If I2C_ISR returns
  59. I2CBUFFEMPTY or I2CBUFFFULL, it means
  60. I2C unit has completed a I/O request
  61. stated by the Application API.
  62. 8. If the host system has more than one master
  63. mode I2C unit I/O requests but doesn't want
  64. to be intervented by being addressed as slave,
  65. the host system can use the master mode
  66. Application API with stop_flag set to 0 in
  67. conjunction with is_cnt flag set to 1.
  68. The first API call sets both stop_flag and
  69. is_cnt to 0, indicating a START condition
  70. shall be generated but when the end of
  71. transaction is reached, do not generate a
  72. STOP condition. Once the host system is
  73. informed that the transaction has been
  74. completed, the next Application API call
  75. shall set is_cnt flag to 1, indicating a
  76. repeated START condition shall be generated.
  77. The last Application API call shall set
  78. stop_flag
  79. to 1.
  80. 9. The I2C_Timer_Event function containes
  81. a user defined function pointer. It
  82. serves the purpose of providing the
  83. host system a way to use its own event
  84. handler instead of the I2C_ISR provided
  85. here.