ixdp425.h 5.7 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * Configuation settings for the IXDP425 board.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. /*
  28. * High Level Configuration Options
  29. * (easy to change)
  30. */
  31. #define CONFIG_IXP425 1 /* This is an IXP425 CPU */
  32. #define CONFIG_IXDP425 1 /* on an IXDP425 Board */
  33. /***************************************************************
  34. * U-boot generic defines start here.
  35. ***************************************************************/
  36. /*
  37. * If we are developing, we might want to start armboot from ram
  38. * so we MUST NOT initialize critical regs like mem-timing ...
  39. */
  40. #define CONFIG_INIT_CRITICAL /* undef for developing */
  41. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  42. /*
  43. * Size of malloc() pool
  44. */
  45. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  46. /* allow to overwrite serial and ethaddr */
  47. #define CONFIG_ENV_OVERWRITE
  48. #define CONFIG_BAUDRATE 115200
  49. #define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
  50. /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  51. /* These are u-boot generic parameters */
  52. #include <cmd_confdefs.h>
  53. #define CONFIG_BOOTDELAY 3
  54. #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
  55. #define CONFIG_NETMASK 255.255.0.0
  56. #define CONFIG_IPADDR 192.168.0.21
  57. #define CONFIG_SERVERIP 192.168.0.250
  58. #define CONFIG_BOOTCOMMAND "bootm 50040000"
  59. #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
  60. #define CONFIG_CMDLINE_TAG
  61. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  62. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  63. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  64. #endif
  65. /*
  66. * Miscellaneous configurable options
  67. */
  68. #define CFG_LONGHELP /* undef to save memory */
  69. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  70. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  71. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  72. #define CFG_MAXARGS 16 /* max number of command args */
  73. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  74. #define CFG_MEMTEST_START 0x00400000 /* memtest works on */
  75. #define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
  76. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  77. #define CFG_LOAD_ADDR 0x00010000 /* default load address */
  78. #define CFG_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
  79. /* valid baudrates */
  80. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  81. /*
  82. * Stack sizes
  83. *
  84. * The stack sizes are set up in start.S using the settings below
  85. */
  86. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  87. #ifdef CONFIG_USE_IRQ
  88. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  89. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  90. #endif
  91. /***************************************************************
  92. * Platform/Board specific defines start here.
  93. ***************************************************************/
  94. /*
  95. * Hardware drivers
  96. */
  97. /*
  98. * select serial console configuration
  99. */
  100. #define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
  101. /*
  102. * Physical Memory Map
  103. */
  104. #define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
  105. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  106. #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
  107. #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
  108. #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
  109. #define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */
  110. #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
  111. #define CFG_DRAM_BASE 0x00000000
  112. #define CFG_DRAM_SIZE 0x01000000
  113. #define CFG_FLASH_BASE PHYS_FLASH_1
  114. /*
  115. * Expansion bus settings
  116. */
  117. #define CFG_EXP_CS0 0xbcd23c42
  118. /*
  119. * SDRAM settings
  120. */
  121. #define CFG_SDR_CONFIG 0xd
  122. #define CFG_SDRAM_REFRESH_CNT 0x81a
  123. /*
  124. * GPIO settings
  125. */
  126. /*
  127. * FLASH and environment organization
  128. */
  129. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  130. #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
  131. /* timeout values are in ticks */
  132. #define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
  133. #define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
  134. /* FIXME */
  135. #define CFG_ENV_IS_IN_FLASH 1
  136. #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
  137. #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
  138. #endif /* __CONFIG_H */