M52277EVB.h 7.1 KB

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  1. /*
  2. * Configuation settings for the Freescale MCF52277 EVB board.
  3. *
  4. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  5. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. /*
  26. * board/config.h - configuration options, board specific
  27. */
  28. #ifndef _M52277EVB_H
  29. #define _M52277EVB_H
  30. /*
  31. * High Level Configuration Options
  32. * (easy to change)
  33. */
  34. #define CONFIG_MCF5227x /* define processor family */
  35. #define CONFIG_M52277 /* define processor type */
  36. #define CONFIG_M52277EVB /* M52277EVB board */
  37. #define CONFIG_MCFUART
  38. #define CFG_UART_PORT (0)
  39. #define CONFIG_BAUDRATE 115200
  40. #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
  41. #undef CONFIG_WATCHDOG
  42. #define CONFIG_TIMESTAMP /* Print image info with timestamp */
  43. /*
  44. * BOOTP options
  45. */
  46. #define CONFIG_BOOTP_BOOTFILESIZE
  47. #define CONFIG_BOOTP_BOOTPATH
  48. #define CONFIG_BOOTP_GATEWAY
  49. #define CONFIG_BOOTP_HOSTNAME
  50. /* Command line configuration */
  51. #include <config_cmd_default.h>
  52. #define CONFIG_CMD_CACHE
  53. #define CONFIG_CMD_DATE
  54. #define CONFIG_CMD_ELF
  55. #define CONFIG_CMD_FLASH
  56. #define CONFIG_CMD_I2C
  57. #define CONFIG_CMD_JFFS2
  58. #define CONFIG_CMD_LOADB
  59. #define CONFIG_CMD_LOADS
  60. #define CONFIG_CMD_MEMORY
  61. #define CONFIG_CMD_MISC
  62. #undef CONFIG_CMD_NET
  63. #define CONFIG_CMD_REGINFO
  64. #undef CONFIG_CMD_USB
  65. #undef CONFIG_CMD_BMP
  66. #define CONFIG_HOSTNAME M52277EVB
  67. #define CONFIG_EXTRA_ENV_SETTINGS \
  68. "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \
  69. "loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \
  70. "u-boot=u-boot.bin\0" \
  71. "load=tftp ${loadaddr) ${u-boot}\0" \
  72. "upd=run load; run prog\0" \
  73. "prog=prot off 0 0x3ffff;" \
  74. "era 0 3ffff;" \
  75. "cp.b ${loadaddr} 0 ${filesize};" \
  76. "save\0" \
  77. ""
  78. #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
  79. /* LCD */
  80. #ifdef CONFIG_CMD_BMP
  81. #define CONFIG_LCD
  82. #define CONFIG_SPLASH_SCREEN
  83. #define CONFIG_LCD_LOGO
  84. #define CONFIG_SHARP_LQ035Q7DH06
  85. #endif
  86. /* USB */
  87. #ifdef CONFIG_CMD_USB
  88. #define CONFIG_USB_EHCI
  89. #define CONFIG_USB_STORAGE
  90. #define CONFIG_DOS_PARTITION
  91. #define CONFIG_MAC_PARTITION
  92. #define CONFIG_ISO_PARTITION
  93. #define CFG_USB_EHCI_REGS_BASE 0xFC0B0000
  94. #define CFG_USB_EHCI_CPU_INIT
  95. #endif
  96. /* Realtime clock */
  97. #define CONFIG_MCFRTC
  98. #undef RTC_DEBUG
  99. #define CFG_RTC_OSCILLATOR (32 * CFG_HZ)
  100. /* Timer */
  101. #define CONFIG_MCFTMR
  102. #undef CONFIG_MCFPIT
  103. /* I2c */
  104. #define CONFIG_FSL_I2C
  105. #define CONFIG_HARD_I2C /* I2C with hardware support */
  106. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  107. #define CFG_I2C_SPEED 80000 /* I2C speed and slave address */
  108. #define CFG_I2C_SLAVE 0x7F
  109. #define CFG_I2C_OFFSET 0x58000
  110. #define CFG_IMMR CFG_MBAR
  111. /* Input, PCI, Flexbus, and VCO */
  112. #define CONFIG_EXTRA_CLOCK
  113. #define CFG_INPUT_CLKSRC 16000000
  114. #define CONFIG_PRAM 512 /* 512 KB */
  115. #define CFG_PROMPT "-> "
  116. #define CFG_LONGHELP /* undef to save memory */
  117. #if defined(CONFIG_CMD_KGDB)
  118. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  119. #else
  120. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  121. #endif
  122. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  123. #define CFG_MAXARGS 16 /* max number of command args */
  124. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  125. #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000)
  126. #define CFG_HZ 1000
  127. #define CFG_MBAR 0xFC000000
  128. /*
  129. * Low Level Configuration Settings
  130. * (address mappings, register initial values, etc.)
  131. * You should know what you are doing if you make changes here.
  132. */
  133. /*-----------------------------------------------------------------------
  134. * Definitions for initial stack pointer and data area (in DPRAM)
  135. */
  136. #define CFG_INIT_RAM_ADDR 0x80000000
  137. #define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
  138. #define CFG_INIT_RAM_CTRL 0x21
  139. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  140. #define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16)
  141. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  142. /*-----------------------------------------------------------------------
  143. * Start addresses for the final memory configuration
  144. * (Set up by the startup code)
  145. * Please note that CFG_SDRAM_BASE _must_ start at 0
  146. */
  147. #define CFG_SDRAM_BASE 0x40000000
  148. #define CFG_SDRAM_SIZE 64 /* SDRAM size in MB */
  149. #define CFG_SDRAM_CFG1 0x43711630
  150. #define CFG_SDRAM_CFG2 0x56670000
  151. #define CFG_SDRAM_CTRL 0xE1092000
  152. #define CFG_SDRAM_EMOD 0x81810000
  153. #define CFG_SDRAM_MODE 0x00CD0000
  154. #define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400
  155. #define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20)
  156. #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
  157. #define CFG_BOOTPARAMS_LEN 64*1024
  158. #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  159. #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
  160. /* Initial Memory map for Linux */
  161. #define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
  162. /* Configuration for environment
  163. * Environment is embedded in u-boot in the second sector of the flash
  164. */
  165. #define CFG_ENV_IS_IN_FLASH 1
  166. #define CONFIG_ENV_OVERWRITE 1
  167. #undef CFG_ENV_IS_EMBEDDED
  168. /*-----------------------------------------------------------------------
  169. * FLASH organization
  170. */
  171. #define CFG_FLASH_BASE CFG_CS0_BASE
  172. #define CFG_FLASH0_BASE CFG_CS0_BASE
  173. #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x8000)
  174. #define CFG_ENV_SECT_SIZE 0x8000
  175. #define CFG_FLASH_CFI
  176. #ifdef CFG_FLASH_CFI
  177. # define CFG_FLASH_CFI_DRIVER 1
  178. # define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */
  179. # define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  180. # define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  181. # define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
  182. # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
  183. # define CFG_FLASH_CHECKSUM
  184. #endif
  185. /*
  186. * This is setting for JFFS2 support in u-boot.
  187. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  188. */
  189. #ifdef CONFIG_CMD_JFFS2
  190. # define CONFIG_JFFS2_DEV "nor0"
  191. # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
  192. # define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x40000)
  193. #endif
  194. /*-----------------------------------------------------------------------
  195. * Cache Configuration
  196. */
  197. #define CFG_CACHELINE_SIZE 16
  198. /*-----------------------------------------------------------------------
  199. * Memory bank definitions
  200. */
  201. /*
  202. * CS0 - NOR Flash
  203. * CS1 - Available
  204. * CS2 - Available
  205. * CS3 - Available
  206. * CS4 - Available
  207. * CS5 - Available
  208. */
  209. #define CFG_CS0_BASE 0x00000000
  210. #define CFG_CS0_MASK 0x00FF0001
  211. #define CFG_CS0_CTRL 0x00001FA0
  212. #endif /* _M52277EVB_H */