ali512x.c 8.7 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Based on sc520cdp.c from rolo 1.6:
  25. *----------------------------------------------------------------------
  26. * (C) Copyright 2000
  27. * Sysgo Real-Time Solutions GmbH
  28. * Klein-Winternheim, Germany
  29. *----------------------------------------------------------------------
  30. */
  31. #include <config.h>
  32. #ifdef CONFIG_ALI152X
  33. #include <common.h>
  34. #include <asm/io.h>
  35. #include <asm/ic/ali512x.h>
  36. /* ALI M5123 Logical device numbers:
  37. * 0 FDC
  38. * 1 unused?
  39. * 2 unused?
  40. * 3 lpt
  41. * 4 UART1
  42. * 5 UART2
  43. * 6 RTC
  44. * 7 mouse/kbd
  45. * 8 CIO
  46. */
  47. /*
  48. ************************************************************
  49. * Some access primitives for the ALi chip: *
  50. ************************************************************
  51. */
  52. static void ali_write(u8 index, u8 value)
  53. {
  54. /* write an arbirary register */
  55. outb(index, ALI_INDEX);
  56. outb(value, ALI_DATA);
  57. }
  58. #if 0
  59. static int ali_read(u8 index)
  60. {
  61. outb(index, ALI_INDEX);
  62. return inb(ALI_DATA);
  63. }
  64. #endif
  65. #define ALI_OPEN() \
  66. outb(0x51, ALI_INDEX); \
  67. outb(0x23, ALI_INDEX)
  68. #define ALI_CLOSE() \
  69. outb(0xbb, ALI_INDEX)
  70. /* Select a logical device */
  71. #define ALI_SELDEV(dev) \
  72. ali_write(0x07, dev)
  73. void ali512x_init(void)
  74. {
  75. ALI_OPEN();
  76. ali_write(0x02, 0x01); /* soft reset */
  77. ali_write(0x03, 0x03); /* disable access to CIOs */
  78. ali_write(0x22, 0x00); /* disable direct powerdown */
  79. ali_write(0x23, 0x00); /* disable auto powerdown */
  80. ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
  81. ALI_CLOSE();
  82. }
  83. void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
  84. {
  85. ALI_OPEN();
  86. ALI_SELDEV(0);
  87. ali_write(0x30, enabled?1:0);
  88. if (enabled) {
  89. ali_write(0x60, io >> 8);
  90. ali_write(0x61, io & 0xff);
  91. ali_write(0x70, irq);
  92. ali_write(0x74, dma_channel);
  93. /* AT mode, no drive swap */
  94. ali_write(0xf0, 0x08);
  95. ali_write(0xf1, 0x00);
  96. ali_write(0xf2, 0xff);
  97. ali_write(0xf4, 0x00);
  98. }
  99. ALI_CLOSE();
  100. }
  101. void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
  102. {
  103. ALI_OPEN();
  104. ALI_SELDEV(3);
  105. ali_write(0x30, enabled?1:0);
  106. if (enabled) {
  107. ali_write(0x60, io >> 8);
  108. ali_write(0x61, io & 0xff);
  109. ali_write(0x70, irq);
  110. ali_write(0x74, dma_channel);
  111. /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
  112. ali_write(0xf0, 0xbc);
  113. /* 12 MHz, Burst DMA in ECP */
  114. ali_write(0xf1, 0x05);
  115. }
  116. ALI_CLOSE();
  117. }
  118. void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
  119. {
  120. ALI_OPEN();
  121. ALI_SELDEV(index?5:4);
  122. ali_write(0x30, enabled?1:0);
  123. if (enabled) {
  124. ali_write(0x60, io >> 8);
  125. ali_write(0x61, io & 0xff);
  126. ali_write(0x70, irq);
  127. ali_write(0xf0, 0x00);
  128. ali_write(0xf1, 0x00);
  129. /* huh? write 0xf2 twice - a typo in rolo
  130. * or some secret ali errata? Who knows?
  131. */
  132. if (index) {
  133. ali_write(0xf2, 0x00);
  134. }
  135. ali_write(0xf2, 0x0c);
  136. }
  137. ALI_CLOSE();
  138. }
  139. void ali512x_set_uart2_irda(int enabled)
  140. {
  141. ALI_OPEN();
  142. ALI_SELDEV(5);
  143. ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
  144. ALI_CLOSE();
  145. }
  146. void ali512x_set_rtc(int enabled, u16 io, u8 irq)
  147. {
  148. ALI_OPEN();
  149. ALI_SELDEV(6);
  150. ali_write(0x30, enabled?1:0);
  151. if (enabled) {
  152. ali_write(0x60, io >> 8);
  153. ali_write(0x61, io & 0xff);
  154. ali_write(0x70, irq);
  155. ali_write(0xf0, 0x00);
  156. }
  157. ALI_CLOSE();
  158. }
  159. void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
  160. {
  161. ALI_OPEN();
  162. ALI_SELDEV(7);
  163. ali_write(0x30, enabled?1:0);
  164. if (enabled) {
  165. ali_write(0x70, kbc_irq);
  166. ali_write(0x72, mouse_irq);
  167. ali_write(0xf0, 0x00);
  168. }
  169. ALI_CLOSE();
  170. }
  171. /* Common I/O
  172. *
  173. * (This descripotsion is base on several incompete sources
  174. * since I have not been able to obtain any datasheet for the device
  175. * there may be some mis-understandings burried in here.
  176. * -- Daniel daniel@omicron.se)
  177. *
  178. * There are 22 CIO pins numbered
  179. * 10-17
  180. * 20-25
  181. * 30-37
  182. *
  183. * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
  184. * other functions.
  185. *
  186. * Secondary
  187. * CIO Pin Function Decription
  188. * =======================================================
  189. * CIO10 IRQIN1 Interrupt input 1?
  190. * CIO11 IRQIN2 Interrupt input 2?
  191. * CIO12 IRRX IrDa Receive
  192. * CIO13 IRTX IrDa Transmit
  193. * CIO14 P21 KBC P21 fucntion
  194. * CIO15 P20 KBC P21 fucntion
  195. * CIO16 I2C_CLK I2C Clock
  196. * CIO17 I2C_DAT I2C Data
  197. *
  198. * CIO20 -
  199. * CIO21 -
  200. * CIO22 -
  201. * CIO23 -
  202. * CIO24 -
  203. * CIO25 LOCK Keylock
  204. *
  205. * CIO30 KBC_CLK Keybaord Clock
  206. * CIO31 CS0J General Chip Select decoder CS0J
  207. * CIO32 CS1J General Chip Select decoder CS1J
  208. * CIO33 ALT_KCLK Alternative Keyboard Clock
  209. * CIO34 ALT_KDAT Alternative Keyboard Data
  210. * CIO35 ALT_MCLK Alternative Mouse Clock
  211. * CIO36 ALT_MDAT Alternative Mouse Data
  212. * CIO37 ALT_KBC Alternative KBC select
  213. *
  214. * The CIO use an indirect address scheme.
  215. *
  216. * Reigster 3 in the SIO is used to select the index and data
  217. * port addresses where the CIO I/O registers show up.
  218. * The function selection registers are accessible under
  219. * function SIO 8.
  220. *
  221. * SIO reigster 3 (CIO Address Selection) bit definitions:
  222. * bit 7 CIO index and data registers enabled
  223. * bit 1-0 CIO indirect registers port address select
  224. * 0 index = 0xE0 data = 0xE1
  225. * 1 index = 0xE2 data = 0xE3
  226. * 2 index = 0xE4 data = 0xE5
  227. * 3 index = 0xEA data = 0xEB
  228. *
  229. * There are three CIO I/O register accessed via CIO index port and CIO data port
  230. * 0x01 CIO 10-17 data
  231. * 0x02 CIO 20-25 data (bits 7-6 unused)
  232. * 0x03 CIO 30-37 data
  233. *
  234. *
  235. * The pin function is accessed through normal
  236. * SIO registers, each register have the same format:
  237. *
  238. * Bit Function Value
  239. * 0 Input/output 1=input
  240. * 1 Polarity of signal 1=inverted
  241. * 2 Unused ??
  242. * 3 Function (normal or special) 1=special
  243. * 7-4 Unused
  244. *
  245. * SIO REG
  246. * 0xe0 CIO 10 Config
  247. * 0xe1 CIO 11 Config
  248. * 0xe2 CIO 12 Config
  249. * 0xe3 CIO 13 Config
  250. * 0xe4 CIO 14 Config
  251. * 0xe5 CIO 15 Config
  252. * 0xe6 CIO 16 Config
  253. * 0xe7 CIO 16 Config
  254. *
  255. * 0xe8 CIO 20 Config
  256. * 0xe9 CIO 21 Config
  257. * 0xea CIO 22 Config
  258. * 0xeb CIO 23 Config
  259. * 0xec CIO 24 Config
  260. * 0xed CIO 25 Config
  261. *
  262. * 0xf5 CIO 30 Config
  263. * 0xf6 CIO 31 Config
  264. * 0xf7 CIO 32 Config
  265. * 0xf8 CIO 33 Config
  266. * 0xf9 CIO 34 Config
  267. * 0xfa CIO 35 Config
  268. * 0xfb CIO 36 Config
  269. * 0xfc CIO 37 Config
  270. *
  271. */
  272. #define ALI_CIO_PORT_SEL 0x83
  273. #define ALI_CIO_INDEX 0xea
  274. #define ALI_CIO_DATA 0xeb
  275. void ali512x_set_cio(int enabled)
  276. {
  277. int i;
  278. ALI_OPEN();
  279. if (enabled) {
  280. ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */
  281. } else {
  282. ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80);
  283. }
  284. ALI_SELDEV(8);
  285. ali_write(0x30, enabled?1:0);
  286. /* set all pins to input to start with */
  287. for (i=0xe0;i<0xee;i++) {
  288. ali_write(i, 1);
  289. }
  290. for (i=0xf5;i<0xfe;i++) {
  291. ali_write(i, 1);
  292. }
  293. ALI_CLOSE();
  294. }
  295. void ali512x_cio_function(int pin, int special, int inv, int input)
  296. {
  297. u8 data;
  298. u8 addr;
  299. /* valid pins are 10-17, 20-25 and 30-37 */
  300. if (pin >= 10 && pin <= 17) {
  301. addr = 0xe0+(pin&7);
  302. } else if (pin >= 20 && pin <= 25) {
  303. addr = 0xe8+(pin&7);
  304. } else if (pin >= 30 && pin <= 37) {
  305. addr = 0xf5+(pin&7);
  306. } else {
  307. return;
  308. }
  309. ALI_OPEN();
  310. ALI_SELDEV(8);
  311. data=0xf4;
  312. if (special) {
  313. data |= 0x08;
  314. } else {
  315. if (inv) {
  316. data |= 0x02;
  317. }
  318. if (input) {
  319. data |= 0x01;
  320. }
  321. }
  322. ali_write(addr, data);
  323. ALI_CLOSE();
  324. }
  325. void ali512x_cio_out(int pin, int value)
  326. {
  327. u8 reg;
  328. u8 data;
  329. u8 bit;
  330. reg = pin/10;
  331. bit = 1 << (pin%10);
  332. outb(reg, ALI_CIO_INDEX); /* select I/O register */
  333. data = inb(ALI_CIO_DATA);
  334. if (value) {
  335. data |= bit;
  336. } else {
  337. data &= ~bit;
  338. }
  339. outb(data, ALI_CIO_DATA);
  340. }
  341. int ali512x_cio_in(int pin)
  342. {
  343. u8 reg;
  344. u8 data;
  345. u8 bit;
  346. /* valid pins are 10-17, 20-25 and 30-37 */
  347. reg = pin/10;
  348. bit = 1 << (pin%10);
  349. outb(reg, ALI_CIO_INDEX); /* select I/O register */
  350. data = inb(ALI_CIO_DATA);
  351. return data & bit;
  352. }
  353. #endif