interrupts.c 4.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Alex Zuepke <azu@sysgo.de>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <asm/arch/pxa-regs.h>
  30. #ifdef CONFIG_USE_IRQ
  31. /* enable IRQ/FIQ interrupts */
  32. void enable_interrupts (void)
  33. {
  34. #error: interrupts not implemented yet
  35. }
  36. /*
  37. * disable IRQ/FIQ interrupts
  38. * returns true if interrupts had been enabled before we disabled them
  39. */
  40. int disable_interrupts (void)
  41. {
  42. #error: interrupts not implemented yet
  43. }
  44. #else
  45. void enable_interrupts (void)
  46. {
  47. return;
  48. }
  49. int disable_interrupts (void)
  50. {
  51. return 0;
  52. }
  53. #endif
  54. void bad_mode (void)
  55. {
  56. panic ("Resetting CPU ...\n");
  57. reset_cpu (0);
  58. }
  59. void show_regs (struct pt_regs *regs)
  60. {
  61. unsigned long flags;
  62. const char *processor_modes[] = {
  63. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  64. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  65. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  66. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  67. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  68. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  69. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  70. "UK12_32", "UK13_32", "UK14_32", "SYS_32"
  71. };
  72. flags = condition_codes (regs);
  73. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  74. "sp : %08lx ip : %08lx fp : %08lx\n",
  75. instruction_pointer (regs),
  76. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  77. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  78. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  79. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  80. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  81. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  82. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  83. printf ("Flags: %c%c%c%c",
  84. flags & CC_N_BIT ? 'N' : 'n',
  85. flags & CC_Z_BIT ? 'Z' : 'z',
  86. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  87. printf (" IRQs %s FIQs %s Mode %s%s\n",
  88. interrupts_enabled (regs) ? "on" : "off",
  89. fast_interrupts_enabled (regs) ? "on" : "off",
  90. processor_modes[processor_mode (regs)],
  91. thumb_mode (regs) ? " (T)" : "");
  92. }
  93. void do_undefined_instruction (struct pt_regs *pt_regs)
  94. {
  95. printf ("undefined instruction\n");
  96. show_regs (pt_regs);
  97. bad_mode ();
  98. }
  99. void do_software_interrupt (struct pt_regs *pt_regs)
  100. {
  101. printf ("software interrupt\n");
  102. show_regs (pt_regs);
  103. bad_mode ();
  104. }
  105. void do_prefetch_abort (struct pt_regs *pt_regs)
  106. {
  107. printf ("prefetch abort\n");
  108. show_regs (pt_regs);
  109. bad_mode ();
  110. }
  111. void do_data_abort (struct pt_regs *pt_regs)
  112. {
  113. printf ("data abort\n");
  114. show_regs (pt_regs);
  115. bad_mode ();
  116. }
  117. void do_not_used (struct pt_regs *pt_regs)
  118. {
  119. printf ("not used\n");
  120. show_regs (pt_regs);
  121. bad_mode ();
  122. }
  123. void do_fiq (struct pt_regs *pt_regs)
  124. {
  125. printf ("fast interrupt request\n");
  126. show_regs (pt_regs);
  127. bad_mode ();
  128. }
  129. void do_irq (struct pt_regs *pt_regs)
  130. {
  131. printf ("interrupt request\n");
  132. show_regs (pt_regs);
  133. bad_mode ();
  134. }
  135. int interrupt_init (void)
  136. {
  137. /* nothing happens here - we don't setup any IRQs */
  138. return (0);
  139. }
  140. void reset_timer (void)
  141. {
  142. reset_timer_masked ();
  143. }
  144. ulong get_timer (ulong base)
  145. {
  146. return get_timer_masked () - base;
  147. }
  148. void set_timer (ulong t)
  149. {
  150. /* nop */
  151. }
  152. void udelay (unsigned long usec)
  153. {
  154. udelay_masked (usec);
  155. }
  156. void reset_timer_masked (void)
  157. {
  158. OSCR = 0;
  159. }
  160. ulong get_timer_masked (void)
  161. {
  162. return OSCR;
  163. }
  164. void udelay_masked (unsigned long usec)
  165. {
  166. ulong tmo;
  167. ulong endtime;
  168. signed long diff;
  169. if (usec >= 1000) {
  170. tmo = usec / 1000;
  171. tmo *= CFG_HZ;
  172. tmo /= 1000;
  173. } else {
  174. tmo = usec * CFG_HZ;
  175. tmo /= (1000*1000);
  176. }
  177. endtime = get_timer_masked () + tmo;
  178. do {
  179. ulong now = get_timer_masked ();
  180. diff = endtime - now;
  181. } while (diff >= 0);
  182. }
  183. /*
  184. * This function is derived from PowerPC code (read timebase as long long).
  185. * On ARM it just returns the timer value.
  186. */
  187. unsigned long long get_ticks(void)
  188. {
  189. return get_timer(0);
  190. }
  191. /*
  192. * This function is derived from PowerPC code (timebase clock frequency).
  193. * On ARM it returns the number of timer ticks per second.
  194. */
  195. ulong get_tbclk (void)
  196. {
  197. ulong tbclk;
  198. tbclk = CFG_HZ;
  199. return tbclk;
  200. }