miiphyutil.c 11 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * This provides a bit-banged interface to the ethernet MII management
  25. * channel.
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
  30. #include <asm/types.h>
  31. #include <linux/list.h>
  32. #include <malloc.h>
  33. #include <net.h>
  34. /* local debug macro */
  35. #define MII_DEBUG
  36. #undef MII_DEBUG
  37. #undef debug
  38. #ifdef MII_DEBUG
  39. #define debug(fmt,args...) printf (fmt ,##args)
  40. #else
  41. #define debug(fmt,args...)
  42. #endif /* MII_DEBUG */
  43. struct mii_dev {
  44. struct list_head link;
  45. char *name;
  46. int (* read)(char *devname, unsigned char addr,
  47. unsigned char reg, unsigned short *value);
  48. int (* write)(char *devname, unsigned char addr,
  49. unsigned char reg, unsigned short value);
  50. };
  51. static struct list_head mii_devs;
  52. static struct mii_dev *current_mii;
  53. /*****************************************************************************
  54. *
  55. * Initialize global data. Need to be called before any other miiphy routine.
  56. */
  57. void miiphy_init()
  58. {
  59. INIT_LIST_HEAD(&mii_devs);
  60. current_mii = NULL;
  61. }
  62. /*****************************************************************************
  63. *
  64. * Register read and write MII access routines for the device <name>.
  65. */
  66. void miiphy_register(char *name,
  67. int (* read)(char *devname, unsigned char addr,
  68. unsigned char reg, unsigned short *value),
  69. int (* write)(char *devname, unsigned char addr,
  70. unsigned char reg, unsigned short value))
  71. {
  72. struct list_head *entry;
  73. struct mii_dev *new_dev;
  74. struct mii_dev *miidev;
  75. unsigned int name_len;
  76. /* check if we have unique name */
  77. list_for_each(entry, &mii_devs) {
  78. miidev = list_entry(entry, struct mii_dev, link);
  79. if (strcmp(miidev->name, name) == 0) {
  80. printf("miiphy_register: non unique device name '%s'\n",
  81. name);
  82. return;
  83. }
  84. }
  85. /* allocate memory */
  86. name_len = strlen(name);
  87. new_dev = (struct mii_dev *)malloc(sizeof(struct mii_dev) + name_len + 1);
  88. if(new_dev == NULL) {
  89. printf("miiphy_register: cannot allocate memory for '%s'\n",
  90. name);
  91. return;
  92. }
  93. memset(new_dev, 0, sizeof(struct mii_dev) + name_len);
  94. /* initalize mii_dev struct fields */
  95. INIT_LIST_HEAD(&new_dev->link);
  96. new_dev->read = read;
  97. new_dev->write = write;
  98. new_dev->name = (char *)(new_dev + 1);
  99. strncpy(new_dev->name, name, name_len);
  100. new_dev->name[name_len] = '\0';
  101. debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
  102. new_dev->name, new_dev->read, new_dev->write);
  103. /* add it to the list */
  104. list_add_tail(&new_dev->link, &mii_devs);
  105. if (!current_mii)
  106. current_mii = new_dev;
  107. }
  108. int miiphy_set_current_dev(char *devname)
  109. {
  110. struct list_head *entry;
  111. struct mii_dev *dev;
  112. list_for_each(entry, &mii_devs) {
  113. dev = list_entry(entry, struct mii_dev, link);
  114. if (strcmp(devname, dev->name) == 0) {
  115. current_mii = dev;
  116. return 0;
  117. }
  118. }
  119. printf("No such device: %s\n", devname);
  120. return 1;
  121. }
  122. char *miiphy_get_current_dev()
  123. {
  124. if (current_mii)
  125. return current_mii->name;
  126. return NULL;
  127. }
  128. /*****************************************************************************
  129. *
  130. * Read to variable <value> from the PHY attached to device <devname>,
  131. * use PHY address <addr> and register <reg>.
  132. *
  133. * Returns:
  134. * 0 on success
  135. */
  136. int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
  137. unsigned short *value)
  138. {
  139. struct list_head *entry;
  140. struct mii_dev *dev;
  141. int found_dev = 0;
  142. int read_ret = 0;
  143. if (!devname) {
  144. printf("NULL device name!\n");
  145. return 1;
  146. }
  147. list_for_each(entry, &mii_devs) {
  148. dev = list_entry(entry, struct mii_dev, link);
  149. if (strcmp(devname, dev->name) == 0) {
  150. found_dev = 1;
  151. read_ret = dev->read(devname, addr, reg, value);
  152. break;
  153. }
  154. }
  155. if (found_dev == 0)
  156. printf("No such device: %s\n", devname);
  157. return ((found_dev) ? read_ret : 1);
  158. }
  159. /*****************************************************************************
  160. *
  161. * Write <value> to the PHY attached to device <devname>,
  162. * use PHY address <addr> and register <reg>.
  163. *
  164. * Returns:
  165. * 0 on success
  166. */
  167. int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
  168. unsigned short value)
  169. {
  170. struct list_head *entry;
  171. struct mii_dev *dev;
  172. int found_dev = 0;
  173. int write_ret = 0;
  174. if (!devname) {
  175. printf("NULL device name!\n");
  176. return 1;
  177. }
  178. list_for_each(entry, &mii_devs) {
  179. dev = list_entry(entry, struct mii_dev, link);
  180. if (strcmp(devname, dev->name) == 0) {
  181. found_dev = 1;
  182. write_ret = dev->write(devname, addr, reg, value);
  183. break;
  184. }
  185. }
  186. if (found_dev == 0)
  187. printf("No such device: %s\n", devname);
  188. return ((found_dev) ? write_ret : 1);
  189. }
  190. /*****************************************************************************
  191. *
  192. * Print out list of registered MII capable devices.
  193. */
  194. void miiphy_listdev(void)
  195. {
  196. struct list_head *entry;
  197. struct mii_dev *dev;
  198. puts("MII devices: ");
  199. list_for_each(entry, &mii_devs) {
  200. dev = list_entry(entry, struct mii_dev, link);
  201. printf("'%s' ", dev->name);
  202. }
  203. puts("\n");
  204. if (current_mii)
  205. printf("Current device: '%s'\n", current_mii->name);
  206. }
  207. /*****************************************************************************
  208. *
  209. * Read the OUI, manufacture's model number, and revision number.
  210. *
  211. * OUI: 22 bits (unsigned int)
  212. * Model: 6 bits (unsigned char)
  213. * Revision: 4 bits (unsigned char)
  214. *
  215. * Returns:
  216. * 0 on success
  217. */
  218. int miiphy_info (char *devname,
  219. unsigned char addr,
  220. unsigned int *oui,
  221. unsigned char *model, unsigned char *rev)
  222. {
  223. unsigned int reg = 0;
  224. unsigned short tmp;
  225. if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
  226. #ifdef DEBUG
  227. puts ("PHY ID register 2 read failed\n");
  228. #endif
  229. return (-1);
  230. }
  231. reg = tmp;
  232. #ifdef DEBUG
  233. printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
  234. #endif
  235. if (reg == 0xFFFF) {
  236. /* No physical device present at this address */
  237. return (-1);
  238. }
  239. if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
  240. #ifdef DEBUG
  241. puts ("PHY ID register 1 read failed\n");
  242. #endif
  243. return (-1);
  244. }
  245. reg |= tmp << 16;
  246. #ifdef DEBUG
  247. printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  248. #endif
  249. *oui = ( reg >> 10);
  250. *model = (unsigned char) ((reg >> 4) & 0x0000003F);
  251. *rev = (unsigned char) ( reg & 0x0000000F);
  252. return (0);
  253. }
  254. /*****************************************************************************
  255. *
  256. * Reset the PHY.
  257. * Returns:
  258. * 0 on success
  259. */
  260. int miiphy_reset (char *devname, unsigned char addr)
  261. {
  262. unsigned short reg;
  263. int loop_cnt;
  264. if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
  265. #ifdef DEBUG
  266. printf ("PHY status read failed\n");
  267. #endif
  268. return (-1);
  269. }
  270. if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
  271. #ifdef DEBUG
  272. puts ("PHY reset failed\n");
  273. #endif
  274. return (-1);
  275. }
  276. #ifdef CONFIG_PHY_RESET_DELAY
  277. udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  278. #endif
  279. /*
  280. * Poll the control register for the reset bit to go to 0 (it is
  281. * auto-clearing). This should happen within 0.5 seconds per the
  282. * IEEE spec.
  283. */
  284. loop_cnt = 0;
  285. reg = 0x8000;
  286. while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
  287. if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
  288. # ifdef DEBUG
  289. puts ("PHY status read failed\n");
  290. # endif
  291. return (-1);
  292. }
  293. }
  294. if ((reg & 0x8000) == 0) {
  295. return (0);
  296. } else {
  297. puts ("PHY reset timed out\n");
  298. return (-1);
  299. }
  300. return (0);
  301. }
  302. /*****************************************************************************
  303. *
  304. * Determine the ethernet speed (10/100).
  305. */
  306. int miiphy_speed (char *devname, unsigned char addr)
  307. {
  308. unsigned short reg;
  309. #if defined(CONFIG_PHY_GIGE)
  310. if (miiphy_read (devname, addr, PHY_1000BTSR, &reg)) {
  311. printf ("PHY 1000BT Status read failed\n");
  312. } else {
  313. if (reg != 0xFFFF) {
  314. if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
  315. return (_1000BASET);
  316. }
  317. }
  318. }
  319. #endif /* CONFIG_PHY_GIGE */
  320. /* Check Basic Management Control Register first. */
  321. if (miiphy_read (devname, addr, PHY_BMCR, &reg)) {
  322. puts ("PHY speed read failed, assuming 10bT\n");
  323. return (_10BASET);
  324. }
  325. /* Check if auto-negotiation is on. */
  326. if ((reg & PHY_BMCR_AUTON) != 0) {
  327. /* Get auto-negotiation results. */
  328. if (miiphy_read (devname, addr, PHY_ANLPAR, &reg)) {
  329. puts ("PHY AN speed read failed, assuming 10bT\n");
  330. return (_10BASET);
  331. }
  332. if ((reg & PHY_ANLPAR_100) != 0) {
  333. return (_100BASET);
  334. } else {
  335. return (_10BASET);
  336. }
  337. }
  338. /* Get speed from basic control settings. */
  339. else if (reg & PHY_BMCR_100MB) {
  340. return (_100BASET);
  341. } else {
  342. return (_10BASET);
  343. }
  344. }
  345. /*****************************************************************************
  346. *
  347. * Determine full/half duplex.
  348. */
  349. int miiphy_duplex (char *devname, unsigned char addr)
  350. {
  351. unsigned short reg;
  352. #if defined(CONFIG_PHY_GIGE)
  353. if (miiphy_read (devname, addr, PHY_1000BTSR, &reg)) {
  354. printf ("PHY 1000BT Status read failed\n");
  355. } else {
  356. if ( (reg != 0xFFFF) &&
  357. (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
  358. if ((reg & PHY_1000BTSR_1000FD) !=0) {
  359. return (FULL);
  360. } else {
  361. return (HALF);
  362. }
  363. }
  364. }
  365. #endif /* CONFIG_PHY_GIGE */
  366. /* Check Basic Management Control Register first. */
  367. if (miiphy_read (devname, addr, PHY_BMCR, &reg)) {
  368. puts ("PHY duplex read failed, assuming half duplex\n");
  369. return (HALF);
  370. }
  371. /* Check if auto-negotiation is on. */
  372. if ((reg & PHY_BMCR_AUTON) != 0) {
  373. /* Get auto-negotiation results. */
  374. if (miiphy_read (devname, addr, PHY_ANLPAR, &reg)) {
  375. puts ("PHY AN duplex read failed, assuming half duplex\n");
  376. return (HALF);
  377. }
  378. if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
  379. return (FULL);
  380. } else {
  381. return (HALF);
  382. }
  383. }
  384. /* Get speed from basic control settings. */
  385. else if (reg & PHY_BMCR_DPLX) {
  386. return (FULL);
  387. } else {
  388. return (HALF);
  389. }
  390. }
  391. #ifdef CFG_FAULT_ECHO_LINK_DOWN
  392. /*****************************************************************************
  393. *
  394. * Determine link status
  395. */
  396. int miiphy_link (char *devname, unsigned char addr)
  397. {
  398. unsigned short reg;
  399. /* dummy read; needed to latch some phys */
  400. (void)miiphy_read(devname, addr, PHY_BMSR, &reg);
  401. if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
  402. puts ("PHY_BMSR read failed, assuming no link\n");
  403. return (0);
  404. }
  405. /* Determine if a link is active */
  406. if ((reg & PHY_BMSR_LS) != 0) {
  407. return (1);
  408. } else {
  409. return (0);
  410. }
  411. }
  412. #endif
  413. #endif /* CONFIG_MII */