cmd_ide.c 51 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  34. # include <pcmcia.h>
  35. #endif
  36. #ifdef CONFIG_8xx
  37. # include <mpc8xx.h>
  38. #endif
  39. #ifdef CONFIG_MPC5xxx
  40. #include <mpc5xxx.h>
  41. #endif
  42. #include <ide.h>
  43. #include <ata.h>
  44. #ifdef CONFIG_STATUS_LED
  45. # include <status_led.h>
  46. #endif
  47. #ifndef __PPC__
  48. #include <asm/io.h>
  49. #ifdef __MIPS__
  50. /* Macros depend on this variable */
  51. unsigned long mips_io_port_base = 0;
  52. #endif
  53. #endif
  54. #ifdef CONFIG_IDE_8xx_DIRECT
  55. DECLARE_GLOBAL_DATA_PTR;
  56. #endif
  57. #ifdef __PPC__
  58. # define EIEIO __asm__ volatile ("eieio")
  59. # define SYNC __asm__ volatile ("sync")
  60. #else
  61. # define EIEIO /* nothing */
  62. # define SYNC /* nothing */
  63. #endif
  64. #if defined(CONFIG_CMD_IDE)
  65. #ifdef CONFIG_IDE_8xx_DIRECT
  66. /* Timings for IDE Interface
  67. *
  68. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  69. * 70 165 30 PIO-Mode 0, [ns]
  70. * 4 9 2 [Cycles]
  71. * 50 125 20 PIO-Mode 1, [ns]
  72. * 3 7 2 [Cycles]
  73. * 30 100 15 PIO-Mode 2, [ns]
  74. * 2 6 1 [Cycles]
  75. * 30 80 10 PIO-Mode 3, [ns]
  76. * 2 5 1 [Cycles]
  77. * 25 70 10 PIO-Mode 4, [ns]
  78. * 2 4 1 [Cycles]
  79. */
  80. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  81. {
  82. /* Setup Length Hold */
  83. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  84. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  85. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  86. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  87. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  88. };
  89. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  90. #ifndef CFG_PIO_MODE
  91. #define CFG_PIO_MODE 0 /* use a relaxed default */
  92. #endif
  93. static int pio_mode = CFG_PIO_MODE;
  94. /* Make clock cycles and always round up */
  95. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  96. #endif /* CONFIG_IDE_8xx_DIRECT */
  97. /* ------------------------------------------------------------------------- */
  98. /* Current I/O Device */
  99. static int curr_device = -1;
  100. /* Current offset for IDE0 / IDE1 bus access */
  101. ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
  102. #if defined(CFG_ATA_IDE0_OFFSET)
  103. CFG_ATA_IDE0_OFFSET,
  104. #endif
  105. #if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
  106. CFG_ATA_IDE1_OFFSET,
  107. #endif
  108. };
  109. #define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
  110. #ifndef CONFIG_AMIGAONEG3SE
  111. static int ide_bus_ok[CFG_IDE_MAXBUS];
  112. #else
  113. static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
  114. #endif
  115. block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
  116. /* ------------------------------------------------------------------------- */
  117. #ifdef CONFIG_IDE_LED
  118. #if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
  119. static void ide_led (uchar led, uchar status);
  120. #else
  121. extern void ide_led (uchar led, uchar status);
  122. #endif
  123. #else
  124. #ifndef CONFIG_AMIGAONEG3SE
  125. #define ide_led(a,b) /* dummy */
  126. #else
  127. extern void ide_led(uchar led, uchar status);
  128. #define LED_IDE1 1
  129. #define LED_IDE2 2
  130. #define CONFIG_IDE_LED 1
  131. #define DEVICE_LED(x) 1
  132. #endif
  133. #endif
  134. #ifdef CONFIG_IDE_RESET
  135. static void ide_reset (void);
  136. #else
  137. #define ide_reset() /* dummy */
  138. #endif
  139. static void ide_ident (block_dev_desc_t *dev_desc);
  140. static uchar ide_wait (int dev, ulong t);
  141. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  142. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  143. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  144. static void __inline__ ide_outb(int dev, int port, unsigned char val);
  145. static unsigned char __inline__ ide_inb(int dev, int port);
  146. static void input_data(int dev, ulong *sect_buf, int words);
  147. static void output_data(int dev, ulong *sect_buf, int words);
  148. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  149. #ifndef CFG_ATA_PORT_ADDR
  150. #define CFG_ATA_PORT_ADDR(port) (port)
  151. #endif
  152. #ifdef CONFIG_ATAPI
  153. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  154. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  155. #endif
  156. #ifdef CONFIG_IDE_8xx_DIRECT
  157. static void set_pcmcia_timing (int pmode);
  158. #endif
  159. /* ------------------------------------------------------------------------- */
  160. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  161. {
  162. int rcode = 0;
  163. switch (argc) {
  164. case 0:
  165. case 1:
  166. printf ("Usage:\n%s\n", cmdtp->usage);
  167. return 1;
  168. case 2:
  169. if (strncmp(argv[1],"res",3) == 0) {
  170. puts ("\nReset IDE"
  171. #ifdef CONFIG_IDE_8xx_DIRECT
  172. " on PCMCIA " PCMCIA_SLOT_MSG
  173. #endif
  174. ": ");
  175. ide_init ();
  176. return 0;
  177. } else if (strncmp(argv[1],"inf",3) == 0) {
  178. int i;
  179. putc ('\n');
  180. for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
  181. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  182. continue; /* list only known devices */
  183. printf ("IDE device %d: ", i);
  184. dev_print(&ide_dev_desc[i]);
  185. }
  186. return 0;
  187. } else if (strncmp(argv[1],"dev",3) == 0) {
  188. if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
  189. puts ("\nno IDE devices available\n");
  190. return 1;
  191. }
  192. printf ("\nIDE device %d: ", curr_device);
  193. dev_print(&ide_dev_desc[curr_device]);
  194. return 0;
  195. } else if (strncmp(argv[1],"part",4) == 0) {
  196. int dev, ok;
  197. for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
  198. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  199. ++ok;
  200. if (dev)
  201. putc ('\n');
  202. print_part(&ide_dev_desc[dev]);
  203. }
  204. }
  205. if (!ok) {
  206. puts ("\nno IDE devices available\n");
  207. rcode ++;
  208. }
  209. return rcode;
  210. }
  211. printf ("Usage:\n%s\n", cmdtp->usage);
  212. return 1;
  213. case 3:
  214. if (strncmp(argv[1],"dev",3) == 0) {
  215. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  216. printf ("\nIDE device %d: ", dev);
  217. if (dev >= CFG_IDE_MAXDEVICE) {
  218. puts ("unknown device\n");
  219. return 1;
  220. }
  221. dev_print(&ide_dev_desc[dev]);
  222. /*ide_print (dev);*/
  223. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  224. return 1;
  225. }
  226. curr_device = dev;
  227. puts ("... is now current device\n");
  228. return 0;
  229. } else if (strncmp(argv[1],"part",4) == 0) {
  230. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  231. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  232. print_part(&ide_dev_desc[dev]);
  233. } else {
  234. printf ("\nIDE device %d not available\n", dev);
  235. rcode = 1;
  236. }
  237. return rcode;
  238. #if 0
  239. } else if (strncmp(argv[1],"pio",4) == 0) {
  240. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  241. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  242. puts ("\nSetting ");
  243. pio_mode = mode;
  244. ide_init ();
  245. } else {
  246. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  247. mode, IDE_MAX_PIO_MODE);
  248. }
  249. return;
  250. #endif
  251. }
  252. printf ("Usage:\n%s\n", cmdtp->usage);
  253. return 1;
  254. default:
  255. /* at least 4 args */
  256. if (strcmp(argv[1],"read") == 0) {
  257. ulong addr = simple_strtoul(argv[2], NULL, 16);
  258. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  259. ulong n;
  260. #ifdef CFG_64BIT_STRTOUL
  261. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  262. printf ("\nIDE read: device %d block # %qd, count %ld ... ",
  263. curr_device, blk, cnt);
  264. #else
  265. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  266. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  267. curr_device, blk, cnt);
  268. #endif
  269. n = ide_dev_desc[curr_device].block_read (curr_device,
  270. blk, cnt,
  271. (ulong *)addr);
  272. /* flush cache after read */
  273. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  274. printf ("%ld blocks read: %s\n",
  275. n, (n==cnt) ? "OK" : "ERROR");
  276. if (n==cnt) {
  277. return 0;
  278. } else {
  279. return 1;
  280. }
  281. } else if (strcmp(argv[1],"write") == 0) {
  282. ulong addr = simple_strtoul(argv[2], NULL, 16);
  283. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  284. ulong n;
  285. #ifdef CFG_64BIT_STRTOUL
  286. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  287. printf ("\nIDE write: device %d block # %qd, count %ld ... ",
  288. curr_device, blk, cnt);
  289. #else
  290. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  291. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  292. curr_device, blk, cnt);
  293. #endif
  294. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  295. printf ("%ld blocks written: %s\n",
  296. n, (n==cnt) ? "OK" : "ERROR");
  297. if (n==cnt) {
  298. return 0;
  299. } else {
  300. return 1;
  301. }
  302. } else {
  303. printf ("Usage:\n%s\n", cmdtp->usage);
  304. rcode = 1;
  305. }
  306. return rcode;
  307. }
  308. }
  309. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  310. {
  311. char *boot_device = NULL;
  312. char *ep;
  313. int dev, part = 0;
  314. ulong addr, cnt, checksum;
  315. disk_partition_t info;
  316. image_header_t *hdr;
  317. int rcode = 0;
  318. show_boot_progress (41);
  319. switch (argc) {
  320. case 1:
  321. addr = CFG_LOAD_ADDR;
  322. boot_device = getenv ("bootdevice");
  323. break;
  324. case 2:
  325. addr = simple_strtoul(argv[1], NULL, 16);
  326. boot_device = getenv ("bootdevice");
  327. break;
  328. case 3:
  329. addr = simple_strtoul(argv[1], NULL, 16);
  330. boot_device = argv[2];
  331. break;
  332. default:
  333. printf ("Usage:\n%s\n", cmdtp->usage);
  334. show_boot_progress (-42);
  335. return 1;
  336. }
  337. show_boot_progress (42);
  338. if (!boot_device) {
  339. puts ("\n** No boot device **\n");
  340. show_boot_progress (-43);
  341. return 1;
  342. }
  343. show_boot_progress (43);
  344. dev = simple_strtoul(boot_device, &ep, 16);
  345. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  346. printf ("\n** Device %d not available\n", dev);
  347. show_boot_progress (-44);
  348. return 1;
  349. }
  350. show_boot_progress (44);
  351. if (*ep) {
  352. if (*ep != ':') {
  353. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  354. show_boot_progress (-45);
  355. return 1;
  356. }
  357. part = simple_strtoul(++ep, NULL, 16);
  358. }
  359. show_boot_progress (45);
  360. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  361. show_boot_progress (-46);
  362. return 1;
  363. }
  364. show_boot_progress (46);
  365. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  366. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  367. printf ("\n** Invalid partition type \"%.32s\""
  368. " (expect \"" BOOT_PART_TYPE "\")\n",
  369. info.type);
  370. show_boot_progress (-47);
  371. return 1;
  372. }
  373. show_boot_progress (47);
  374. printf ("\nLoading from IDE device %d, partition %d: "
  375. "Name: %.32s Type: %.32s\n",
  376. dev, part, info.name, info.type);
  377. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  378. info.start, info.size, info.blksz);
  379. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  380. printf ("** Read error on %d:%d\n", dev, part);
  381. show_boot_progress (-48);
  382. return 1;
  383. }
  384. show_boot_progress (48);
  385. hdr = (image_header_t *)addr;
  386. if (ntohl(hdr->ih_magic) != IH_MAGIC) {
  387. printf("\n** Bad Magic Number **\n");
  388. show_boot_progress (-49);
  389. return 1;
  390. }
  391. show_boot_progress (49);
  392. checksum = ntohl(hdr->ih_hcrc);
  393. hdr->ih_hcrc = 0;
  394. if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
  395. puts ("\n** Bad Header Checksum **\n");
  396. show_boot_progress (-50);
  397. return 1;
  398. }
  399. show_boot_progress (50);
  400. hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
  401. print_image_hdr (hdr);
  402. cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
  403. cnt += info.blksz - 1;
  404. cnt /= info.blksz;
  405. cnt -= 1;
  406. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  407. (ulong *)(addr+info.blksz)) != cnt) {
  408. printf ("** Read error on %d:%d\n", dev, part);
  409. show_boot_progress (-51);
  410. return 1;
  411. }
  412. show_boot_progress (51);
  413. /* Loading ok, update default load address */
  414. load_addr = addr;
  415. /* Check if we should attempt an auto-start */
  416. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  417. char *local_args[2];
  418. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  419. local_args[0] = argv[0];
  420. local_args[1] = NULL;
  421. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  422. do_bootm (cmdtp, 0, 1, local_args);
  423. rcode = 1;
  424. }
  425. return rcode;
  426. }
  427. /* ------------------------------------------------------------------------- */
  428. void ide_init (void)
  429. {
  430. #ifdef CONFIG_IDE_8xx_DIRECT
  431. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  432. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  433. #endif
  434. unsigned char c;
  435. int i, bus;
  436. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  437. unsigned int ata_reset_time = ATA_RESET_TIME;
  438. char *s;
  439. #endif
  440. #ifdef CONFIG_AMIGAONEG3SE
  441. unsigned int max_bus_scan;
  442. #endif
  443. #ifdef CONFIG_IDE_8xx_PCCARD
  444. extern int pcmcia_on (void);
  445. extern int ide_devices_found; /* Initialized in check_ide_device() */
  446. #endif /* CONFIG_IDE_8xx_PCCARD */
  447. #ifdef CONFIG_IDE_PREINIT
  448. extern int ide_preinit (void);
  449. WATCHDOG_RESET();
  450. if (ide_preinit ()) {
  451. puts ("ide_preinit failed\n");
  452. return;
  453. }
  454. #endif /* CONFIG_IDE_PREINIT */
  455. #ifdef CONFIG_IDE_8xx_PCCARD
  456. extern int pcmcia_on (void);
  457. extern int ide_devices_found; /* Initialized in check_ide_device() */
  458. WATCHDOG_RESET();
  459. ide_devices_found = 0;
  460. /* initialize the PCMCIA IDE adapter card */
  461. pcmcia_on();
  462. if (!ide_devices_found)
  463. return;
  464. udelay (1000000); /* 1 s */
  465. #endif /* CONFIG_IDE_8xx_PCCARD */
  466. WATCHDOG_RESET();
  467. #ifdef CONFIG_IDE_8xx_DIRECT
  468. /* Initialize PIO timing tables */
  469. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  470. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  471. gd->bus_clk);
  472. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  473. gd->bus_clk);
  474. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  475. gd->bus_clk);
  476. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  477. " len=%3d ns/%d clk"
  478. " hold=%2d ns/%d clk\n",
  479. i,
  480. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  481. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  482. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  483. }
  484. #endif /* CONFIG_IDE_8xx_DIRECT */
  485. /* Reset the IDE just to be sure.
  486. * Light LED's to show
  487. */
  488. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  489. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  490. #ifdef CONFIG_IDE_8xx_DIRECT
  491. /* PCMCIA / IDE initialization for common mem space */
  492. pcmp->pcmc_pgcrb = 0;
  493. /* start in PIO mode 0 - most relaxed timings */
  494. pio_mode = 0;
  495. set_pcmcia_timing (pio_mode);
  496. #endif /* CONFIG_IDE_8xx_DIRECT */
  497. /*
  498. * Wait for IDE to get ready.
  499. * According to spec, this can take up to 31 seconds!
  500. */
  501. #ifndef CONFIG_AMIGAONEG3SE
  502. for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
  503. int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
  504. #else
  505. s = getenv("ide_maxbus");
  506. if (s)
  507. max_bus_scan = simple_strtol(s, NULL, 10);
  508. else
  509. max_bus_scan = CFG_IDE_MAXBUS;
  510. for (bus=0; bus<max_bus_scan; ++bus) {
  511. int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
  512. #endif
  513. #ifdef CONFIG_IDE_8xx_PCCARD
  514. /* Skip non-ide devices from probing */
  515. if ((ide_devices_found & (1 << bus)) == 0) {
  516. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  517. continue;
  518. }
  519. #endif
  520. printf ("Bus %d: ", bus);
  521. ide_bus_ok[bus] = 0;
  522. /* Select device
  523. */
  524. udelay (100000); /* 100 ms */
  525. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  526. udelay (100000); /* 100 ms */
  527. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  528. if ((s = getenv("ide_reset_timeout")) != NULL)
  529. ata_reset_time = simple_strtol(s, NULL, 10);
  530. #endif
  531. i = 0;
  532. do {
  533. udelay (10000); /* 10 ms */
  534. c = ide_inb (dev, ATA_STATUS);
  535. i++;
  536. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  537. if (i > (ata_reset_time * 100)) {
  538. #else
  539. if (i > (ATA_RESET_TIME * 100)) {
  540. #endif
  541. puts ("** Timeout **\n");
  542. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  543. #ifdef CONFIG_AMIGAONEG3SE
  544. /* If this is the second bus, the first one was OK */
  545. if (bus != 0) {
  546. ide_bus_ok[bus] = 0;
  547. goto skip_bus;
  548. }
  549. #endif
  550. return;
  551. }
  552. if ((i >= 100) && ((i%100)==0)) {
  553. putc ('.');
  554. }
  555. } while (c & ATA_STAT_BUSY);
  556. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  557. puts ("not available ");
  558. debug ("Status = 0x%02X ", c);
  559. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  560. } else if ((c & ATA_STAT_READY) == 0) {
  561. puts ("not available ");
  562. debug ("Status = 0x%02X ", c);
  563. #endif
  564. } else {
  565. puts ("OK ");
  566. ide_bus_ok[bus] = 1;
  567. }
  568. WATCHDOG_RESET();
  569. }
  570. #ifdef CONFIG_AMIGAONEG3SE
  571. skip_bus:
  572. #endif
  573. putc ('\n');
  574. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  575. curr_device = -1;
  576. for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
  577. #ifdef CONFIG_IDE_LED
  578. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  579. #endif
  580. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  581. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  582. ide_dev_desc[i].dev=i;
  583. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  584. ide_dev_desc[i].blksz=0;
  585. ide_dev_desc[i].lba=0;
  586. ide_dev_desc[i].block_read=ide_read;
  587. if (!ide_bus_ok[IDE_BUS(i)])
  588. continue;
  589. ide_led (led, 1); /* LED on */
  590. ide_ident(&ide_dev_desc[i]);
  591. ide_led (led, 0); /* LED off */
  592. dev_print(&ide_dev_desc[i]);
  593. /* ide_print (i); */
  594. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  595. init_part (&ide_dev_desc[i]); /* initialize partition type */
  596. if (curr_device < 0)
  597. curr_device = i;
  598. }
  599. }
  600. WATCHDOG_RESET();
  601. }
  602. /* ------------------------------------------------------------------------- */
  603. block_dev_desc_t * ide_get_dev(int dev)
  604. {
  605. return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  606. }
  607. #ifdef CONFIG_IDE_8xx_DIRECT
  608. static void
  609. set_pcmcia_timing (int pmode)
  610. {
  611. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  612. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  613. ulong timings;
  614. debug ("Set timing for PIO Mode %d\n", pmode);
  615. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  616. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  617. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  618. ;
  619. /* IDE 0
  620. */
  621. pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
  622. pcmp->pcmc_por0 = CFG_PCMCIA_POR0
  623. #if (CFG_PCMCIA_POR0 != 0)
  624. | timings
  625. #endif
  626. ;
  627. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  628. pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
  629. pcmp->pcmc_por1 = CFG_PCMCIA_POR1
  630. #if (CFG_PCMCIA_POR1 != 0)
  631. | timings
  632. #endif
  633. ;
  634. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  635. pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
  636. pcmp->pcmc_por2 = CFG_PCMCIA_POR2
  637. #if (CFG_PCMCIA_POR2 != 0)
  638. | timings
  639. #endif
  640. ;
  641. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  642. pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
  643. pcmp->pcmc_por3 = CFG_PCMCIA_POR3
  644. #if (CFG_PCMCIA_POR3 != 0)
  645. | timings
  646. #endif
  647. ;
  648. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  649. /* IDE 1
  650. */
  651. pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
  652. pcmp->pcmc_por4 = CFG_PCMCIA_POR4
  653. #if (CFG_PCMCIA_POR4 != 0)
  654. | timings
  655. #endif
  656. ;
  657. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  658. pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
  659. pcmp->pcmc_por5 = CFG_PCMCIA_POR5
  660. #if (CFG_PCMCIA_POR5 != 0)
  661. | timings
  662. #endif
  663. ;
  664. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  665. pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
  666. pcmp->pcmc_por6 = CFG_PCMCIA_POR6
  667. #if (CFG_PCMCIA_POR6 != 0)
  668. | timings
  669. #endif
  670. ;
  671. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  672. pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
  673. pcmp->pcmc_por7 = CFG_PCMCIA_POR7
  674. #if (CFG_PCMCIA_POR7 != 0)
  675. | timings
  676. #endif
  677. ;
  678. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  679. }
  680. #endif /* CONFIG_IDE_8xx_DIRECT */
  681. /* ------------------------------------------------------------------------- */
  682. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  683. static void __inline__
  684. ide_outb(int dev, int port, unsigned char val)
  685. {
  686. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  687. dev, port, val, (ATA_CURR_BASE(dev)+port));
  688. /* Ensure I/O operations complete */
  689. EIEIO;
  690. *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
  691. }
  692. #else /* ! __PPC__ */
  693. static void __inline__
  694. ide_outb(int dev, int port, unsigned char val)
  695. {
  696. outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
  697. }
  698. #endif /* __PPC__ */
  699. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  700. static unsigned char __inline__
  701. ide_inb(int dev, int port)
  702. {
  703. uchar val;
  704. /* Ensure I/O operations complete */
  705. EIEIO;
  706. val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
  707. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  708. dev, port, (ATA_CURR_BASE(dev)+port), val);
  709. return (val);
  710. }
  711. #else /* ! __PPC__ */
  712. static unsigned char __inline__
  713. ide_inb(int dev, int port)
  714. {
  715. return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
  716. }
  717. #endif /* __PPC__ */
  718. #ifdef __PPC__
  719. # ifdef CONFIG_AMIGAONEG3SE
  720. static void
  721. output_data_short(int dev, ulong *sect_buf, int words)
  722. {
  723. ushort *dbuf;
  724. volatile ushort *pbuf;
  725. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  726. dbuf = (ushort *)sect_buf;
  727. while (words--) {
  728. EIEIO;
  729. *pbuf = *dbuf++;
  730. EIEIO;
  731. }
  732. if (words&1)
  733. *pbuf = 0;
  734. }
  735. # endif /* CONFIG_AMIGAONEG3SE */
  736. #endif /* __PPC_ */
  737. /* We only need to swap data if we are running on a big endian cpu. */
  738. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  739. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  740. #define input_swap_data(x,y,z) input_data(x,y,z)
  741. #else
  742. static void
  743. input_swap_data(int dev, ulong *sect_buf, int words)
  744. {
  745. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  746. uchar i;
  747. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  748. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  749. ushort *dbuf = (ushort *)sect_buf;
  750. while (words--) {
  751. for (i=0; i<2; i++) {
  752. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  753. *(uchar *)dbuf = *pbuf_odd;
  754. dbuf+=1;
  755. }
  756. }
  757. #else
  758. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  759. ushort *dbuf = (ushort *)sect_buf;
  760. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  761. while (words--) {
  762. #ifdef __MIPS__
  763. *dbuf++ = swab16p((u16*)pbuf);
  764. *dbuf++ = swab16p((u16*)pbuf);
  765. #elif defined(CONFIG_PCS440EP)
  766. *dbuf++ = *pbuf;
  767. *dbuf++ = *pbuf;
  768. #else
  769. *dbuf++ = ld_le16(pbuf);
  770. *dbuf++ = ld_le16(pbuf);
  771. #endif /* !MIPS */
  772. }
  773. #endif
  774. }
  775. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  776. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  777. static void
  778. output_data(int dev, ulong *sect_buf, int words)
  779. {
  780. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  781. uchar *dbuf;
  782. volatile uchar *pbuf_even;
  783. volatile uchar *pbuf_odd;
  784. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  785. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  786. dbuf = (uchar *)sect_buf;
  787. while (words--) {
  788. EIEIO;
  789. *pbuf_even = *dbuf++;
  790. EIEIO;
  791. *pbuf_odd = *dbuf++;
  792. EIEIO;
  793. *pbuf_even = *dbuf++;
  794. EIEIO;
  795. *pbuf_odd = *dbuf++;
  796. }
  797. #else
  798. ushort *dbuf;
  799. volatile ushort *pbuf;
  800. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  801. dbuf = (ushort *)sect_buf;
  802. while (words--) {
  803. #if defined(CONFIG_PCS440EP)
  804. /* not tested, because CF was write protected */
  805. EIEIO;
  806. *pbuf = ld_le16(dbuf++);
  807. EIEIO;
  808. *pbuf = ld_le16(dbuf++);
  809. #else
  810. EIEIO;
  811. *pbuf = *dbuf++;
  812. EIEIO;
  813. *pbuf = *dbuf++;
  814. #endif
  815. }
  816. #endif
  817. }
  818. #else /* ! __PPC__ */
  819. static void
  820. output_data(int dev, ulong *sect_buf, int words)
  821. {
  822. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  823. }
  824. #endif /* __PPC__ */
  825. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  826. static void
  827. input_data(int dev, ulong *sect_buf, int words)
  828. {
  829. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  830. uchar *dbuf;
  831. volatile uchar *pbuf_even;
  832. volatile uchar *pbuf_odd;
  833. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  834. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  835. dbuf = (uchar *)sect_buf;
  836. while (words--) {
  837. *dbuf++ = *pbuf_even;
  838. EIEIO;
  839. SYNC;
  840. *dbuf++ = *pbuf_odd;
  841. EIEIO;
  842. SYNC;
  843. *dbuf++ = *pbuf_even;
  844. EIEIO;
  845. SYNC;
  846. *dbuf++ = *pbuf_odd;
  847. EIEIO;
  848. SYNC;
  849. }
  850. #else
  851. ushort *dbuf;
  852. volatile ushort *pbuf;
  853. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  854. dbuf = (ushort *)sect_buf;
  855. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  856. while (words--) {
  857. #if defined(CONFIG_PCS440EP)
  858. EIEIO;
  859. *dbuf++ = ld_le16(pbuf);
  860. EIEIO;
  861. *dbuf++ = ld_le16(pbuf);
  862. #else
  863. EIEIO;
  864. *dbuf++ = *pbuf;
  865. EIEIO;
  866. *dbuf++ = *pbuf;
  867. #endif
  868. }
  869. #endif
  870. }
  871. #else /* ! __PPC__ */
  872. static void
  873. input_data(int dev, ulong *sect_buf, int words)
  874. {
  875. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  876. }
  877. #endif /* __PPC__ */
  878. #ifdef CONFIG_AMIGAONEG3SE
  879. static void
  880. input_data_short(int dev, ulong *sect_buf, int words)
  881. {
  882. ushort *dbuf;
  883. volatile ushort *pbuf;
  884. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  885. dbuf = (ushort *)sect_buf;
  886. while (words--) {
  887. EIEIO;
  888. *dbuf++ = *pbuf;
  889. EIEIO;
  890. }
  891. if (words&1) {
  892. ushort dummy;
  893. dummy = *pbuf;
  894. }
  895. }
  896. #endif
  897. /* -------------------------------------------------------------------------
  898. */
  899. static void ide_ident (block_dev_desc_t *dev_desc)
  900. {
  901. ulong iobuf[ATA_SECTORWORDS];
  902. unsigned char c;
  903. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  904. #ifdef CONFIG_AMIGAONEG3SE
  905. int max_bus_scan;
  906. char *s;
  907. #endif
  908. #ifdef CONFIG_ATAPI
  909. int retries = 0;
  910. int do_retry = 0;
  911. #endif
  912. #if 0
  913. int mode, cycle_time;
  914. #endif
  915. int device;
  916. device=dev_desc->dev;
  917. printf (" Device %d: ", device);
  918. #ifdef CONFIG_AMIGAONEG3SE
  919. s = getenv("ide_maxbus");
  920. if (s) {
  921. max_bus_scan = simple_strtol(s, NULL, 10);
  922. } else {
  923. max_bus_scan = CFG_IDE_MAXBUS;
  924. }
  925. if (device >= max_bus_scan*2) {
  926. dev_desc->type=DEV_TYPE_UNKNOWN;
  927. return;
  928. }
  929. #endif
  930. ide_led (DEVICE_LED(device), 1); /* LED on */
  931. /* Select device
  932. */
  933. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  934. dev_desc->if_type=IF_TYPE_IDE;
  935. #ifdef CONFIG_ATAPI
  936. do_retry = 0;
  937. retries = 0;
  938. /* Warning: This will be tricky to read */
  939. while (retries <= 1) {
  940. /* check signature */
  941. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  942. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  943. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  944. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  945. /* ATAPI Signature found */
  946. dev_desc->if_type=IF_TYPE_ATAPI;
  947. /* Start Ident Command
  948. */
  949. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  950. /*
  951. * Wait for completion - ATAPI devices need more time
  952. * to become ready
  953. */
  954. c = ide_wait (device, ATAPI_TIME_OUT);
  955. } else
  956. #endif
  957. {
  958. /* Start Ident Command
  959. */
  960. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  961. /* Wait for completion
  962. */
  963. c = ide_wait (device, IDE_TIME_OUT);
  964. }
  965. ide_led (DEVICE_LED(device), 0); /* LED off */
  966. if (((c & ATA_STAT_DRQ) == 0) ||
  967. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  968. #ifdef CONFIG_ATAPI
  969. #ifdef CONFIG_AMIGAONEG3SE
  970. s = getenv("ide_doreset");
  971. if (s && strcmp(s, "on") == 0)
  972. #endif
  973. {
  974. /* Need to soft reset the device in case it's an ATAPI... */
  975. debug ("Retrying...\n");
  976. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  977. udelay(100000);
  978. ide_outb (device, ATA_COMMAND, 0x08);
  979. udelay (500000); /* 500 ms */
  980. }
  981. /* Select device
  982. */
  983. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  984. retries++;
  985. #else
  986. return;
  987. #endif
  988. }
  989. #ifdef CONFIG_ATAPI
  990. else
  991. break;
  992. } /* see above - ugly to read */
  993. if (retries == 2) /* Not found */
  994. return;
  995. #endif
  996. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  997. ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  998. ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  999. ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  1000. #ifdef __LITTLE_ENDIAN
  1001. /*
  1002. * firmware revision and model number have Big Endian Byte
  1003. * order in Word. Convert both to little endian.
  1004. *
  1005. * See CF+ and CompactFlash Specification Revision 2.0:
  1006. * 6.2.1.6: Identfy Drive, Table 39 for more details
  1007. */
  1008. strswab (dev_desc->revision);
  1009. strswab (dev_desc->vendor);
  1010. #endif /* __LITTLE_ENDIAN */
  1011. if ((iop->config & 0x0080)==0x0080)
  1012. dev_desc->removable = 1;
  1013. else
  1014. dev_desc->removable = 0;
  1015. #if 0
  1016. /*
  1017. * Drive PIO mode autoselection
  1018. */
  1019. mode = iop->tPIO;
  1020. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  1021. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  1022. mode = 2;
  1023. debug ("Override tPIO -> 2\n");
  1024. }
  1025. if (iop->field_valid & 2) { /* drive implements ATA2? */
  1026. debug ("Drive implements ATA2\n");
  1027. if (iop->capability & 8) { /* drive supports use_iordy? */
  1028. cycle_time = iop->eide_pio_iordy;
  1029. } else {
  1030. cycle_time = iop->eide_pio;
  1031. }
  1032. debug ("cycle time = %d\n", cycle_time);
  1033. mode = 4;
  1034. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  1035. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  1036. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  1037. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  1038. }
  1039. printf ("PIO mode to use: PIO %d\n", mode);
  1040. #endif /* 0 */
  1041. #ifdef CONFIG_ATAPI
  1042. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  1043. atapi_inquiry(dev_desc);
  1044. return;
  1045. }
  1046. #endif /* CONFIG_ATAPI */
  1047. #ifdef __BIG_ENDIAN
  1048. /* swap shorts */
  1049. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1050. #else /* ! __BIG_ENDIAN */
  1051. /*
  1052. * do not swap shorts on little endian
  1053. *
  1054. * See CF+ and CompactFlash Specification Revision 2.0:
  1055. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1056. */
  1057. dev_desc->lba = iop->lba_capacity;
  1058. #endif /* __BIG_ENDIAN */
  1059. #ifdef CONFIG_LBA48
  1060. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1061. dev_desc->lba48 = 1;
  1062. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1063. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1064. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1065. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1066. } else {
  1067. dev_desc->lba48 = 0;
  1068. }
  1069. #endif /* CONFIG_LBA48 */
  1070. /* assuming HD */
  1071. dev_desc->type=DEV_TYPE_HARDDISK;
  1072. dev_desc->blksz=ATA_BLOCKSIZE;
  1073. dev_desc->lun=0; /* just to fill something in... */
  1074. #if 0 /* only used to test the powersaving mode,
  1075. * if enabled, the drive goes after 5 sec
  1076. * in standby mode */
  1077. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1078. c = ide_wait (device, IDE_TIME_OUT);
  1079. ide_outb (device, ATA_SECT_CNT, 1);
  1080. ide_outb (device, ATA_LBA_LOW, 0);
  1081. ide_outb (device, ATA_LBA_MID, 0);
  1082. ide_outb (device, ATA_LBA_HIGH, 0);
  1083. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1084. ide_outb (device, ATA_COMMAND, 0xe3);
  1085. udelay (50);
  1086. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1087. #endif
  1088. }
  1089. /* ------------------------------------------------------------------------- */
  1090. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1091. {
  1092. ulong n = 0;
  1093. unsigned char c;
  1094. unsigned char pwrsave=0; /* power save */
  1095. #ifdef CONFIG_LBA48
  1096. unsigned char lba48 = 0;
  1097. if (blknr & 0x0000fffff0000000) {
  1098. /* more than 28 bits used, use 48bit mode */
  1099. lba48 = 1;
  1100. }
  1101. #endif
  1102. debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
  1103. device, blknr, blkcnt, (ulong)buffer);
  1104. ide_led (DEVICE_LED(device), 1); /* LED on */
  1105. /* Select device
  1106. */
  1107. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1108. c = ide_wait (device, IDE_TIME_OUT);
  1109. if (c & ATA_STAT_BUSY) {
  1110. printf ("IDE read: device %d not ready\n", device);
  1111. goto IDE_READ_E;
  1112. }
  1113. /* first check if the drive is in Powersaving mode, if yes,
  1114. * increase the timeout value */
  1115. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1116. udelay (50);
  1117. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1118. if (c & ATA_STAT_BUSY) {
  1119. printf ("IDE read: device %d not ready\n", device);
  1120. goto IDE_READ_E;
  1121. }
  1122. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1123. printf ("No Powersaving mode %X\n", c);
  1124. } else {
  1125. c = ide_inb(device,ATA_SECT_CNT);
  1126. debug ("Powersaving %02X\n",c);
  1127. if(c==0)
  1128. pwrsave=1;
  1129. }
  1130. while (blkcnt-- > 0) {
  1131. c = ide_wait (device, IDE_TIME_OUT);
  1132. if (c & ATA_STAT_BUSY) {
  1133. printf ("IDE read: device %d not ready\n", device);
  1134. break;
  1135. }
  1136. #ifdef CONFIG_LBA48
  1137. if (lba48) {
  1138. /* write high bits */
  1139. ide_outb (device, ATA_SECT_CNT, 0);
  1140. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1141. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1142. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1143. }
  1144. #endif
  1145. ide_outb (device, ATA_SECT_CNT, 1);
  1146. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1147. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1148. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1149. #ifdef CONFIG_LBA48
  1150. if (lba48) {
  1151. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1152. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1153. } else
  1154. #endif
  1155. {
  1156. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1157. ATA_DEVICE(device) |
  1158. ((blknr >> 24) & 0xF) );
  1159. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1160. }
  1161. udelay (50);
  1162. if(pwrsave) {
  1163. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1164. pwrsave=0;
  1165. } else {
  1166. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1167. }
  1168. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1169. #if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
  1170. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1171. device, blknr, c);
  1172. #else
  1173. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1174. device, (ulong)blknr, c);
  1175. #endif
  1176. break;
  1177. }
  1178. input_data (device, buffer, ATA_SECTORWORDS);
  1179. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1180. ++n;
  1181. ++blknr;
  1182. buffer += ATA_BLOCKSIZE;
  1183. }
  1184. IDE_READ_E:
  1185. ide_led (DEVICE_LED(device), 0); /* LED off */
  1186. return (n);
  1187. }
  1188. /* ------------------------------------------------------------------------- */
  1189. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1190. {
  1191. ulong n = 0;
  1192. unsigned char c;
  1193. #ifdef CONFIG_LBA48
  1194. unsigned char lba48 = 0;
  1195. if (blknr & 0x0000fffff0000000) {
  1196. /* more than 28 bits used, use 48bit mode */
  1197. lba48 = 1;
  1198. }
  1199. #endif
  1200. ide_led (DEVICE_LED(device), 1); /* LED on */
  1201. /* Select device
  1202. */
  1203. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1204. while (blkcnt-- > 0) {
  1205. c = ide_wait (device, IDE_TIME_OUT);
  1206. if (c & ATA_STAT_BUSY) {
  1207. printf ("IDE read: device %d not ready\n", device);
  1208. goto WR_OUT;
  1209. }
  1210. #ifdef CONFIG_LBA48
  1211. if (lba48) {
  1212. /* write high bits */
  1213. ide_outb (device, ATA_SECT_CNT, 0);
  1214. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1215. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1216. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1217. }
  1218. #endif
  1219. ide_outb (device, ATA_SECT_CNT, 1);
  1220. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1221. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1222. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1223. #ifdef CONFIG_LBA48
  1224. if (lba48) {
  1225. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1226. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1227. } else
  1228. #endif
  1229. {
  1230. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1231. ATA_DEVICE(device) |
  1232. ((blknr >> 24) & 0xF) );
  1233. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1234. }
  1235. udelay (50);
  1236. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1237. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1238. #if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
  1239. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1240. device, blknr, c);
  1241. #else
  1242. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1243. device, (ulong)blknr, c);
  1244. #endif
  1245. goto WR_OUT;
  1246. }
  1247. output_data (device, buffer, ATA_SECTORWORDS);
  1248. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1249. ++n;
  1250. ++blknr;
  1251. buffer += ATA_BLOCKSIZE;
  1252. }
  1253. WR_OUT:
  1254. ide_led (DEVICE_LED(device), 0); /* LED off */
  1255. return (n);
  1256. }
  1257. /* ------------------------------------------------------------------------- */
  1258. /*
  1259. * copy src to dest, skipping leading and trailing blanks and null
  1260. * terminate the string
  1261. * "len" is the size of available memory including the terminating '\0'
  1262. */
  1263. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1264. {
  1265. unsigned char *end, *last;
  1266. last = dst;
  1267. end = src + len - 1;
  1268. /* reserve space for '\0' */
  1269. if (len < 2)
  1270. goto OUT;
  1271. /* skip leading white space */
  1272. while ((*src) && (src<end) && (*src==' '))
  1273. ++src;
  1274. /* copy string, omitting trailing white space */
  1275. while ((*src) && (src<end)) {
  1276. *dst++ = *src;
  1277. if (*src++ != ' ')
  1278. last = dst;
  1279. }
  1280. OUT:
  1281. *last = '\0';
  1282. }
  1283. /* ------------------------------------------------------------------------- */
  1284. /*
  1285. * Wait until Busy bit is off, or timeout (in ms)
  1286. * Return last status
  1287. */
  1288. static uchar ide_wait (int dev, ulong t)
  1289. {
  1290. ulong delay = 10 * t; /* poll every 100 us */
  1291. uchar c;
  1292. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1293. udelay (100);
  1294. if (delay-- == 0) {
  1295. break;
  1296. }
  1297. }
  1298. return (c);
  1299. }
  1300. /* ------------------------------------------------------------------------- */
  1301. #ifdef CONFIG_IDE_RESET
  1302. extern void ide_set_reset(int idereset);
  1303. static void ide_reset (void)
  1304. {
  1305. #if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
  1306. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  1307. #endif
  1308. int i;
  1309. curr_device = -1;
  1310. for (i=0; i<CFG_IDE_MAXBUS; ++i)
  1311. ide_bus_ok[i] = 0;
  1312. for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
  1313. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1314. ide_set_reset (1); /* assert reset */
  1315. WATCHDOG_RESET();
  1316. #ifdef CFG_PB_12V_ENABLE
  1317. immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
  1318. immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
  1319. immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
  1320. immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
  1321. /* wait 500 ms for the voltage to stabilize
  1322. */
  1323. for (i=0; i<500; ++i) {
  1324. udelay (1000);
  1325. }
  1326. immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
  1327. #endif /* CFG_PB_12V_ENABLE */
  1328. #ifdef CFG_PB_IDE_MOTOR
  1329. /* configure IDE Motor voltage monitor pin as input */
  1330. immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
  1331. immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
  1332. immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
  1333. /* wait up to 1 s for the motor voltage to stabilize
  1334. */
  1335. for (i=0; i<1000; ++i) {
  1336. if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
  1337. break;
  1338. }
  1339. udelay (1000);
  1340. }
  1341. if (i == 1000) { /* Timeout */
  1342. printf ("\nWarning: 5V for IDE Motor missing\n");
  1343. # ifdef CONFIG_STATUS_LED
  1344. # ifdef STATUS_LED_YELLOW
  1345. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1346. # endif
  1347. # ifdef STATUS_LED_GREEN
  1348. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1349. # endif
  1350. # endif /* CONFIG_STATUS_LED */
  1351. }
  1352. #endif /* CFG_PB_IDE_MOTOR */
  1353. WATCHDOG_RESET();
  1354. /* de-assert RESET signal */
  1355. ide_set_reset(0);
  1356. /* wait 250 ms */
  1357. for (i=0; i<250; ++i) {
  1358. udelay (1000);
  1359. }
  1360. }
  1361. #endif /* CONFIG_IDE_RESET */
  1362. /* ------------------------------------------------------------------------- */
  1363. #if defined(CONFIG_IDE_LED) && \
  1364. !defined(CONFIG_AMIGAONEG3SE)&& \
  1365. !defined(CONFIG_CPC45) && \
  1366. !defined(CONFIG_HMI10) && \
  1367. !defined(CONFIG_KUP4K) && \
  1368. !defined(CONFIG_KUP4X)
  1369. static uchar led_buffer = 0; /* Buffer for current LED status */
  1370. static void ide_led (uchar led, uchar status)
  1371. {
  1372. uchar *led_port = LED_PORT;
  1373. if (status) { /* switch LED on */
  1374. led_buffer |= led;
  1375. } else { /* switch LED off */
  1376. led_buffer &= ~led;
  1377. }
  1378. *led_port = led_buffer;
  1379. }
  1380. #endif /* CONFIG_IDE_LED */
  1381. /* ------------------------------------------------------------------------- */
  1382. #ifdef CONFIG_ATAPI
  1383. /****************************************************************************
  1384. * ATAPI Support
  1385. */
  1386. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1387. /* since ATAPI may use commands with not 4 bytes alligned length
  1388. * we have our own transfer functions, 2 bytes alligned */
  1389. static void
  1390. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1391. {
  1392. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1393. uchar *dbuf;
  1394. volatile uchar *pbuf_even;
  1395. volatile uchar *pbuf_odd;
  1396. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1397. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1398. while (shorts--) {
  1399. EIEIO;
  1400. *pbuf_even = *dbuf++;
  1401. EIEIO;
  1402. *pbuf_odd = *dbuf++;
  1403. }
  1404. #else
  1405. ushort *dbuf;
  1406. volatile ushort *pbuf;
  1407. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1408. dbuf = (ushort *)sect_buf;
  1409. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1410. while (shorts--) {
  1411. EIEIO;
  1412. *pbuf = *dbuf++;
  1413. }
  1414. #endif
  1415. }
  1416. static void
  1417. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1418. {
  1419. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1420. uchar *dbuf;
  1421. volatile uchar *pbuf_even;
  1422. volatile uchar *pbuf_odd;
  1423. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1424. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1425. while (shorts--) {
  1426. EIEIO;
  1427. *dbuf++ = *pbuf_even;
  1428. EIEIO;
  1429. *dbuf++ = *pbuf_odd;
  1430. }
  1431. #else
  1432. ushort *dbuf;
  1433. volatile ushort *pbuf;
  1434. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1435. dbuf = (ushort *)sect_buf;
  1436. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1437. while (shorts--) {
  1438. EIEIO;
  1439. *dbuf++ = *pbuf;
  1440. }
  1441. #endif
  1442. }
  1443. #else /* ! __PPC__ */
  1444. static void
  1445. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1446. {
  1447. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1448. }
  1449. static void
  1450. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1451. {
  1452. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1453. }
  1454. #endif /* __PPC__ */
  1455. /*
  1456. * Wait until (Status & mask) == res, or timeout (in ms)
  1457. * Return last status
  1458. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1459. * and then they set their DRQ Bit
  1460. */
  1461. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1462. {
  1463. ulong delay = 10 * t; /* poll every 100 us */
  1464. uchar c;
  1465. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1466. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1467. /* break if error occurs (doesn't make sense to wait more) */
  1468. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1469. break;
  1470. udelay (100);
  1471. if (delay-- == 0) {
  1472. break;
  1473. }
  1474. }
  1475. return (c);
  1476. }
  1477. /*
  1478. * issue an atapi command
  1479. */
  1480. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1481. {
  1482. unsigned char c,err,mask,res;
  1483. int n;
  1484. ide_led (DEVICE_LED(device), 1); /* LED on */
  1485. /* Select device
  1486. */
  1487. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1488. res = 0;
  1489. #ifdef CONFIG_AMIGAONEG3SE
  1490. # warning THF: Removed LBA mode ???
  1491. #endif
  1492. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1493. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1494. if ((c & mask) != res) {
  1495. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1496. err=0xFF;
  1497. goto AI_OUT;
  1498. }
  1499. /* write taskfile */
  1500. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1501. ide_outb (device, ATA_SECT_CNT, 0);
  1502. ide_outb (device, ATA_SECT_NUM, 0);
  1503. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1504. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1505. #ifdef CONFIG_AMIGAONEG3SE
  1506. # warning THF: Removed LBA mode ???
  1507. #endif
  1508. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1509. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1510. udelay (50);
  1511. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1512. res = ATA_STAT_DRQ;
  1513. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1514. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1515. printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1516. err=0xFF;
  1517. goto AI_OUT;
  1518. }
  1519. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1520. /* ATAPI Command written wait for completition */
  1521. udelay (5000); /* device must set bsy */
  1522. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1523. /* if no data wait for DRQ = 0 BSY = 0
  1524. * if data wait for DRQ = 1 BSY = 0 */
  1525. res=0;
  1526. if(buflen)
  1527. res = ATA_STAT_DRQ;
  1528. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1529. if ((c & mask) != res ) {
  1530. if (c & ATA_STAT_ERR) {
  1531. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1532. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1533. } else {
  1534. printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1535. err=0xFF;
  1536. }
  1537. goto AI_OUT;
  1538. }
  1539. n=ide_inb(device, ATA_CYL_HIGH);
  1540. n<<=8;
  1541. n+=ide_inb(device, ATA_CYL_LOW);
  1542. if(n>buflen) {
  1543. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1544. err=0xff;
  1545. goto AI_OUT;
  1546. }
  1547. if((n==0)&&(buflen<0)) {
  1548. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1549. err=0xff;
  1550. goto AI_OUT;
  1551. }
  1552. if(n!=buflen) {
  1553. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1554. }
  1555. if(n!=0) { /* data transfer */
  1556. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1557. /* we transfer shorts */
  1558. n>>=1;
  1559. /* ok now decide if it is an in or output */
  1560. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1561. debug ("Write to device\n");
  1562. output_data_shorts(device,(unsigned short *)buffer,n);
  1563. } else {
  1564. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1565. input_data_shorts(device,(unsigned short *)buffer,n);
  1566. }
  1567. }
  1568. udelay(5000); /* seems that some CD ROMs need this... */
  1569. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1570. res=0;
  1571. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1572. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1573. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1574. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1575. } else {
  1576. err = 0;
  1577. }
  1578. AI_OUT:
  1579. ide_led (DEVICE_LED(device), 0); /* LED off */
  1580. return (err);
  1581. }
  1582. /*
  1583. * sending the command to atapi_issue. If an status other than good
  1584. * returns, an request_sense will be issued
  1585. */
  1586. #define ATAPI_DRIVE_NOT_READY 100
  1587. #define ATAPI_UNIT_ATTN 10
  1588. unsigned char atapi_issue_autoreq (int device,
  1589. unsigned char* ccb,
  1590. int ccblen,
  1591. unsigned char *buffer,
  1592. int buflen)
  1593. {
  1594. unsigned char sense_data[18],sense_ccb[12];
  1595. unsigned char res,key,asc,ascq;
  1596. int notready,unitattn;
  1597. #ifdef CONFIG_AMIGAONEG3SE
  1598. char *s;
  1599. unsigned int timeout, retrycnt;
  1600. s = getenv("ide_cd_timeout");
  1601. timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
  1602. retrycnt = 0;
  1603. #endif
  1604. unitattn=ATAPI_UNIT_ATTN;
  1605. notready=ATAPI_DRIVE_NOT_READY;
  1606. retry:
  1607. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1608. if (res==0)
  1609. return (0); /* Ok */
  1610. if (res==0xFF)
  1611. return (0xFF); /* error */
  1612. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1613. memset(sense_ccb,0,sizeof(sense_ccb));
  1614. memset(sense_data,0,sizeof(sense_data));
  1615. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1616. sense_ccb[4]=18; /* allocation Length */
  1617. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1618. key=(sense_data[2]&0xF);
  1619. asc=(sense_data[12]);
  1620. ascq=(sense_data[13]);
  1621. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1622. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1623. sense_data[0],
  1624. key,
  1625. asc,
  1626. ascq);
  1627. if((key==0))
  1628. return 0; /* ok device ready */
  1629. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1630. if(unitattn-->0) {
  1631. udelay(200*1000);
  1632. goto retry;
  1633. }
  1634. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1635. goto error;
  1636. }
  1637. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1638. if (notready-->0) {
  1639. udelay(200*1000);
  1640. goto retry;
  1641. }
  1642. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1643. goto error;
  1644. }
  1645. if(asc==0x3a) {
  1646. debug ("Media not present\n");
  1647. goto error;
  1648. }
  1649. #ifdef CONFIG_AMIGAONEG3SE
  1650. if ((sense_data[2]&0xF)==0x0B) {
  1651. debug ("ABORTED COMMAND...retry\n");
  1652. if (retrycnt++ < 4)
  1653. goto retry;
  1654. return (0xFF);
  1655. }
  1656. if ((sense_data[2]&0xf) == 0x02 &&
  1657. sense_data[12] == 0x04 &&
  1658. sense_data[13] == 0x01 ) {
  1659. debug ("Waiting for unit to become active\n");
  1660. udelay(timeout);
  1661. if (retrycnt++ < 4)
  1662. goto retry;
  1663. return 0xFF;
  1664. }
  1665. #endif /* CONFIG_AMIGAONEG3SE */
  1666. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1667. error:
  1668. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1669. return (0xFF);
  1670. }
  1671. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1672. {
  1673. unsigned char ccb[12]; /* Command descriptor block */
  1674. unsigned char iobuf[64]; /* temp buf */
  1675. unsigned char c;
  1676. int device;
  1677. device=dev_desc->dev;
  1678. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1679. dev_desc->block_read=atapi_read;
  1680. memset(ccb,0,sizeof(ccb));
  1681. memset(iobuf,0,sizeof(iobuf));
  1682. ccb[0]=ATAPI_CMD_INQUIRY;
  1683. ccb[4]=40; /* allocation Legnth */
  1684. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1685. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1686. if (c!=0)
  1687. return;
  1688. /* copy device ident strings */
  1689. ident_cpy(dev_desc->vendor,&iobuf[8],8);
  1690. ident_cpy(dev_desc->product,&iobuf[16],16);
  1691. ident_cpy(dev_desc->revision,&iobuf[32],5);
  1692. dev_desc->lun=0;
  1693. dev_desc->lba=0;
  1694. dev_desc->blksz=0;
  1695. dev_desc->type=iobuf[0] & 0x1f;
  1696. if ((iobuf[1]&0x80)==0x80)
  1697. dev_desc->removable = 1;
  1698. else
  1699. dev_desc->removable = 0;
  1700. memset(ccb,0,sizeof(ccb));
  1701. memset(iobuf,0,sizeof(iobuf));
  1702. ccb[0]=ATAPI_CMD_START_STOP;
  1703. ccb[4]=0x03; /* start */
  1704. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1705. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1706. if (c!=0)
  1707. return;
  1708. memset(ccb,0,sizeof(ccb));
  1709. memset(iobuf,0,sizeof(iobuf));
  1710. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1711. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1712. if (c!=0)
  1713. return;
  1714. memset(ccb,0,sizeof(ccb));
  1715. memset(iobuf,0,sizeof(iobuf));
  1716. ccb[0]=ATAPI_CMD_READ_CAP;
  1717. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1718. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1719. if (c!=0)
  1720. return;
  1721. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1722. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1723. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1724. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1725. ((unsigned long)iobuf[1]<<16) +
  1726. ((unsigned long)iobuf[2]<< 8) +
  1727. ((unsigned long)iobuf[3]);
  1728. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1729. ((unsigned long)iobuf[5]<<16) +
  1730. ((unsigned long)iobuf[6]<< 8) +
  1731. ((unsigned long)iobuf[7]);
  1732. #ifdef CONFIG_LBA48
  1733. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1734. #endif
  1735. return;
  1736. }
  1737. /*
  1738. * atapi_read:
  1739. * we transfer only one block per command, since the multiple DRQ per
  1740. * command is not yet implemented
  1741. */
  1742. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1743. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1744. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1745. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1746. {
  1747. ulong n = 0;
  1748. unsigned char ccb[12]; /* Command descriptor block */
  1749. ulong cnt;
  1750. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1751. device, blknr, blkcnt, (ulong)buffer);
  1752. do {
  1753. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1754. cnt=ATAPI_READ_MAX_BLOCK;
  1755. } else {
  1756. cnt=blkcnt;
  1757. }
  1758. ccb[0]=ATAPI_CMD_READ_12;
  1759. ccb[1]=0; /* reserved */
  1760. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1761. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1762. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1763. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1764. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1765. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1766. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1767. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1768. ccb[10]=0; /* reserved */
  1769. ccb[11]=0; /* reserved */
  1770. if (atapi_issue_autoreq(device,ccb,12,
  1771. (unsigned char *)buffer,
  1772. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1773. return (n);
  1774. }
  1775. n+=cnt;
  1776. blkcnt-=cnt;
  1777. blknr+=cnt;
  1778. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1779. } while (blkcnt > 0);
  1780. return (n);
  1781. }
  1782. /* ------------------------------------------------------------------------- */
  1783. #endif /* CONFIG_ATAPI */
  1784. U_BOOT_CMD(
  1785. ide, 5, 1, do_ide,
  1786. "ide - IDE sub-system\n",
  1787. "reset - reset IDE controller\n"
  1788. "ide info - show available IDE devices\n"
  1789. "ide device [dev] - show or set current device\n"
  1790. "ide part [dev] - print partition table of one or all IDE devices\n"
  1791. "ide read addr blk# cnt\n"
  1792. "ide write addr blk# cnt - read/write `cnt'"
  1793. " blocks starting at block `blk#'\n"
  1794. " to/from memory address `addr'\n"
  1795. );
  1796. U_BOOT_CMD(
  1797. diskboot, 3, 1, do_diskboot,
  1798. "diskboot- boot from IDE device\n",
  1799. "loadAddr dev:part\n"
  1800. );
  1801. #endif