versatile.c 2.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * (C) Copyright 2004
  14. * ARM Ltd.
  15. * Philippe Robin, <philippe.robin@arm.com>
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #include <common.h>
  36. DECLARE_GLOBAL_DATA_PTR;
  37. void flash__init (void);
  38. void ether__init (void);
  39. void peripheral_power_enable (void);
  40. #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  41. void show_boot_progress(int progress)
  42. {
  43. printf("Boot reached stage %d\n", progress);
  44. }
  45. #endif
  46. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  47. static inline void delay (unsigned long loops)
  48. {
  49. __asm__ volatile ("1:\n"
  50. "subs %0, %1, #1\n"
  51. "bne 1b":"=r" (loops):"0" (loops));
  52. }
  53. /*
  54. * Miscellaneous platform dependent initialisations
  55. */
  56. int board_init (void)
  57. {
  58. /*
  59. * set clock frequency:
  60. * VERSATILE_REFCLK is 32KHz
  61. * VERSATILE_TIMCLK is 1MHz
  62. */
  63. *(volatile unsigned int *)(VERSATILE_SCTL_BASE) |=
  64. ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
  65. (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
  66. /* arch number of Versatile Board */
  67. gd->bd->bi_arch_number = MACH_TYPE_VERSATILE_PB;
  68. /* adress of boot parameters */
  69. gd->bd->bi_boot_params = 0x00000100;
  70. gd->flags = 0;
  71. icache_enable ();
  72. flash__init ();
  73. ether__init ();
  74. return 0;
  75. }
  76. int misc_init_r (void)
  77. {
  78. setenv("verify", "n");
  79. return (0);
  80. }
  81. /******************************
  82. Routine:
  83. Description:
  84. ******************************/
  85. void flash__init (void)
  86. {
  87. }
  88. /*************************************************************
  89. Routine:ether__init
  90. Description: take the Ethernet controller out of reset and wait
  91. for the EEPROM load to complete.
  92. *************************************************************/
  93. void ether__init (void)
  94. {
  95. }
  96. /******************************
  97. Routine:
  98. Description:
  99. ******************************/
  100. int dram_init (void)
  101. {
  102. return 0;
  103. }