flash.c 10 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Alex Zuepke <azu@sysgo.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. ulong myflush(void);
  26. #define FLASH_BANK_SIZE 0x400000 /* 4 MB */
  27. #define MAIN_SECT_SIZE 0x20000 /* 128 KB */
  28. flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
  29. #define CMD_READ_ARRAY 0x00F000F0
  30. #define CMD_UNLOCK1 0x00AA00AA
  31. #define CMD_UNLOCK2 0x00550055
  32. #define CMD_ERASE_SETUP 0x00800080
  33. #define CMD_ERASE_CONFIRM 0x00300030
  34. #define CMD_PROGRAM 0x00A000A0
  35. #define CMD_UNLOCK_BYPASS 0x00200020
  36. #define MEM_FLASH_ADDR1 (*(volatile u32 *)(CFG_FLASH_BASE + (0x00000555 << 2)))
  37. #define MEM_FLASH_ADDR2 (*(volatile u32 *)(CFG_FLASH_BASE + (0x000002AA << 2)))
  38. #define BIT_ERASE_DONE 0x00800080
  39. #define BIT_RDY_MASK 0x00800080
  40. #define BIT_PROGRAM_ERROR 0x00200020
  41. #define BIT_TIMEOUT 0x80000000 /* our flag */
  42. #define READY 1
  43. #define ERR 2
  44. #define TMO 4
  45. /*-----------------------------------------------------------------------
  46. */
  47. ulong flash_init(void)
  48. {
  49. int i, j;
  50. ulong size = 0;
  51. for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
  52. {
  53. ulong flashbase = 0;
  54. flash_info[i].flash_id =
  55. (AMD_MANUFACT & FLASH_VENDMASK) |
  56. (AMD_ID_LV160B & FLASH_TYPEMASK);
  57. flash_info[i].size = FLASH_BANK_SIZE;
  58. flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
  59. memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
  60. if (i == 0)
  61. flashbase = PHYS_FLASH_1;
  62. else
  63. panic("configured too many flash banks!\n");
  64. for (j = 0; j < flash_info[i].sector_count; j++)
  65. {
  66. if (j <= 3)
  67. {
  68. /* 1st one is 32 KB */
  69. if (j == 0)
  70. {
  71. flash_info[i].start[j] = flashbase + 0;
  72. }
  73. /* 2nd and 3rd are both 16 KB */
  74. if ((j == 1) || (j == 2))
  75. {
  76. flash_info[i].start[j] = flashbase + 0x8000 + (j-1)*0x4000;
  77. }
  78. /* 4th 64 KB */
  79. if (j == 3)
  80. {
  81. flash_info[i].start[j] = flashbase + 0x10000;
  82. }
  83. }
  84. else
  85. {
  86. flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
  87. }
  88. }
  89. size += flash_info[i].size;
  90. }
  91. /*
  92. * Protect monitor and environment sectors
  93. * Inferno is complicated, it's hardware locked
  94. */
  95. #ifdef CONFIG_INFERNO
  96. /* first one, 0x00000 to 0x07fff */
  97. flash_protect(FLAG_PROTECT_SET,
  98. CFG_FLASH_BASE + 0x00000,
  99. CFG_FLASH_BASE + 0x08000 - 1,
  100. &flash_info[0]);
  101. /* third to 10th, 0x0c000 - 0xdffff */
  102. flash_protect(FLAG_PROTECT_SET,
  103. CFG_FLASH_BASE + 0x0c000,
  104. CFG_FLASH_BASE + 0xe0000 - 1,
  105. &flash_info[0]);
  106. #else
  107. flash_protect(FLAG_PROTECT_SET,
  108. CFG_FLASH_BASE,
  109. CFG_FLASH_BASE + monitor_flash_len - 1,
  110. &flash_info[0]);
  111. flash_protect(FLAG_PROTECT_SET,
  112. CFG_ENV_ADDR,
  113. CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
  114. &flash_info[0]);
  115. #endif
  116. return size;
  117. }
  118. /*-----------------------------------------------------------------------
  119. */
  120. void flash_print_info (flash_info_t *info)
  121. {
  122. int i;
  123. switch (info->flash_id & FLASH_VENDMASK)
  124. {
  125. case (AMD_MANUFACT & FLASH_VENDMASK):
  126. printf("AMD: ");
  127. break;
  128. default:
  129. printf("Unknown Vendor ");
  130. break;
  131. }
  132. switch (info->flash_id & FLASH_TYPEMASK)
  133. {
  134. case (AMD_ID_LV160B & FLASH_TYPEMASK):
  135. printf("2x Amd29F160BB (16Mbit)\n");
  136. break;
  137. default:
  138. printf("Unknown Chip Type\n");
  139. goto Done;
  140. break;
  141. }
  142. printf(" Size: %ld MB in %d Sectors\n",
  143. info->size >> 20, info->sector_count);
  144. printf(" Sector Start Addresses:");
  145. for (i = 0; i < info->sector_count; i++)
  146. {
  147. if ((i % 5) == 0)
  148. {
  149. printf ("\n ");
  150. }
  151. printf (" %08lX%s", info->start[i],
  152. info->protect[i] ? " (RO)" : " ");
  153. }
  154. printf ("\n");
  155. Done:
  156. ;
  157. }
  158. /*-----------------------------------------------------------------------
  159. */
  160. int flash_erase (flash_info_t *info, int s_first, int s_last)
  161. {
  162. ulong result;
  163. int iflag, cflag, prot, sect;
  164. int rc = ERR_OK;
  165. int chip1, chip2;
  166. /* first look for protection bits */
  167. if (info->flash_id == FLASH_UNKNOWN)
  168. return ERR_UNKNOWN_FLASH_TYPE;
  169. if ((s_first < 0) || (s_first > s_last)) {
  170. return ERR_INVAL;
  171. }
  172. if ((info->flash_id & FLASH_VENDMASK) !=
  173. (AMD_MANUFACT & FLASH_VENDMASK)) {
  174. return ERR_UNKNOWN_FLASH_VENDOR;
  175. }
  176. prot = 0;
  177. for (sect=s_first; sect<=s_last; ++sect) {
  178. if (info->protect[sect]) {
  179. prot++;
  180. }
  181. }
  182. if (prot)
  183. return ERR_PROTECTED;
  184. /*
  185. * Disable interrupts which might cause a timeout
  186. * here. Remember that our exception vectors are
  187. * at address 0 in the flash, and we don't want a
  188. * (ticker) exception to happen while the flash
  189. * chip is in programming mode.
  190. */
  191. cflag = icache_status();
  192. icache_disable();
  193. iflag = disable_interrupts();
  194. /* Start erase on unprotected sectors */
  195. for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
  196. {
  197. printf("Erasing sector %2d ... ", sect);
  198. /* arm simple, non interrupt dependent timer */
  199. reset_timer_masked();
  200. if (info->protect[sect] == 0)
  201. { /* not protected */
  202. vu_long *addr = (vu_long *)(info->start[sect]);
  203. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  204. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  205. MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
  206. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  207. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  208. *addr = CMD_ERASE_CONFIRM;
  209. /* wait until flash is ready */
  210. chip1 = chip2 = 0;
  211. do
  212. {
  213. result = *addr;
  214. /* check timeout */
  215. if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
  216. {
  217. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  218. chip1 = TMO;
  219. break;
  220. }
  221. if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
  222. chip1 = READY;
  223. if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
  224. chip1 = ERR;
  225. if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
  226. chip2 = READY;
  227. if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
  228. chip2 = ERR;
  229. } while (!chip1 || !chip2);
  230. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  231. if (chip1 == ERR || chip2 == ERR)
  232. {
  233. rc = ERR_PROG_ERROR;
  234. goto outahere;
  235. }
  236. if (chip1 == TMO)
  237. {
  238. rc = ERR_TIMOUT;
  239. goto outahere;
  240. }
  241. printf("ok.\n");
  242. }
  243. else /* it was protected */
  244. {
  245. printf("protected!\n");
  246. }
  247. }
  248. if (ctrlc())
  249. printf("User Interrupt!\n");
  250. outahere:
  251. /* allow flash to settle - wait 10 ms */
  252. udelay_masked(10000);
  253. if (iflag)
  254. enable_interrupts();
  255. if (cflag)
  256. icache_enable();
  257. return rc;
  258. }
  259. /*-----------------------------------------------------------------------
  260. * Copy memory to flash
  261. */
  262. static int write_word (flash_info_t *info, ulong dest, ulong data)
  263. {
  264. vu_long *addr = (vu_long *)dest;
  265. ulong result;
  266. int rc = ERR_OK;
  267. int cflag, iflag;
  268. int chip1, chip2;
  269. /*
  270. * Check if Flash is (sufficiently) erased
  271. */
  272. result = *addr;
  273. if ((result & data) != data)
  274. return ERR_NOT_ERASED;
  275. /*
  276. * Disable interrupts which might cause a timeout
  277. * here. Remember that our exception vectors are
  278. * at address 0 in the flash, and we don't want a
  279. * (ticker) exception to happen while the flash
  280. * chip is in programming mode.
  281. */
  282. cflag = icache_status();
  283. icache_disable();
  284. iflag = disable_interrupts();
  285. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  286. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  287. MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
  288. *addr = CMD_PROGRAM;
  289. *addr = data;
  290. /* arm simple, non interrupt dependent timer */
  291. reset_timer_masked();
  292. /* wait until flash is ready */
  293. chip1 = chip2 = 0;
  294. do
  295. {
  296. result = *addr;
  297. /* check timeout */
  298. if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
  299. {
  300. chip1 = ERR | TMO;
  301. break;
  302. }
  303. if (!chip1 && ((result & 0x80) == (data & 0x80)))
  304. chip1 = READY;
  305. if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
  306. {
  307. result = *addr;
  308. if ((result & 0x80) == (data & 0x80))
  309. chip1 = READY;
  310. else
  311. chip1 = ERR;
  312. }
  313. if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
  314. chip2 = READY;
  315. if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR))
  316. {
  317. result = *addr;
  318. if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
  319. chip2 = READY;
  320. else
  321. chip2 = ERR;
  322. }
  323. } while (!chip1 || !chip2);
  324. *addr = CMD_READ_ARRAY;
  325. if (chip1 == ERR || chip2 == ERR || *addr != data)
  326. rc = ERR_PROG_ERROR;
  327. if (iflag)
  328. enable_interrupts();
  329. if (cflag)
  330. icache_enable();
  331. return rc;
  332. }
  333. /*-----------------------------------------------------------------------
  334. * Copy memory to flash.
  335. */
  336. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  337. {
  338. ulong cp, wp, data;
  339. int l;
  340. int i, rc;
  341. wp = (addr & ~3); /* get lower word aligned address */
  342. /*
  343. * handle unaligned start bytes
  344. */
  345. if ((l = addr - wp) != 0) {
  346. data = 0;
  347. for (i=0, cp=wp; i<l; ++i, ++cp) {
  348. data = (data >> 8) | (*(uchar *)cp << 24);
  349. }
  350. for (; i<4 && cnt>0; ++i) {
  351. data = (data >> 8) | (*src++ << 24);
  352. --cnt;
  353. ++cp;
  354. }
  355. for (; cnt==0 && i<4; ++i, ++cp) {
  356. data = (data >> 8) | (*(uchar *)cp << 24);
  357. }
  358. if ((rc = write_word(info, wp, data)) != 0) {
  359. return (rc);
  360. }
  361. wp += 4;
  362. }
  363. /*
  364. * handle word aligned part
  365. */
  366. while (cnt >= 4) {
  367. data = *((vu_long*)src);
  368. if ((rc = write_word(info, wp, data)) != 0) {
  369. return (rc);
  370. }
  371. src += 4;
  372. wp += 4;
  373. cnt -= 4;
  374. }
  375. if (cnt == 0) {
  376. return ERR_OK;
  377. }
  378. /*
  379. * handle unaligned tail bytes
  380. */
  381. data = 0;
  382. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  383. data = (data >> 8) | (*src++ << 24);
  384. --cnt;
  385. }
  386. for (; i<4; ++i, ++cp) {
  387. data = (data >> 8) | (*(uchar *)cp << 24);
  388. }
  389. return write_word(info, wp, data);
  390. }