vsc7385.c 2.2 KB

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  1. /*
  2. * Vitesse 7385 Switch Firmware Upload
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This module uploads proprietary firmware for the Vitesse VSC7385 5-port
  12. * switch.
  13. */
  14. #include <config.h>
  15. #include <common.h>
  16. #include <asm/io.h>
  17. #include <asm/errno.h>
  18. /*
  19. * Upload a Vitesse VSC7385 firmware image to the hardware
  20. *
  21. * This function takes a pointer to a VSC7385 firmware image and a size, and
  22. * uploads that firmware to the VSC7385.
  23. *
  24. * This firmware is typically located at a board-specific flash address,
  25. * and the size is typically 8KB.
  26. *
  27. * The firmware is Vitesse proprietary.
  28. *
  29. * Further details on the register information can be obtained from Vitesse.
  30. */
  31. int vsc7385_upload_firmware(void *firmware, unsigned int size)
  32. {
  33. u8 *fw = firmware;
  34. unsigned int i;
  35. u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050);
  36. u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040);
  37. u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044);
  38. u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048);
  39. u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070);
  40. #ifdef DEBUG
  41. u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060);
  42. #endif
  43. out_be32(gloreset, 3);
  44. udelay(200);
  45. out_be32(icpu_ctrl, 0x8E);
  46. udelay(20);
  47. out_be32(icpu_rom_map, 1);
  48. udelay(20);
  49. /* Write the firmware to I-RAM */
  50. out_be32(icpu_addr, 0);
  51. udelay(20);
  52. for (i = 0; i < size; i++) {
  53. out_be32(icpu_data, fw[i]);
  54. udelay(20);
  55. if (ctrlc())
  56. return -EINTR;
  57. }
  58. /* Read back and compare */
  59. out_be32(icpu_addr, 0);
  60. udelay(20);
  61. for (i = 0; i < size; i++) {
  62. u8 value;
  63. value = (u8) in_be32(icpu_data);
  64. udelay(20);
  65. if (value != fw[i]) {
  66. debug("VSC7385: Upload mismatch: address 0x%x, "
  67. "read value 0x%x, image value 0x%x\n",
  68. i, value, fw[i]);
  69. return -EIO;
  70. }
  71. if (ctrlc())
  72. break;
  73. }
  74. out_be32(icpu_ctrl, 0x0B);
  75. udelay(20);
  76. #ifdef DEBUG
  77. printf("VSC7385: Chip ID is %08x\n", in_be32(chipid));
  78. udelay(20);
  79. #endif
  80. return 0;
  81. }