omap4_sdp4430.h 6.0 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Texas Instruments Incorporated.
  4. * Aneesh V <aneesh@ti.com>
  5. * Steve Sakoman <steve@sakoman.com>
  6. *
  7. * Configuration settings for the TI SDP4430 board.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #ifndef __CONFIG_H
  28. #define __CONFIG_H
  29. /*
  30. * High Level Configuration Options
  31. */
  32. #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
  33. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  34. #define CONFIG_OMAP44XX 1 /* which is a 44XX */
  35. #define CONFIG_OMAP4430 1 /* which is in a 4430 */
  36. #define CONFIG_4430SDP 1 /* working with SDP */
  37. #define CONFIG_ARCH_CPU_INIT
  38. /* Get CPU defs */
  39. #include <asm/arch/cpu.h>
  40. #include <asm/arch/omap4.h>
  41. /* Display CPU and Board Info */
  42. #define CONFIG_DISPLAY_CPUINFO 1
  43. #define CONFIG_DISPLAY_BOARDINFO 1
  44. /* Keep L2 Cache Disabled */
  45. #define CONFIG_L2_OFF 1
  46. /* Clock Defines */
  47. #define V_OSCK 38400000 /* Clock output from T2 */
  48. #define V_SCLK V_OSCK
  49. #undef CONFIG_USE_IRQ /* no support for IRQs */
  50. #define CONFIG_MISC_INIT_R
  51. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  52. #define CONFIG_SETUP_MEMORY_TAGS 1
  53. #define CONFIG_INITRD_TAG 1
  54. #define CONFIG_REVISION_TAG 1
  55. /*
  56. * Size of malloc() pool
  57. * Total Size Environment - 256k
  58. * Malloc - add 256k
  59. */
  60. #define CONFIG_ENV_SIZE (256 << 10)
  61. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
  62. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
  63. /* initial data */
  64. /* Vector Base */
  65. #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
  66. /*
  67. * Hardware drivers
  68. */
  69. /*
  70. * serial port - NS16550 compatible
  71. */
  72. #define V_NS16550_CLK 48000000
  73. #define CONFIG_SYS_NS16550
  74. #define CONFIG_SYS_NS16550_SERIAL
  75. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  76. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  77. #define CONFIG_CONS_INDEX 3
  78. #define CONFIG_SYS_NS16550_COM3 UART3_BASE
  79. #define CONFIG_ENV_IS_NOWHERE
  80. #define CONFIG_ENV_OVERWRITE
  81. #define CONFIG_BAUDRATE 115200
  82. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  83. 115200}
  84. /* I2C */
  85. #define CONFIG_HARD_I2C 1
  86. #define CONFIG_SYS_I2C_SPEED 100000
  87. #define CONFIG_SYS_I2C_SLAVE 1
  88. #define CONFIG_SYS_I2C_BUS 0
  89. #define CONFIG_SYS_I2C_BUS_SELECT 1
  90. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  91. #define CONFIG_I2C_MULTI_BUS 1
  92. /* MMC */
  93. #define CONFIG_MMC 1
  94. #define CONFIG_OMAP3_MMC 1
  95. #define CONFIG_SYS_MMC_SET_DEV 1
  96. #define CONFIG_DOS_PARTITION 1
  97. /* Flash */
  98. #define CONFIG_SYS_NO_FLASH 1
  99. /* commands to include */
  100. #include <config_cmd_default.h>
  101. /* Enabled commands */
  102. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  103. #define CONFIG_CMD_FAT /* FAT support */
  104. #define CONFIG_CMD_I2C /* I2C serial bus support */
  105. #define CONFIG_CMD_MMC /* MMC support */
  106. /* Disabled commands */
  107. #undef CONFIG_CMD_NET
  108. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  109. #undef CONFIG_CMD_IMLS /* List all found images */
  110. /*
  111. * Enabling relocation of u-boot by default
  112. * Relocation can be skipped if u-boot is copied to the TEXT_BASE
  113. */
  114. #undef CONFIG_SKIP_RELOCATE_UBOOT
  115. /*
  116. * Environment setup
  117. */
  118. /* allow overwriting serial config and ethaddr */
  119. #define CONFIG_ENV_OVERWRITE
  120. #define CONFIG_EXTRA_ENV_SETTINGS \
  121. "loadaddr=0x82000000\0" \
  122. "console=ttyS2,115200n8\0" \
  123. "mmcdev=1\0" \
  124. "mmcroot=/dev/mmcblk0p2 rw\0" \
  125. "mmcrootfstype=ext3 rootwait\0" \
  126. "mmcargs=setenv bootargs console=${console} " \
  127. "root=${mmcroot} " \
  128. "rootfstype=${mmcrootfstype}\0" \
  129. "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  130. "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
  131. "source ${loadaddr}\0" \
  132. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  133. "mmcboot=echo Booting from mmc${mmcdev} ...; " \
  134. "run mmcargs; " \
  135. "bootm ${loadaddr}\0" \
  136. #define CONFIG_BOOTCOMMAND \
  137. "if mmc init ${mmcdev}; then " \
  138. "if run loadbootscript; then " \
  139. "run bootscript; " \
  140. "else " \
  141. "if run loaduimage; then " \
  142. "run mmcboot; " \
  143. "else run nandboot; " \
  144. "fi; " \
  145. "fi; " \
  146. "fi"
  147. #define CONFIG_AUTO_COMPLETE 1
  148. /*
  149. * Miscellaneous configurable options
  150. */
  151. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  152. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  153. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  154. #define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
  155. #define CONFIG_SYS_CBSIZE 256
  156. /* Print Buffer Size */
  157. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  158. sizeof(CONFIG_SYS_PROMPT) + 16)
  159. #define CONFIG_SYS_MAXARGS 16
  160. /* Boot Argument Buffer Size */
  161. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  162. /*
  163. * memtest setup
  164. */
  165. #define CONFIG_SYS_MEMTEST_START 0x80000000
  166. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
  167. /* Default load address */
  168. #define CONFIG_SYS_LOAD_ADDR 0x80000000
  169. /* Use General purpose timer 1 */
  170. #define CONFIG_SYS_TIMERBASE GPT1_BASE
  171. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  172. #define CONFIG_SYS_HZ 1000
  173. /*
  174. * Stack sizes
  175. *
  176. * The stack sizes are set up in start.S using the settings below
  177. */
  178. #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
  179. #ifdef CONFIG_USE_IRQ
  180. #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
  181. #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
  182. #endif
  183. /*
  184. * SDRAM Memory Map
  185. * Even though we use two CS all the memory
  186. * is mapped to one contiguous block
  187. */
  188. #define CONFIG_NR_DRAM_BANKS 1
  189. #endif /* __CONFIG_H */