top9000.c 6.9 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian.pop@leadtechdesign.com>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2010
  7. * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <net.h>
  29. #include <netdev.h>
  30. #include <mmc.h>
  31. #include <i2c.h>
  32. #include <spi.h>
  33. #include <asm/arch/at91sam9260.h>
  34. #include <asm/arch/at91sam9260_matrix.h>
  35. #include <asm/arch/at91sam9_smc.h>
  36. #include <asm/arch/at91_common.h>
  37. #include <asm/arch/at91_pmc.h>
  38. #include <asm/arch/at91_rstc.h>
  39. #include <asm/arch/at91_shdwn.h>
  40. #include <asm/arch/gpio.h>
  41. #include <asm/arch/io.h>
  42. #include <asm/arch/hardware.h>
  43. DECLARE_GLOBAL_DATA_PTR;
  44. #ifdef CONFIG_CMD_NAND
  45. static void nand_hw_init(void)
  46. {
  47. unsigned long csa;
  48. /* Enable CS3 */
  49. csa = at91_sys_read(AT91_MATRIX_EBICSA);
  50. at91_sys_write(AT91_MATRIX_EBICSA,
  51. csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
  52. /* Configure SMC CS3 for NAND/SmartMedia */
  53. at91_sys_write(AT91_SMC_SETUP(3),
  54. AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
  55. AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
  56. at91_sys_write(AT91_SMC_PULSE(3),
  57. AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
  58. AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
  59. at91_sys_write(AT91_SMC_CYCLE(3),
  60. AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
  61. at91_sys_write(AT91_SMC_MODE(3),
  62. AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
  63. AT91_SMC_EXNWMODE_DISABLE |
  64. AT91_SMC_DBW_8 |
  65. AT91_SMC_TDF_(2));
  66. /* Configure RDY/BSY */
  67. at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  68. /* Enable NandFlash */
  69. at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  70. }
  71. #endif
  72. #ifdef CONFIG_MACB
  73. static void macb_hw_init(void)
  74. {
  75. /* Enable EMAC clock */
  76. at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
  77. /* Initialize EMAC=MACB hardware */
  78. at91_macb_hw_init();
  79. }
  80. #endif
  81. #ifdef CONFIG_GENERIC_ATMEL_MCI
  82. /* this is a weak define that we are overriding */
  83. int board_mmc_init(bd_t *bd)
  84. {
  85. /* Enable MCI clock */
  86. at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
  87. /* Initialize MCI hardware */
  88. at91_mci_hw_init();
  89. /* This calls the atmel_mmc_init in gen_atmel_mci.c */
  90. return atmel_mci_init((void *)AT91_BASE_MCI);
  91. }
  92. /* this is a weak define that we are overriding */
  93. int board_mmc_getcd(u8 *cd, struct mmc *mmc)
  94. {
  95. /*
  96. * the only currently existing use of this function
  97. * (fsl_esdhc.c) suggests this function must return
  98. * *cs = TRUE if a card is NOT detected -> in most
  99. * cases the value of the pin when the detect switch
  100. * closes to GND
  101. */
  102. *cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
  103. return 0;
  104. }
  105. #endif
  106. int board_early_init_f(void)
  107. {
  108. struct at91_shdwn *shdwn = (struct at91_shdwn *)AT91_SHDWN_BASE;
  109. /*
  110. * make sure the board can be powered on by
  111. * any transition on WKUP
  112. */
  113. writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
  114. &shdwn->mr);
  115. /* Enable clocks for all PIOs */
  116. at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
  117. at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB);
  118. at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
  119. /* set SCL0 and SDA0 to open drain */
  120. at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
  121. at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
  122. at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
  123. at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
  124. at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
  125. at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
  126. /* set SCL1 and SDA1 to open drain */
  127. at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
  128. at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
  129. at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
  130. at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
  131. at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
  132. at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
  133. return 0;
  134. }
  135. int board_init(void)
  136. {
  137. /* arch number of TOP9000 Board */
  138. gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
  139. /* adress of boot parameters */
  140. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  141. at91_serial_hw_init();
  142. #ifdef CONFIG_CMD_NAND
  143. nand_hw_init();
  144. #endif
  145. #ifdef CONFIG_MACB
  146. macb_hw_init();
  147. #endif
  148. #ifdef CONFIG_ATMEL_SPI0
  149. /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
  150. at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
  151. #endif
  152. #ifdef CONFIG_ATMEL_SPI1
  153. at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
  154. #endif
  155. return 0;
  156. }
  157. #ifdef CONFIG_MISC_INIT_R
  158. int misc_init_r(void)
  159. {
  160. /* read 'factory' part of EEPROM */
  161. read_factory_r();
  162. return 0;
  163. }
  164. #endif
  165. int dram_init(void)
  166. {
  167. gd->ram_size = get_ram_size(
  168. (void *)CONFIG_SYS_SDRAM_BASE,
  169. CONFIG_SYS_SDRAM_SIZE);
  170. return 0;
  171. }
  172. #ifdef CONFIG_RESET_PHY_R
  173. void reset_phy(void)
  174. {
  175. /*
  176. * Initialize ethernet HW addresses prior to starting Linux,
  177. * needed for nfsroot.
  178. * TODO: We need to investigate if that is really necessary.
  179. */
  180. eth_init(gd->bd);
  181. }
  182. #endif
  183. int board_eth_init(bd_t *bis)
  184. {
  185. int rc = 0;
  186. int num = 0;
  187. #ifdef CONFIG_MACB
  188. rc = macb_eth_initialize(0,
  189. (void *)AT91_EMAC_BASE,
  190. CONFIG_SYS_PHY_ID);
  191. if (!rc)
  192. num++;
  193. #endif
  194. #ifdef CONFIG_ENC28J60
  195. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
  196. ENC_SPI_CLOCK, SPI_MODE_0);
  197. if (!rc)
  198. num++;
  199. # ifdef CONFIG_ENC28J60_2
  200. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
  201. ENC_SPI_CLOCK, SPI_MODE_0);
  202. if (!rc)
  203. num++;
  204. # ifdef CONFIG_ENC28J60_3
  205. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
  206. ENC_SPI_CLOCK, SPI_MODE_0);
  207. if (!rc)
  208. num++;
  209. # endif
  210. # endif
  211. #endif
  212. return num;
  213. }
  214. /*
  215. * I2C access functions
  216. *
  217. * Note:
  218. * We need to access Bus 0 before relocation to access the
  219. * environment settings.
  220. * However i2c_get_bus_num() cannot be called before
  221. * relocation.
  222. */
  223. #ifdef CONFIG_SOFT_I2C
  224. void iic_init(void)
  225. {
  226. /* ports are now initialized in board_early_init_f() */
  227. }
  228. int iic_read(void)
  229. {
  230. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  231. case 0:
  232. return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
  233. case 1:
  234. return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
  235. }
  236. return 1;
  237. }
  238. void iic_sda(int bit)
  239. {
  240. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  241. case 0:
  242. at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
  243. break;
  244. case 1:
  245. at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
  246. break;
  247. }
  248. }
  249. void iic_scl(int bit)
  250. {
  251. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  252. case 0:
  253. at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
  254. break;
  255. case 1:
  256. at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
  257. break;
  258. }
  259. }
  260. #endif