sys_info.h 2.6 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * Texas Instruments, <www.ti.com>
  4. * Richard Woodruff <r-woodruff2@ti.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #ifndef _OMAP24XX_SYS_INFO_H_
  25. #define _OMAP24XX_SYS_INFO_H_
  26. typedef struct h4_system_data {
  27. /* base board info */
  28. u32 base_b_rev; /* rev from base board i2c */
  29. /* cpu board info */
  30. u32 cpu_b_rev; /* rev from cpu board i2c */
  31. u32 cpu_b_mux; /* mux type on daughter board */
  32. u32 cpu_b_ddr_type; /* mem type */
  33. u32 cpu_b_ddr_speed; /* ddr speed rating */
  34. u32 cpu_b_switches; /* boot ctrl switch settings */
  35. /* cpu info */
  36. u32 cpu_type; /* type of cpu; 2420, 2422, 2430,...*/
  37. u32 cpu_rev; /* rev of given cpu; ES1, ES2,...*/
  38. } h4_sys_data;
  39. #define SDR_DISCRETE 4
  40. #define DDR_STACKED 3 /* stacked part on 2422 */
  41. #define DDR_COMBO 2 /* combo part on cpu daughter card (menalaeus) */
  42. #define DDR_DISCRETE 1 /* 2x16 parts on daughter card */
  43. #define DDR_100 100 /* type found on most mem d-boards */
  44. #define DDR_111 111 /* some combo parts */
  45. #define DDR_133 133 /* most combo, some mem d-boards */
  46. #define DDR_165 165 /* future parts */
  47. #define CPU_2420 0x2420
  48. #define CPU_2422 0x2422
  49. #define CPU_2422_ES1 1
  50. #define CPU_2422_ES2 2
  51. #define CPU_2420_ES1 1
  52. #define CPU_2420_ES2 2
  53. #define CPU_2420_CHIPID 0x0B5D9000
  54. #define CPU_24XX_ID_MASK 0x0FFFF000
  55. #define CPU_242X_REV_MASK 0xF0000000
  56. #define BOARD_H4_MENELAUS 1
  57. #define BOARD_H4_SDP 2
  58. #define GPMC_MUXED 1
  59. #define GPMC_NONMUXED 0
  60. #define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */
  61. #define TYPE_NOR 0x000
  62. #define WIDTH_8BIT 0x0000
  63. #define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
  64. #define I2C_MENELAUS 0x72 /* i2c id for companion chip */
  65. #endif