processor.h 3.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 Waldorf GMBH
  7. * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
  8. * Copyright (C) 1996 Paul M. Antoine
  9. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  10. */
  11. #ifndef _ASM_PROCESSOR_H
  12. #define _ASM_PROCESSOR_H
  13. #include <linux/config.h>
  14. #include <asm/isadep.h>
  15. #include <asm/cachectl.h>
  16. #include <asm/mipsregs.h>
  17. #include <asm/reg.h>
  18. #include <asm/system.h>
  19. /*
  20. * Return current * instruction pointer ("program counter").
  21. */
  22. #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  23. /*
  24. * System setup and hardware flags..
  25. */
  26. extern void (*cpu_wait)(void);
  27. extern unsigned int vced_count, vcei_count;
  28. #define NUM_FPU_REGS 32
  29. typedef __u64 fpureg_t;
  30. /*
  31. * It would be nice to add some more fields for emulator statistics, but there
  32. * are a number of fixed offsets in offset.h and elsewhere that would have to
  33. * be recalculated by hand. So the additional information will be private to
  34. * the FPU emulator for now. See asm-mips/fpu_emulator.h.
  35. */
  36. struct mips_fpu_struct {
  37. fpureg_t fpr[NUM_FPU_REGS];
  38. unsigned int fcr31;
  39. };
  40. #define NUM_DSP_REGS 6
  41. typedef __u32 dspreg_t;
  42. struct mips_dsp_state {
  43. dspreg_t dspr[NUM_DSP_REGS];
  44. unsigned int dspcontrol;
  45. };
  46. typedef struct {
  47. unsigned long seg;
  48. } mm_segment_t;
  49. #define ARCH_MIN_TASKALIGN 8
  50. struct mips_abi;
  51. /*
  52. * If you change thread_struct remember to change the #defines below too!
  53. */
  54. struct thread_struct {
  55. /* Saved main processor registers. */
  56. unsigned long reg16;
  57. unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
  58. unsigned long reg29, reg30, reg31;
  59. /* Saved cp0 stuff. */
  60. unsigned long cp0_status;
  61. /* Saved fpu/fpu emulator stuff. */
  62. struct mips_fpu_struct fpu;
  63. #ifdef CONFIG_MIPS_MT_FPAFF
  64. /* Emulated instruction count */
  65. unsigned long emulated_fp;
  66. /* Saved per-thread scheduler affinity mask */
  67. cpumask_t user_cpus_allowed;
  68. #endif /* CONFIG_MIPS_MT_FPAFF */
  69. /* Saved state of the DSP ASE, if available. */
  70. struct mips_dsp_state dsp;
  71. /* Other stuff associated with the thread. */
  72. unsigned long cp0_badvaddr; /* Last user fault */
  73. unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
  74. unsigned long error_code;
  75. unsigned long trap_no;
  76. unsigned long irix_trampoline; /* Wheee... */
  77. unsigned long irix_oldctx;
  78. struct mips_abi *abi;
  79. };
  80. struct task_struct;
  81. /* Free all resources held by a thread. */
  82. #define release_thread(thread) do { } while(0)
  83. /* Prepare to copy thread state - unlazy all lazy status */
  84. #define prepare_to_copy(tsk) do { } while (0)
  85. #define cpu_relax() barrier()
  86. /*
  87. * Return_address is a replacement for __builtin_return_address(count)
  88. * which on certain architectures cannot reasonably be implemented in GCC
  89. * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
  90. * Note that __builtin_return_address(x>=1) is forbidden because GCC
  91. * aborts compilation on some CPUs. It's simply not possible to unwind
  92. * some CPU's stackframes.
  93. *
  94. * __builtin_return_address works only for non-leaf functions. We avoid the
  95. * overhead of a function call by forcing the compiler to save the return
  96. * address register on the stack.
  97. */
  98. #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
  99. #ifdef CONFIG_CPU_HAS_PREFETCH
  100. #define ARCH_HAS_PREFETCH
  101. static inline void prefetch(const void *addr)
  102. {
  103. __asm__ __volatile__(
  104. " .set mips4 \n"
  105. " pref %0, (%1) \n"
  106. " .set mips0 \n"
  107. :
  108. : "i" (Pref_Load), "r" (addr));
  109. }
  110. #endif
  111. #endif /* _ASM_PROCESSOR_H */