cache.c 2.0 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Alex Zuepke <azu@sysgo.de>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <asm/hardware.h>
  30. void icache_enable (void)
  31. {
  32. s32 i;
  33. /* disable all cache bits */
  34. CLR_REG( REG_SYSCFG, 0x3F);
  35. /* 8KB cache, write enable */
  36. SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01);
  37. /* clear TAG RAM bits */
  38. for ( i = 0; i < 256; i++)
  39. PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000);
  40. /* clear SET0 RAM */
  41. for(i=0; i < 1024; i++)
  42. PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000);
  43. /* clear SET1 RAM */
  44. for(i=0; i < 1024; i++)
  45. PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000);
  46. /* enable cache */
  47. SET_REG( REG_SYSCFG, CACHE_ENABLE);
  48. }
  49. void icache_disable (void)
  50. {
  51. /* disable all cache bits */
  52. CLR_REG( REG_SYSCFG, 0x3F);
  53. }
  54. int icache_status (void)
  55. {
  56. return GET_REG( REG_SYSCFG) & CACHE_ENABLE;
  57. }
  58. void dcache_enable (void)
  59. {
  60. /* we don't have seperate instruction/data caches */
  61. icache_enable();
  62. }
  63. void dcache_disable (void)
  64. {
  65. /* we don't have seperate instruction/data caches */
  66. icache_disable();
  67. }
  68. int dcache_status (void)
  69. {
  70. /* we don't have seperate instruction/data caches */
  71. return icache_status();
  72. }