tpm_tis_i2c.c 13 KB

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  1. /*
  2. * Copyright (C) 2011 Infineon Technologies
  3. *
  4. * Authors:
  5. * Peter Huewe <huewe.external@infineon.com>
  6. *
  7. * Description:
  8. * Device driver for TCG/TCPA TPM (trusted platform module).
  9. * Specifications at www.trustedcomputinggroup.org
  10. *
  11. * This device driver implements the TPM interface as defined in
  12. * the TCG TPM Interface Spec version 1.2, revision 1.0 and the
  13. * Infineon I2C Protocol Stack Specification v0.20.
  14. *
  15. * It is based on the Linux kernel driver tpm.c from Leendert van
  16. * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall.
  17. *
  18. * Version: 2.1.1
  19. *
  20. * See file CREDITS for list of people who contributed to this
  21. * project.
  22. *
  23. * This program is free software; you can redistribute it and/or
  24. * modify it under the terms of the GNU General Public License as
  25. * published by the Free Software Foundation, version 2 of the
  26. * License.
  27. *
  28. * This program is distributed in the hope that it will be useful,
  29. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31. * GNU General Public License for more details.
  32. *
  33. * You should have received a copy of the GNU General Public License
  34. * along with this program; if not, write to the Free Software
  35. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36. * MA 02111-1307 USA
  37. */
  38. #include <common.h>
  39. #include <i2c.h>
  40. #include <linux/types.h>
  41. #include "compatibility.h"
  42. #include "tpm.h"
  43. /* max. buffer size supported by our tpm */
  44. #ifdef TPM_BUFSIZE
  45. #undef TPM_BUFSIZE
  46. #endif
  47. #define TPM_BUFSIZE 1260
  48. /* Address of the TPM on the I2C bus */
  49. #define TPM_I2C_ADDR 0x20
  50. /* max. number of iterations after i2c NAK */
  51. #define MAX_COUNT 3
  52. #define SLEEP_DURATION 60 /*in usec*/
  53. /* max. number of iterations after i2c NAK for 'long' commands
  54. * we need this especially for sending TPM_READY, since the cleanup after the
  55. * transtion to the ready state may take some time, but it is unpredictable
  56. * how long it will take.
  57. */
  58. #define MAX_COUNT_LONG 50
  59. #define SLEEP_DURATION_LONG 210 /* in usec */
  60. /* expected value for DIDVID register */
  61. #define TPM_TIS_I2C_DID_VID 0x000b15d1L
  62. /* Structure to store I2C TPM specific stuff */
  63. struct tpm_inf_dev {
  64. uint addr;
  65. u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */
  66. };
  67. static struct tpm_inf_dev tpm_dev = {
  68. .addr = TPM_I2C_ADDR
  69. };
  70. /*
  71. * iic_tpm_read() - read from TPM register
  72. * @addr: register address to read from
  73. * @buffer: provided by caller
  74. * @len: number of bytes to read
  75. *
  76. * Read len bytes from TPM register and put them into
  77. * buffer (little-endian format, i.e. first byte is put into buffer[0]).
  78. *
  79. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  80. * values have to be swapped.
  81. *
  82. * Return -EIO on error, 0 on success.
  83. */
  84. int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
  85. {
  86. int rc;
  87. int count;
  88. uint myaddr = addr;
  89. /* we have to use uint here, uchar hangs the board */
  90. for (count = 0; count < MAX_COUNT; count++) {
  91. rc = i2c_write(tpm_dev.addr, 0, 0, (uchar *)&myaddr, 1);
  92. if (rc == 0)
  93. break; /*success, break to skip sleep*/
  94. udelay(SLEEP_DURATION);
  95. }
  96. if (rc)
  97. return -rc;
  98. /* After the TPM has successfully received the register address it needs
  99. * some time, thus we're sleeping here again, before retrieving the data
  100. */
  101. for (count = 0; count < MAX_COUNT; count++) {
  102. udelay(SLEEP_DURATION);
  103. rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
  104. if (rc == 0)
  105. break; /*success, break to skip sleep*/
  106. }
  107. if (rc)
  108. return -rc;
  109. return 0;
  110. }
  111. static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
  112. unsigned int sleep_time,
  113. u8 max_count)
  114. {
  115. int rc = 0;
  116. int count;
  117. /* prepare send buffer */
  118. tpm_dev.buf[0] = addr;
  119. memcpy(&(tpm_dev.buf[1]), buffer, len);
  120. for (count = 0; count < max_count; count++) {
  121. rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
  122. if (rc == 0)
  123. break; /*success, break to skip sleep*/
  124. udelay(sleep_time);
  125. }
  126. if (rc)
  127. return -rc;
  128. return 0;
  129. }
  130. /*
  131. * iic_tpm_write() - write to TPM register
  132. * @addr: register address to write to
  133. * @buffer: containing data to be written
  134. * @len: number of bytes to write
  135. *
  136. * Write len bytes from provided buffer to TPM register (little
  137. * endian format, i.e. buffer[0] is written as first byte).
  138. *
  139. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  140. * values have to be swapped.
  141. *
  142. * NOTE: use this function instead of the iic_tpm_write_generic function.
  143. *
  144. * Return -EIO on error, 0 on success
  145. */
  146. static int iic_tpm_write(u8 addr, u8 *buffer, size_t len)
  147. {
  148. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION,
  149. MAX_COUNT);
  150. }
  151. /*
  152. * This function is needed especially for the cleanup situation after
  153. * sending TPM_READY
  154. * */
  155. static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len)
  156. {
  157. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG,
  158. MAX_COUNT_LONG);
  159. }
  160. #define TPM_HEADER_SIZE 10
  161. enum tis_access {
  162. TPM_ACCESS_VALID = 0x80,
  163. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  164. TPM_ACCESS_REQUEST_PENDING = 0x04,
  165. TPM_ACCESS_REQUEST_USE = 0x02,
  166. };
  167. enum tis_status {
  168. TPM_STS_VALID = 0x80,
  169. TPM_STS_COMMAND_READY = 0x40,
  170. TPM_STS_GO = 0x20,
  171. TPM_STS_DATA_AVAIL = 0x10,
  172. TPM_STS_DATA_EXPECT = 0x08,
  173. };
  174. enum tis_defaults {
  175. TIS_SHORT_TIMEOUT = 750, /* ms */
  176. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  177. };
  178. #define TPM_ACCESS(l) (0x0000 | ((l) << 4))
  179. #define TPM_STS(l) (0x0001 | ((l) << 4))
  180. #define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4))
  181. #define TPM_DID_VID(l) (0x0006 | ((l) << 4))
  182. static int check_locality(struct tpm_chip *chip, int loc)
  183. {
  184. u8 buf;
  185. int rc;
  186. rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1);
  187. if (rc < 0)
  188. return rc;
  189. if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  190. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
  191. chip->vendor.locality = loc;
  192. return loc;
  193. }
  194. return -1;
  195. }
  196. static void release_locality(struct tpm_chip *chip, int loc, int force)
  197. {
  198. u8 buf;
  199. if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
  200. return;
  201. if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  202. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) {
  203. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  204. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  205. }
  206. }
  207. static int request_locality(struct tpm_chip *chip, int loc)
  208. {
  209. unsigned long start, stop;
  210. u8 buf = TPM_ACCESS_REQUEST_USE;
  211. if (check_locality(chip, loc) >= 0)
  212. return loc; /* we already have the locality */
  213. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  214. /* wait for burstcount */
  215. start = get_timer(0);
  216. stop = chip->vendor.timeout_a;
  217. do {
  218. if (check_locality(chip, loc) >= 0)
  219. return loc;
  220. msleep(TPM_TIMEOUT);
  221. } while (get_timer(start) < stop);
  222. return -1;
  223. }
  224. static u8 tpm_tis_i2c_status(struct tpm_chip *chip)
  225. {
  226. /* NOTE: since i2c read may fail, return 0 in this case --> time-out */
  227. u8 buf;
  228. if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0)
  229. return 0;
  230. else
  231. return buf;
  232. }
  233. static void tpm_tis_i2c_ready(struct tpm_chip *chip)
  234. {
  235. /* this causes the current command to be aborted */
  236. u8 buf = TPM_STS_COMMAND_READY;
  237. iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1);
  238. }
  239. static ssize_t get_burstcount(struct tpm_chip *chip)
  240. {
  241. unsigned long start, stop;
  242. ssize_t burstcnt;
  243. u8 buf[3];
  244. /* wait for burstcount */
  245. /* which timeout value, spec has 2 answers (c & d) */
  246. start = get_timer(0);
  247. stop = chip->vendor.timeout_d;
  248. do {
  249. /* Note: STS is little endian */
  250. if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3)
  251. < 0)
  252. burstcnt = 0;
  253. else
  254. burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0];
  255. if (burstcnt)
  256. return burstcnt;
  257. msleep(TPM_TIMEOUT);
  258. } while (get_timer(start) < stop);
  259. return -EBUSY;
  260. }
  261. static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
  262. int *status)
  263. {
  264. unsigned long start, stop;
  265. /* check current status */
  266. *status = tpm_tis_i2c_status(chip);
  267. if ((*status & mask) == mask)
  268. return 0;
  269. start = get_timer(0);
  270. stop = timeout;
  271. do {
  272. msleep(TPM_TIMEOUT);
  273. *status = tpm_tis_i2c_status(chip);
  274. if ((*status & mask) == mask)
  275. return 0;
  276. } while (get_timer(start) < stop);
  277. return -ETIME;
  278. }
  279. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  280. {
  281. size_t size = 0;
  282. ssize_t burstcnt;
  283. int rc;
  284. while (size < count) {
  285. burstcnt = get_burstcount(chip);
  286. /* burstcount < 0 = tpm is busy */
  287. if (burstcnt < 0)
  288. return burstcnt;
  289. /* limit received data to max. left */
  290. if (burstcnt > (count - size))
  291. burstcnt = count - size;
  292. rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality),
  293. &(buf[size]),
  294. burstcnt);
  295. if (rc == 0)
  296. size += burstcnt;
  297. }
  298. return size;
  299. }
  300. static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  301. {
  302. int size = 0;
  303. int expected, status;
  304. if (count < TPM_HEADER_SIZE) {
  305. size = -EIO;
  306. goto out;
  307. }
  308. /* read first 10 bytes, including tag, paramsize, and result */
  309. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  310. if (size < TPM_HEADER_SIZE) {
  311. dev_err(chip->dev, "Unable to read header\n");
  312. goto out;
  313. }
  314. expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE);
  315. if ((size_t)expected > count) {
  316. size = -EIO;
  317. goto out;
  318. }
  319. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  320. expected - TPM_HEADER_SIZE);
  321. if (size < expected) {
  322. dev_err(chip->dev, "Unable to read remainder of result\n");
  323. size = -ETIME;
  324. goto out;
  325. }
  326. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  327. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  328. dev_err(chip->dev, "Error left over data\n");
  329. size = -EIO;
  330. goto out;
  331. }
  332. out:
  333. tpm_tis_i2c_ready(chip);
  334. /* The TPM needs some time to clean up here,
  335. * so we sleep rather than keeping the bus busy
  336. */
  337. udelay(2000);
  338. release_locality(chip, chip->vendor.locality, 0);
  339. return size;
  340. }
  341. static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len)
  342. {
  343. int rc, status;
  344. ssize_t burstcnt;
  345. size_t count = 0;
  346. u8 sts = TPM_STS_GO;
  347. if (len > TPM_BUFSIZE)
  348. return -E2BIG; /* command is too long for our tpm, sorry */
  349. if (request_locality(chip, 0) < 0)
  350. return -EBUSY;
  351. status = tpm_tis_i2c_status(chip);
  352. if ((status & TPM_STS_COMMAND_READY) == 0) {
  353. tpm_tis_i2c_ready(chip);
  354. if (wait_for_stat
  355. (chip, TPM_STS_COMMAND_READY,
  356. chip->vendor.timeout_b, &status) < 0) {
  357. rc = -ETIME;
  358. goto out_err;
  359. }
  360. }
  361. while (count < len - 1) {
  362. burstcnt = get_burstcount(chip);
  363. /* burstcount < 0 = tpm is busy */
  364. if (burstcnt < 0)
  365. return burstcnt;
  366. if (burstcnt > (len-1-count))
  367. burstcnt = len-1-count;
  368. #ifdef CONFIG_TPM_I2C_BURST_LIMITATION
  369. if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION)
  370. burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION;
  371. #endif /* CONFIG_TPM_I2C_BURST_LIMITATION */
  372. rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
  373. &(buf[count]), burstcnt);
  374. if (rc == 0)
  375. count += burstcnt;
  376. wait_for_stat(chip, TPM_STS_VALID,
  377. chip->vendor.timeout_c, &status);
  378. if ((status & TPM_STS_DATA_EXPECT) == 0) {
  379. rc = -EIO;
  380. goto out_err;
  381. }
  382. }
  383. /* write last byte */
  384. iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1);
  385. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  386. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  387. rc = -EIO;
  388. goto out_err;
  389. }
  390. /* go and do it */
  391. iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1);
  392. return len;
  393. out_err:
  394. tpm_tis_i2c_ready(chip);
  395. /* The TPM needs some time to clean up here,
  396. * so we sleep rather than keeping the bus busy
  397. */
  398. udelay(2000);
  399. release_locality(chip, chip->vendor.locality, 0);
  400. return rc;
  401. }
  402. static struct tpm_vendor_specific tpm_tis_i2c = {
  403. .status = tpm_tis_i2c_status,
  404. .recv = tpm_tis_i2c_recv,
  405. .send = tpm_tis_i2c_send,
  406. .cancel = tpm_tis_i2c_ready,
  407. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  408. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  409. .req_canceled = TPM_STS_COMMAND_READY,
  410. };
  411. /* initialisation of i2c tpm */
  412. int tpm_vendor_init(uint32_t dev_addr)
  413. {
  414. u32 vendor;
  415. uint old_addr;
  416. int rc = 0;
  417. struct tpm_chip *chip;
  418. old_addr = tpm_dev.addr;
  419. if (dev_addr != 0)
  420. tpm_dev.addr = dev_addr;
  421. chip = tpm_register_hardware(&tpm_tis_i2c);
  422. if (chip < 0) {
  423. rc = -ENODEV;
  424. goto out_err;
  425. }
  426. /* Disable interrupts (not supported) */
  427. chip->vendor.irq = 0;
  428. /* Default timeouts */
  429. chip->vendor.timeout_a = TIS_SHORT_TIMEOUT;
  430. chip->vendor.timeout_b = TIS_LONG_TIMEOUT;
  431. chip->vendor.timeout_c = TIS_SHORT_TIMEOUT;
  432. chip->vendor.timeout_d = TIS_SHORT_TIMEOUT;
  433. if (request_locality(chip, 0) != 0) {
  434. rc = -ENODEV;
  435. goto out_err;
  436. }
  437. /* read four bytes from DID_VID register */
  438. if (iic_tpm_read(TPM_DID_VID(0), (uchar *)&vendor, 4) < 0) {
  439. rc = -EIO;
  440. goto out_release;
  441. }
  442. /* create DID_VID register value, after swapping to little-endian */
  443. vendor = be32_to_cpu(vendor);
  444. if (vendor != TPM_TIS_I2C_DID_VID) {
  445. rc = -ENODEV;
  446. goto out_release;
  447. }
  448. dev_info(dev, "1.2 TPM (device-id 0x%X)\n", vendor >> 16);
  449. /*
  450. * A timeout query to TPM can be placed here.
  451. * Standard timeout values are used so far
  452. */
  453. return 0;
  454. out_release:
  455. release_locality(chip, 0, 1);
  456. out_err:
  457. tpm_dev.addr = old_addr;
  458. return rc;
  459. }
  460. void tpm_vendor_cleanup(struct tpm_chip *chip)
  461. {
  462. release_locality(chip, chip->vendor.locality, 1);
  463. }