isp116x-hcd.c 36 KB

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  1. /*
  2. * ISP116x HCD (Host Controller Driver) for u-boot.
  3. *
  4. * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. *
  22. *
  23. * Derived in part from the SL811 HCD driver "u-boot/drivers/usb/sl811_usb.c"
  24. * (original copyright message follows):
  25. *
  26. * (C) Copyright 2004
  27. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  28. *
  29. * This code is based on linux driver for sl811hs chip, source at
  30. * drivers/usb/host/sl811.c:
  31. *
  32. * SL811 Host Controller Interface driver for USB.
  33. *
  34. * Copyright (c) 2003/06, Courage Co., Ltd.
  35. *
  36. * Based on:
  37. * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
  38. * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
  39. * Adam Richter, Gregory P. Smith;
  40. * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
  41. * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
  42. *
  43. * [[GNU/GPL disclaimer]]
  44. *
  45. * and in part from AU1x00 OHCI HCD driver "u-boot/cpu/mips/au1x00_usb_ohci.c"
  46. * (original copyright message follows):
  47. *
  48. * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
  49. *
  50. * (C) Copyright 2003
  51. * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  52. *
  53. * [[GNU/GPL disclaimer]]
  54. *
  55. * Note: Part of this code has been derived from linux
  56. */
  57. #include <common.h>
  58. #include <asm/io.h>
  59. #include <usb.h>
  60. #include <malloc.h>
  61. #include <linux/list.h>
  62. /*
  63. * ISP116x chips require certain delays between accesses to its
  64. * registers. The following timing options exist.
  65. *
  66. * 1. Configure your memory controller (the best)
  67. * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
  68. *
  69. * Value is in microseconds.
  70. */
  71. #ifdef ISP116X_HCD_USE_UDELAY
  72. #define UDELAY 1
  73. #endif
  74. /*
  75. * On some (slowly?) machines an extra delay after data packing into
  76. * controller's FIFOs is required, * otherwise you may get the following
  77. * error:
  78. *
  79. * uboot> usb start
  80. * (Re)start USB...
  81. * USB: scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
  82. * isp116x: isp116x_submit_job: ****** FIFO not ready! ******
  83. *
  84. * USB device not responding, giving up (status=4)
  85. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  86. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  87. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  88. * 3 USB Device(s) found
  89. * scanning bus for storage devices... 0 Storage Device(s) found
  90. *
  91. * Value is in milliseconds.
  92. */
  93. #ifdef ISP116X_HCD_USE_EXTRA_DELAY
  94. #define EXTRA_DELAY 2
  95. #endif
  96. /*
  97. * Enable the following defines if you wish enable debugging messages.
  98. */
  99. #undef DEBUG /* enable debugging messages */
  100. #undef TRACE /* enable tracing code */
  101. #undef VERBOSE /* verbose debugging messages */
  102. #include "isp116x.h"
  103. #define DRIVER_VERSION "08 Jan 2007"
  104. static const char hcd_name[] = "isp116x-hcd";
  105. struct isp116x isp116x_dev;
  106. struct isp116x_platform_data isp116x_board;
  107. static int got_rhsc; /* root hub status change */
  108. struct usb_device *devgone; /* device which was disconnected */
  109. static int rh_devnum; /* address of Root Hub endpoint */
  110. /* ------------------------------------------------------------------------- */
  111. #define ALIGN(x,a) (((x)+(a)-1UL)&~((a)-1UL))
  112. #define min_t(type,x,y) \
  113. ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
  114. /* ------------------------------------------------------------------------- */
  115. static int isp116x_reset(struct isp116x *isp116x);
  116. /* --- Debugging functions ------------------------------------------------- */
  117. #define isp116x_show_reg(d, r) { \
  118. if ((r) < 0x20) { \
  119. DBG("%-12s[%02x]: %08x", #r, \
  120. r, isp116x_read_reg32(d, r)); \
  121. } else { \
  122. DBG("%-12s[%02x]: %04x", #r, \
  123. r, isp116x_read_reg16(d, r)); \
  124. } \
  125. }
  126. #define isp116x_show_regs(d) { \
  127. isp116x_show_reg(d, HCREVISION); \
  128. isp116x_show_reg(d, HCCONTROL); \
  129. isp116x_show_reg(d, HCCMDSTAT); \
  130. isp116x_show_reg(d, HCINTSTAT); \
  131. isp116x_show_reg(d, HCINTENB); \
  132. isp116x_show_reg(d, HCFMINTVL); \
  133. isp116x_show_reg(d, HCFMREM); \
  134. isp116x_show_reg(d, HCFMNUM); \
  135. isp116x_show_reg(d, HCLSTHRESH); \
  136. isp116x_show_reg(d, HCRHDESCA); \
  137. isp116x_show_reg(d, HCRHDESCB); \
  138. isp116x_show_reg(d, HCRHSTATUS); \
  139. isp116x_show_reg(d, HCRHPORT1); \
  140. isp116x_show_reg(d, HCRHPORT2); \
  141. isp116x_show_reg(d, HCHWCFG); \
  142. isp116x_show_reg(d, HCDMACFG); \
  143. isp116x_show_reg(d, HCXFERCTR); \
  144. isp116x_show_reg(d, HCuPINT); \
  145. isp116x_show_reg(d, HCuPINTENB); \
  146. isp116x_show_reg(d, HCCHIPID); \
  147. isp116x_show_reg(d, HCSCRATCH); \
  148. isp116x_show_reg(d, HCITLBUFLEN); \
  149. isp116x_show_reg(d, HCATLBUFLEN); \
  150. isp116x_show_reg(d, HCBUFSTAT); \
  151. isp116x_show_reg(d, HCRDITL0LEN); \
  152. isp116x_show_reg(d, HCRDITL1LEN); \
  153. }
  154. #if defined(TRACE)
  155. static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
  156. {
  157. struct isp116x *isp116x = &isp116x_dev;
  158. return isp116x_read_reg32(isp116x, HCFMNUM);
  159. }
  160. static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  161. int len, char *str)
  162. {
  163. #if defined(VERBOSE)
  164. int i;
  165. #endif
  166. DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
  167. str,
  168. isp116x_get_current_frame_number(dev),
  169. usb_pipedevice(pipe),
  170. usb_pipeendpoint(pipe),
  171. usb_pipeout(pipe) ? 'O' : 'I',
  172. usb_pipetype(pipe) < 2 ?
  173. (usb_pipeint(pipe) ?
  174. "INTR" : "ISOC") :
  175. (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
  176. #if defined(VERBOSE)
  177. if (len > 0 && buffer) {
  178. printf(__FILE__ ": data(%d):", len);
  179. for (i = 0; i < 16 && i < len; i++)
  180. printf(" %02x", ((__u8 *) buffer)[i]);
  181. printf("%s\n", i < len ? "..." : "");
  182. }
  183. #endif
  184. }
  185. #define PTD_DIR_STR(ptd) ({char __c; \
  186. switch(PTD_GET_DIR(ptd)){ \
  187. case 0: __c = 's'; break; \
  188. case 1: __c = 'o'; break; \
  189. default: __c = 'i'; break; \
  190. }; __c;})
  191. /*
  192. Dump PTD info. The code documents the format
  193. perfectly, right :)
  194. */
  195. static inline void dump_ptd(struct ptd *ptd)
  196. {
  197. #if defined(VERBOSE)
  198. int k;
  199. #endif
  200. DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
  201. PTD_GET_CC(ptd),
  202. PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
  203. PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
  204. PTD_GET_TOGGLE(ptd),
  205. PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
  206. #if defined(VERBOSE)
  207. printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
  208. for (k = 0; k < sizeof(struct ptd); ++k)
  209. printf("%02x ", ((u8 *) ptd)[k]);
  210. printf("\n");
  211. #endif
  212. }
  213. static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
  214. {
  215. #if defined(VERBOSE)
  216. int k;
  217. if (type == 0 /* 0ut data */ ) {
  218. printf("isp116x: %s: out data: ", __FUNCTION__);
  219. for (k = 0; k < PTD_GET_LEN(ptd); ++k)
  220. printf("%02x ", ((u8 *) buf)[k]);
  221. printf("\n");
  222. }
  223. if (type == 1 /* 1n data */ ) {
  224. printf("isp116x: %s: in data: ", __FUNCTION__);
  225. for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
  226. printf("%02x ", ((u8 *) buf)[k]);
  227. printf("\n");
  228. }
  229. if (PTD_GET_LAST(ptd))
  230. DBG("--- last PTD ---");
  231. #endif
  232. }
  233. #else
  234. #define dump_msg(dev, pipe, buffer, len, str) do { } while (0)
  235. #define dump_pkt(dev, pipe, buffer, len, setup, str, small) do {} while (0)
  236. #define dump_ptd(ptd) do {} while (0)
  237. #define dump_ptd_data(ptd, buf, type) do {} while (0)
  238. #endif
  239. /* --- Virtual Root Hub ---------------------------------------------------- */
  240. /* Device descriptor */
  241. static __u8 root_hub_dev_des[] = {
  242. 0x12, /* __u8 bLength; */
  243. 0x01, /* __u8 bDescriptorType; Device */
  244. 0x10, /* __u16 bcdUSB; v1.1 */
  245. 0x01,
  246. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  247. 0x00, /* __u8 bDeviceSubClass; */
  248. 0x00, /* __u8 bDeviceProtocol; */
  249. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  250. 0x00, /* __u16 idVendor; */
  251. 0x00,
  252. 0x00, /* __u16 idProduct; */
  253. 0x00,
  254. 0x00, /* __u16 bcdDevice; */
  255. 0x00,
  256. 0x00, /* __u8 iManufacturer; */
  257. 0x01, /* __u8 iProduct; */
  258. 0x00, /* __u8 iSerialNumber; */
  259. 0x01 /* __u8 bNumConfigurations; */
  260. };
  261. /* Configuration descriptor */
  262. static __u8 root_hub_config_des[] = {
  263. 0x09, /* __u8 bLength; */
  264. 0x02, /* __u8 bDescriptorType; Configuration */
  265. 0x19, /* __u16 wTotalLength; */
  266. 0x00,
  267. 0x01, /* __u8 bNumInterfaces; */
  268. 0x01, /* __u8 bConfigurationValue; */
  269. 0x00, /* __u8 iConfiguration; */
  270. 0x40, /* __u8 bmAttributes;
  271. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  272. 0x00, /* __u8 MaxPower; */
  273. /* interface */
  274. 0x09, /* __u8 if_bLength; */
  275. 0x04, /* __u8 if_bDescriptorType; Interface */
  276. 0x00, /* __u8 if_bInterfaceNumber; */
  277. 0x00, /* __u8 if_bAlternateSetting; */
  278. 0x01, /* __u8 if_bNumEndpoints; */
  279. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  280. 0x00, /* __u8 if_bInterfaceSubClass; */
  281. 0x00, /* __u8 if_bInterfaceProtocol; */
  282. 0x00, /* __u8 if_iInterface; */
  283. /* endpoint */
  284. 0x07, /* __u8 ep_bLength; */
  285. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  286. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  287. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  288. 0x00, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  289. 0x02,
  290. 0xff /* __u8 ep_bInterval; 255 ms */
  291. };
  292. static unsigned char root_hub_str_index0[] = {
  293. 0x04, /* __u8 bLength; */
  294. 0x03, /* __u8 bDescriptorType; String-descriptor */
  295. 0x09, /* __u8 lang ID */
  296. 0x04, /* __u8 lang ID */
  297. };
  298. static unsigned char root_hub_str_index1[] = {
  299. 0x22, /* __u8 bLength; */
  300. 0x03, /* __u8 bDescriptorType; String-descriptor */
  301. 'I', /* __u8 Unicode */
  302. 0, /* __u8 Unicode */
  303. 'S', /* __u8 Unicode */
  304. 0, /* __u8 Unicode */
  305. 'P', /* __u8 Unicode */
  306. 0, /* __u8 Unicode */
  307. '1', /* __u8 Unicode */
  308. 0, /* __u8 Unicode */
  309. '1', /* __u8 Unicode */
  310. 0, /* __u8 Unicode */
  311. '6', /* __u8 Unicode */
  312. 0, /* __u8 Unicode */
  313. 'x', /* __u8 Unicode */
  314. 0, /* __u8 Unicode */
  315. ' ', /* __u8 Unicode */
  316. 0, /* __u8 Unicode */
  317. 'R', /* __u8 Unicode */
  318. 0, /* __u8 Unicode */
  319. 'o', /* __u8 Unicode */
  320. 0, /* __u8 Unicode */
  321. 'o', /* __u8 Unicode */
  322. 0, /* __u8 Unicode */
  323. 't', /* __u8 Unicode */
  324. 0, /* __u8 Unicode */
  325. ' ', /* __u8 Unicode */
  326. 0, /* __u8 Unicode */
  327. 'H', /* __u8 Unicode */
  328. 0, /* __u8 Unicode */
  329. 'u', /* __u8 Unicode */
  330. 0, /* __u8 Unicode */
  331. 'b', /* __u8 Unicode */
  332. 0, /* __u8 Unicode */
  333. };
  334. /*
  335. * Hub class-specific descriptor is constructed dynamically
  336. */
  337. /* --- Virtual root hub management functions ------------------------------- */
  338. static int rh_check_port_status(struct isp116x *isp116x)
  339. {
  340. u32 temp, ndp, i;
  341. int res;
  342. res = -1;
  343. temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  344. ndp = (temp & RH_A_NDP);
  345. for (i = 0; i < ndp; i++) {
  346. temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
  347. /* check for a device disconnect */
  348. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  349. (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
  350. res = i;
  351. break;
  352. }
  353. }
  354. return res;
  355. }
  356. /* --- HC management functions --------------------------------------------- */
  357. /* Write len bytes to fifo, pad till 32-bit boundary
  358. */
  359. static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
  360. {
  361. u8 *dp = (u8 *) buf;
  362. u16 *dp2 = (u16 *) buf;
  363. u16 w;
  364. int quot = len % 4;
  365. if ((unsigned long)dp2 & 1) {
  366. /* not aligned */
  367. for (; len > 1; len -= 2) {
  368. w = *dp++;
  369. w |= *dp++ << 8;
  370. isp116x_raw_write_data16(isp116x, w);
  371. }
  372. if (len)
  373. isp116x_write_data16(isp116x, (u16) * dp);
  374. } else {
  375. /* aligned */
  376. for (; len > 1; len -= 2)
  377. isp116x_raw_write_data16(isp116x, *dp2++);
  378. if (len)
  379. isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
  380. }
  381. if (quot == 1 || quot == 2)
  382. isp116x_raw_write_data16(isp116x, 0);
  383. }
  384. /* Read len bytes from fifo and then read till 32-bit boundary
  385. */
  386. static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
  387. {
  388. u8 *dp = (u8 *) buf;
  389. u16 *dp2 = (u16 *) buf;
  390. u16 w;
  391. int quot = len % 4;
  392. if ((unsigned long)dp2 & 1) {
  393. /* not aligned */
  394. for (; len > 1; len -= 2) {
  395. w = isp116x_raw_read_data16(isp116x);
  396. *dp++ = w & 0xff;
  397. *dp++ = (w >> 8) & 0xff;
  398. }
  399. if (len)
  400. *dp = 0xff & isp116x_read_data16(isp116x);
  401. } else {
  402. /* aligned */
  403. for (; len > 1; len -= 2)
  404. *dp2++ = isp116x_raw_read_data16(isp116x);
  405. if (len)
  406. *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
  407. }
  408. if (quot == 1 || quot == 2)
  409. isp116x_raw_read_data16(isp116x);
  410. }
  411. /* Write PTD's and data for scheduled transfers into the fifo ram.
  412. * Fifo must be empty and ready */
  413. static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  414. unsigned long pipe, struct ptd *ptd, int n, void *data,
  415. int len)
  416. {
  417. int buflen = n * sizeof(struct ptd) + len;
  418. int i, done;
  419. DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  420. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  421. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  422. isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
  423. done = 0;
  424. for (i = 0; i < n; i++) {
  425. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  426. dump_ptd(&ptd[i]);
  427. isp116x_write_data16(isp116x, ptd[i].count);
  428. isp116x_write_data16(isp116x, ptd[i].mps);
  429. isp116x_write_data16(isp116x, ptd[i].len);
  430. isp116x_write_data16(isp116x, ptd[i].faddr);
  431. dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
  432. write_ptddata_to_fifo(isp116x,
  433. (__u8 *) data + done,
  434. PTD_GET_LEN(&ptd[i]));
  435. done += PTD_GET_LEN(&ptd[i]);
  436. }
  437. }
  438. /* Read the processed PTD's and data from fifo ram back to URBs' buffers.
  439. * Fifo must be full and done */
  440. static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  441. unsigned long pipe, struct ptd *ptd, int n, void *data,
  442. int len)
  443. {
  444. int buflen = n * sizeof(struct ptd) + len;
  445. int i, done, cc, ret;
  446. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  447. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  448. isp116x_write_addr(isp116x, HCATLPORT);
  449. ret = TD_CC_NOERROR;
  450. done = 0;
  451. for (i = 0; i < n; i++) {
  452. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  453. ptd[i].count = isp116x_read_data16(isp116x);
  454. ptd[i].mps = isp116x_read_data16(isp116x);
  455. ptd[i].len = isp116x_read_data16(isp116x);
  456. ptd[i].faddr = isp116x_read_data16(isp116x);
  457. dump_ptd(&ptd[i]);
  458. read_ptddata_from_fifo(isp116x,
  459. (__u8 *) data + done,
  460. PTD_GET_LEN(&ptd[i]));
  461. dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
  462. done += PTD_GET_LEN(&ptd[i]);
  463. cc = PTD_GET_CC(&ptd[i]);
  464. /* Data underrun means basically that we had more buffer space than
  465. * the function had data. It is perfectly normal but upper levels have
  466. * to know how much we actually transferred.
  467. */
  468. if (cc == TD_NOTACCESSED ||
  469. (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
  470. ret = cc;
  471. }
  472. DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  473. return ret;
  474. }
  475. /* Interrupt handling
  476. */
  477. static int isp116x_interrupt(struct isp116x *isp116x)
  478. {
  479. u16 irqstat;
  480. u32 intstat;
  481. int ret = 0;
  482. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  483. irqstat = isp116x_read_reg16(isp116x, HCuPINT);
  484. isp116x_write_reg16(isp116x, HCuPINT, irqstat);
  485. DBG(">>>>>> irqstat %x <<<<<<", irqstat);
  486. if (irqstat & HCuPINT_ATL) {
  487. DBG(">>>>>> HCuPINT_ATL <<<<<<");
  488. udelay(500);
  489. ret = 1;
  490. }
  491. if (irqstat & HCuPINT_OPR) {
  492. intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
  493. isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
  494. DBG(">>>>>> HCuPINT_OPR %x <<<<<<", intstat);
  495. if (intstat & HCINT_UE) {
  496. ERR("unrecoverable error, controller disabled");
  497. /* FIXME: be optimistic, hope that bug won't repeat
  498. * often. Make some non-interrupt context restart the
  499. * controller. Count and limit the retries though;
  500. * either hardware or software errors can go forever...
  501. */
  502. isp116x_reset(isp116x);
  503. ret = -1;
  504. return -1;
  505. }
  506. if (intstat & HCINT_RHSC) {
  507. got_rhsc = 1;
  508. ret = 1;
  509. /* When root hub or any of its ports is going
  510. to come out of suspend, it may take more
  511. than 10ms for status bits to stabilize. */
  512. wait_ms(20);
  513. }
  514. if (intstat & HCINT_SO) {
  515. ERR("schedule overrun");
  516. ret = -1;
  517. }
  518. irqstat &= ~HCuPINT_OPR;
  519. }
  520. return ret;
  521. }
  522. /* With one PTD we can transfer almost 1K in one go;
  523. * HC does the splitting into endpoint digestible transactions
  524. */
  525. struct ptd ptd[1];
  526. static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
  527. {
  528. unsigned mpck = usb_maxpacket(dev, pipe);
  529. /* One PTD can transfer 1023 bytes but try to always
  530. * transfer multiples of endpoint buffer size
  531. */
  532. return 1023 / mpck * mpck;
  533. }
  534. /* Do an USB transfer
  535. */
  536. static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
  537. int dir, void *buffer, int len)
  538. {
  539. struct isp116x *isp116x = &isp116x_dev;
  540. int type = usb_pipetype(pipe);
  541. int epnum = usb_pipeendpoint(pipe);
  542. int max = usb_maxpacket(dev, pipe);
  543. int dir_out = usb_pipeout(pipe);
  544. int speed_low = usb_pipeslow(pipe);
  545. int i, done = 0, stat, timeout, cc;
  546. /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
  547. int retries = 500;
  548. DBG("------------------------------------------------");
  549. dump_msg(dev, pipe, buffer, len, "SUBMIT");
  550. DBG("------------------------------------------------");
  551. if (len >= 1024) {
  552. ERR("Too big job");
  553. dev->status = USB_ST_CRC_ERR;
  554. return -1;
  555. }
  556. if (isp116x->disabled) {
  557. ERR("EPIPE");
  558. dev->status = USB_ST_CRC_ERR;
  559. return -1;
  560. }
  561. /* device pulled? Shortcut the action. */
  562. if (devgone == dev) {
  563. ERR("ENODEV");
  564. dev->status = USB_ST_CRC_ERR;
  565. return USB_ST_CRC_ERR;
  566. }
  567. if (!max) {
  568. ERR("pipesize for pipe %lx is zero", pipe);
  569. dev->status = USB_ST_CRC_ERR;
  570. return -1;
  571. }
  572. if (type == PIPE_ISOCHRONOUS) {
  573. ERR("isochronous transfers not supported");
  574. dev->status = USB_ST_CRC_ERR;
  575. return -1;
  576. }
  577. /* FIFO not empty? */
  578. if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
  579. ERR("****** FIFO not empty! ******");
  580. dev->status = USB_ST_BUF_ERR;
  581. return -1;
  582. }
  583. retry:
  584. isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
  585. /* Prepare the PTD data */
  586. ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
  587. PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
  588. ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
  589. ptd->len = PTD_LEN(len) | PTD_DIR(dir);
  590. ptd->faddr = PTD_FA(usb_pipedevice(pipe));
  591. retry_same:
  592. /* Pack data into FIFO ram */
  593. pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  594. #ifdef EXTRA_DELAY
  595. wait_ms(EXTRA_DELAY);
  596. #endif
  597. /* Start the data transfer */
  598. /* Allow more time for a BULK device to react - some are slow */
  599. if (usb_pipebulk(pipe))
  600. timeout = 5000;
  601. else
  602. timeout = 100;
  603. /* Wait for it to complete */
  604. for (;;) {
  605. /* Check whether the controller is done */
  606. stat = isp116x_interrupt(isp116x);
  607. if (stat < 0) {
  608. dev->status = USB_ST_CRC_ERR;
  609. break;
  610. }
  611. if (stat > 0)
  612. break;
  613. /* Check the timeout */
  614. if (--timeout)
  615. udelay(1);
  616. else {
  617. ERR("CTL:TIMEOUT ");
  618. stat = USB_ST_CRC_ERR;
  619. break;
  620. }
  621. }
  622. /* We got an Root Hub Status Change interrupt */
  623. if (got_rhsc) {
  624. isp116x_show_regs(isp116x);
  625. got_rhsc = 0;
  626. /* Abuse timeout */
  627. timeout = rh_check_port_status(isp116x);
  628. if (timeout >= 0) {
  629. /*
  630. * FIXME! NOTE! AAAARGH!
  631. * This is potentially dangerous because it assumes
  632. * that only one device is ever plugged in!
  633. */
  634. devgone = dev;
  635. }
  636. }
  637. /* Ok, now we can read transfer status */
  638. /* FIFO not ready? */
  639. if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
  640. ERR("****** FIFO not ready! ******");
  641. dev->status = USB_ST_BUF_ERR;
  642. return -1;
  643. }
  644. /* Unpack data from FIFO ram */
  645. cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  646. i = PTD_GET_COUNT(ptd);
  647. done += i;
  648. buffer += i;
  649. len -= i;
  650. /* There was some kind of real problem; Prepare the PTD again
  651. * and retry from the failed transaction on
  652. */
  653. if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
  654. if (retries >= 100) {
  655. retries -= 100;
  656. /* The chip will have toggled the toggle bit for the failed
  657. * transaction too. We have to toggle it back.
  658. */
  659. usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
  660. goto retry;
  661. }
  662. }
  663. /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
  664. * the transactions from the first on for the whole frame. It may be busy and we retry
  665. * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
  666. * PTD didn't make it because the function was busy or the frame ended before the PTD
  667. * finished. We prepare the rest of the data and try again.
  668. */
  669. else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
  670. if (retries) {
  671. --retries;
  672. if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
  673. usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  674. goto retry;
  675. }
  676. }
  677. if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
  678. DBG("****** completition code error %x ******", cc);
  679. switch (cc) {
  680. case TD_CC_BITSTUFFING:
  681. dev->status = USB_ST_BIT_ERR;
  682. break;
  683. case TD_CC_STALL:
  684. dev->status = USB_ST_STALLED;
  685. break;
  686. case TD_BUFFEROVERRUN:
  687. case TD_BUFFERUNDERRUN:
  688. dev->status = USB_ST_BUF_ERR;
  689. break;
  690. default:
  691. dev->status = USB_ST_CRC_ERR;
  692. }
  693. return -cc;
  694. }
  695. else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  696. dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
  697. dev->status = 0;
  698. return done;
  699. }
  700. /* Adapted from au1x00_usb_ohci.c
  701. */
  702. static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  703. void *buffer, int transfer_len,
  704. struct devrequest *cmd)
  705. {
  706. struct isp116x *isp116x = &isp116x_dev;
  707. u32 tmp = 0;
  708. int leni = transfer_len;
  709. int len = 0;
  710. int stat = 0;
  711. u32 datab[4];
  712. u8 *data_buf = (u8 *) datab;
  713. u16 bmRType_bReq;
  714. u16 wValue;
  715. u16 wIndex;
  716. u16 wLength;
  717. if (usb_pipeint(pipe)) {
  718. INFO("Root-Hub submit IRQ: NOT implemented");
  719. return 0;
  720. }
  721. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  722. wValue = swap_16(cmd->value);
  723. wIndex = swap_16(cmd->index);
  724. wLength = swap_16(cmd->length);
  725. DBG("--- HUB ----------------------------------------");
  726. DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
  727. bmRType_bReq, wValue, wIndex, wLength);
  728. dump_msg(dev, pipe, buffer, transfer_len, "RH");
  729. DBG("------------------------------------------------");
  730. switch (bmRType_bReq) {
  731. case RH_GET_STATUS:
  732. DBG("RH_GET_STATUS");
  733. *(__u16 *) data_buf = swap_16(1);
  734. len = 2;
  735. break;
  736. case RH_GET_STATUS | RH_INTERFACE:
  737. DBG("RH_GET_STATUS | RH_INTERFACE");
  738. *(__u16 *) data_buf = swap_16(0);
  739. len = 2;
  740. break;
  741. case RH_GET_STATUS | RH_ENDPOINT:
  742. DBG("RH_GET_STATUS | RH_ENDPOINT");
  743. *(__u16 *) data_buf = swap_16(0);
  744. len = 2;
  745. break;
  746. case RH_GET_STATUS | RH_CLASS:
  747. DBG("RH_GET_STATUS | RH_CLASS");
  748. tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  749. *(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
  750. len = 4;
  751. break;
  752. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  753. DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
  754. tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
  755. *(__u32 *) data_buf = swap_32(tmp);
  756. isp116x_show_regs(isp116x);
  757. len = 4;
  758. break;
  759. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  760. DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
  761. switch (wValue) {
  762. case RH_ENDPOINT_STALL:
  763. DBG("C_HUB_ENDPOINT_STALL");
  764. len = 0;
  765. break;
  766. }
  767. break;
  768. case RH_CLEAR_FEATURE | RH_CLASS:
  769. DBG("RH_CLEAR_FEATURE | RH_CLASS");
  770. switch (wValue) {
  771. case RH_C_HUB_LOCAL_POWER:
  772. DBG("C_HUB_LOCAL_POWER");
  773. len = 0;
  774. break;
  775. case RH_C_HUB_OVER_CURRENT:
  776. DBG("C_HUB_OVER_CURRENT");
  777. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
  778. len = 0;
  779. break;
  780. }
  781. break;
  782. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  783. DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
  784. switch (wValue) {
  785. case RH_PORT_ENABLE:
  786. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  787. RH_PS_CCS);
  788. len = 0;
  789. break;
  790. case RH_PORT_SUSPEND:
  791. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  792. RH_PS_POCI);
  793. len = 0;
  794. break;
  795. case RH_PORT_POWER:
  796. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  797. RH_PS_LSDA);
  798. len = 0;
  799. break;
  800. case RH_C_PORT_CONNECTION:
  801. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  802. RH_PS_CSC);
  803. len = 0;
  804. break;
  805. case RH_C_PORT_ENABLE:
  806. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  807. RH_PS_PESC);
  808. len = 0;
  809. break;
  810. case RH_C_PORT_SUSPEND:
  811. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  812. RH_PS_PSSC);
  813. len = 0;
  814. break;
  815. case RH_C_PORT_OVER_CURRENT:
  816. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  817. RH_PS_POCI);
  818. len = 0;
  819. break;
  820. case RH_C_PORT_RESET:
  821. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  822. RH_PS_PRSC);
  823. len = 0;
  824. break;
  825. default:
  826. ERR("invalid wValue");
  827. stat = USB_ST_STALLED;
  828. }
  829. isp116x_show_regs(isp116x);
  830. break;
  831. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  832. DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
  833. switch (wValue) {
  834. case RH_PORT_SUSPEND:
  835. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  836. RH_PS_PSS);
  837. len = 0;
  838. break;
  839. case RH_PORT_RESET:
  840. /* Spin until any current reset finishes */
  841. while (1) {
  842. tmp =
  843. isp116x_read_reg32(isp116x,
  844. HCRHPORT1 + wIndex - 1);
  845. if (!(tmp & RH_PS_PRS))
  846. break;
  847. wait_ms(1);
  848. }
  849. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  850. RH_PS_PRS);
  851. wait_ms(10);
  852. len = 0;
  853. break;
  854. case RH_PORT_POWER:
  855. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  856. RH_PS_PPS);
  857. len = 0;
  858. break;
  859. case RH_PORT_ENABLE:
  860. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  861. RH_PS_PES);
  862. len = 0;
  863. break;
  864. default:
  865. ERR("invalid wValue");
  866. stat = USB_ST_STALLED;
  867. }
  868. isp116x_show_regs(isp116x);
  869. break;
  870. case RH_SET_ADDRESS:
  871. DBG("RH_SET_ADDRESS");
  872. rh_devnum = wValue;
  873. len = 0;
  874. break;
  875. case RH_GET_DESCRIPTOR:
  876. DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
  877. switch (wValue) {
  878. case (USB_DT_DEVICE << 8): /* device descriptor */
  879. len = min_t(unsigned int,
  880. leni, min_t(unsigned int,
  881. sizeof(root_hub_dev_des),
  882. wLength));
  883. data_buf = root_hub_dev_des;
  884. break;
  885. case (USB_DT_CONFIG << 8): /* configuration descriptor */
  886. len = min_t(unsigned int,
  887. leni, min_t(unsigned int,
  888. sizeof(root_hub_config_des),
  889. wLength));
  890. data_buf = root_hub_config_des;
  891. break;
  892. case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
  893. len = min_t(unsigned int,
  894. leni, min_t(unsigned int,
  895. sizeof(root_hub_str_index0),
  896. wLength));
  897. data_buf = root_hub_str_index0;
  898. break;
  899. case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
  900. len = min_t(unsigned int,
  901. leni, min_t(unsigned int,
  902. sizeof(root_hub_str_index1),
  903. wLength));
  904. data_buf = root_hub_str_index1;
  905. break;
  906. default:
  907. ERR("invalid wValue");
  908. stat = USB_ST_STALLED;
  909. }
  910. break;
  911. case RH_GET_DESCRIPTOR | RH_CLASS:
  912. DBG("RH_GET_DESCRIPTOR | RH_CLASS");
  913. tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
  914. data_buf[0] = 0x09; /* min length; */
  915. data_buf[1] = 0x29;
  916. data_buf[2] = tmp & RH_A_NDP;
  917. data_buf[3] = 0;
  918. if (tmp & RH_A_PSM) /* per-port power switching? */
  919. data_buf[3] |= 0x01;
  920. if (tmp & RH_A_NOCP) /* no overcurrent reporting? */
  921. data_buf[3] |= 0x10;
  922. else if (tmp & RH_A_OCPM) /* per-port overcurrent rep? */
  923. data_buf[3] |= 0x08;
  924. /* Corresponds to data_buf[4-7] */
  925. datab[1] = 0;
  926. data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
  927. tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
  928. data_buf[7] = tmp & RH_B_DR;
  929. if (data_buf[2] < 7)
  930. data_buf[8] = 0xff;
  931. else {
  932. data_buf[0] += 2;
  933. data_buf[8] = (tmp & RH_B_DR) >> 8;
  934. data_buf[10] = data_buf[9] = 0xff;
  935. }
  936. len = min_t(unsigned int, leni,
  937. min_t(unsigned int, data_buf[0], wLength));
  938. break;
  939. case RH_GET_CONFIGURATION:
  940. DBG("RH_GET_CONFIGURATION");
  941. *(__u8 *) data_buf = 0x01;
  942. len = 1;
  943. break;
  944. case RH_SET_CONFIGURATION:
  945. DBG("RH_SET_CONFIGURATION");
  946. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
  947. len = 0;
  948. break;
  949. default:
  950. ERR("*** *** *** unsupported root hub command *** *** ***");
  951. stat = USB_ST_STALLED;
  952. }
  953. len = min_t(int, len, leni);
  954. if (buffer != data_buf)
  955. memcpy(buffer, data_buf, len);
  956. dev->act_len = len;
  957. dev->status = stat;
  958. DBG("dev act_len %d, status %d", dev->act_len, dev->status);
  959. dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
  960. return stat;
  961. }
  962. /* --- Transfer functions -------------------------------------------------- */
  963. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  964. int len, int interval)
  965. {
  966. DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
  967. dev, pipe, buffer, len, interval);
  968. return -1;
  969. }
  970. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  971. int len, struct devrequest *setup)
  972. {
  973. int devnum = usb_pipedevice(pipe);
  974. int epnum = usb_pipeendpoint(pipe);
  975. int max = max_transfer_len(dev, pipe);
  976. int dir_in = usb_pipein(pipe);
  977. int done, ret;
  978. /* Control message is for the HUB? */
  979. if (devnum == rh_devnum)
  980. return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
  981. /* Ok, no HUB message so send the message to the device */
  982. /* Setup phase */
  983. DBG("--- SETUP PHASE --------------------------------");
  984. usb_settoggle(dev, epnum, 1, 0);
  985. ret = isp116x_submit_job(dev, pipe,
  986. PTD_DIR_SETUP,
  987. setup, sizeof(struct devrequest));
  988. if (ret < 0) {
  989. DBG("control setup phase error (ret = %d", ret);
  990. return -1;
  991. }
  992. /* Data phase */
  993. DBG("--- DATA PHASE ---------------------------------");
  994. done = 0;
  995. usb_settoggle(dev, epnum, !dir_in, 1);
  996. while (done < len) {
  997. ret = isp116x_submit_job(dev, pipe,
  998. dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
  999. (__u8 *) buffer + done,
  1000. max > len - done ? len - done : max);
  1001. if (ret < 0) {
  1002. DBG("control data phase error (ret = %d)", ret);
  1003. return -1;
  1004. }
  1005. done += ret;
  1006. if (dir_in && ret < max) /* short packet */
  1007. break;
  1008. }
  1009. /* Status phase */
  1010. DBG("--- STATUS PHASE -------------------------------");
  1011. usb_settoggle(dev, epnum, !dir_in, 1);
  1012. ret = isp116x_submit_job(dev, pipe,
  1013. !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
  1014. if (ret < 0) {
  1015. DBG("control status phase error (ret = %d", ret);
  1016. return -1;
  1017. }
  1018. dev->act_len = done;
  1019. dump_msg(dev, pipe, buffer, len, "DEV(ret)");
  1020. return done;
  1021. }
  1022. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1023. int len)
  1024. {
  1025. int dir_out = usb_pipeout(pipe);
  1026. int max = max_transfer_len(dev, pipe);
  1027. int done, ret;
  1028. DBG("--- BULK ---------------------------------------");
  1029. DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
  1030. usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
  1031. done = 0;
  1032. while (done < len) {
  1033. ret = isp116x_submit_job(dev, pipe,
  1034. !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
  1035. (__u8 *) buffer + done,
  1036. max > len - done ? len - done : max);
  1037. if (ret < 0) {
  1038. DBG("error on bulk message (ret = %d)", ret);
  1039. return -1;
  1040. }
  1041. done += ret;
  1042. if (!dir_out && ret < max) /* short packet */
  1043. break;
  1044. }
  1045. dev->act_len = done;
  1046. return 0;
  1047. }
  1048. /* --- Basic functions ----------------------------------------------------- */
  1049. static int isp116x_sw_reset(struct isp116x *isp116x)
  1050. {
  1051. int retries = 15;
  1052. int ret = 0;
  1053. DBG("");
  1054. isp116x->disabled = 1;
  1055. isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
  1056. isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
  1057. while (--retries) {
  1058. /* It usually resets within 1 ms */
  1059. wait_ms(1);
  1060. if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
  1061. break;
  1062. }
  1063. if (!retries) {
  1064. ERR("software reset timeout");
  1065. ret = -1;
  1066. }
  1067. return ret;
  1068. }
  1069. static int isp116x_reset(struct isp116x *isp116x)
  1070. {
  1071. unsigned long t;
  1072. u16 clkrdy = 0;
  1073. int ret, timeout = 15 /* ms */ ;
  1074. DBG("");
  1075. ret = isp116x_sw_reset(isp116x);
  1076. if (ret)
  1077. return ret;
  1078. for (t = 0; t < timeout; t++) {
  1079. clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
  1080. if (clkrdy)
  1081. break;
  1082. wait_ms(1);
  1083. }
  1084. if (!clkrdy) {
  1085. ERR("clock not ready after %dms", timeout);
  1086. /* After sw_reset the clock won't report to be ready, if
  1087. H_WAKEUP pin is high. */
  1088. ERR("please make sure that the H_WAKEUP pin is pulled low!");
  1089. ret = -1;
  1090. }
  1091. return ret;
  1092. }
  1093. static void isp116x_stop(struct isp116x *isp116x)
  1094. {
  1095. u32 val;
  1096. DBG("");
  1097. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1098. /* Switch off ports' power, some devices don't come up
  1099. after next 'start' without this */
  1100. val = isp116x_read_reg32(isp116x, HCRHDESCA);
  1101. val &= ~(RH_A_NPS | RH_A_PSM);
  1102. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1103. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
  1104. isp116x_sw_reset(isp116x);
  1105. }
  1106. /*
  1107. * Configure the chip. The chip must be successfully reset by now.
  1108. */
  1109. static int isp116x_start(struct isp116x *isp116x)
  1110. {
  1111. struct isp116x_platform_data *board = isp116x->board;
  1112. u32 val;
  1113. DBG("");
  1114. /* Clear interrupt status and disable all interrupt sources */
  1115. isp116x_write_reg16(isp116x, HCuPINT, 0xff);
  1116. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1117. isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
  1118. isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
  1119. /* Hardware configuration */
  1120. val = HCHWCFG_DBWIDTH(1);
  1121. if (board->sel15Kres)
  1122. val |= HCHWCFG_15KRSEL;
  1123. /* Remote wakeup won't work without working clock */
  1124. if (board->remote_wakeup_enable)
  1125. val |= HCHWCFG_CLKNOTSTOP;
  1126. if (board->oc_enable)
  1127. val |= HCHWCFG_ANALOG_OC;
  1128. isp116x_write_reg16(isp116x, HCHWCFG, val);
  1129. /* --- Root hub configuration */
  1130. val = (25 << 24) & RH_A_POTPGT;
  1131. /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
  1132. be always set. Yet, instead, we request individual port
  1133. power switching. */
  1134. val |= RH_A_PSM;
  1135. /* Report overcurrent per port */
  1136. val |= RH_A_OCPM;
  1137. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1138. isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
  1139. val = RH_B_PPCM;
  1140. isp116x_write_reg32(isp116x, HCRHDESCB, val);
  1141. isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
  1142. val = 0;
  1143. if (board->remote_wakeup_enable)
  1144. val |= RH_HS_DRWE;
  1145. isp116x_write_reg32(isp116x, HCRHSTATUS, val);
  1146. isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
  1147. isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
  1148. /* Go operational */
  1149. val = HCCONTROL_USB_OPER;
  1150. if (board->remote_wakeup_enable)
  1151. val |= HCCONTROL_RWE;
  1152. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1153. /* Disable ports to avoid race in device enumeration */
  1154. isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
  1155. isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
  1156. isp116x_show_regs(isp116x);
  1157. isp116x->disabled = 0;
  1158. return 0;
  1159. }
  1160. /* --- Init functions ------------------------------------------------------ */
  1161. int isp116x_check_id(struct isp116x *isp116x)
  1162. {
  1163. int val;
  1164. val = isp116x_read_reg16(isp116x, HCCHIPID);
  1165. if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
  1166. ERR("invalid chip ID %04x", val);
  1167. return -1;
  1168. }
  1169. return 0;
  1170. }
  1171. int usb_lowlevel_init(void)
  1172. {
  1173. struct isp116x *isp116x = &isp116x_dev;
  1174. DBG("");
  1175. got_rhsc = rh_devnum = 0;
  1176. /* Init device registers addr */
  1177. isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
  1178. isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
  1179. /* Setup specific board settings */
  1180. #ifdef ISP116X_HCD_SEL15kRES
  1181. isp116x_board.sel15Kres = 1;
  1182. #endif
  1183. #ifdef ISP116X_HCD_OC_ENABLE
  1184. isp116x_board.oc_enable = 1;
  1185. #endif
  1186. #ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
  1187. isp116x_board.remote_wakeup_enable = 1;
  1188. #endif
  1189. isp116x->board = &isp116x_board;
  1190. /* Try to get ISP116x silicon chip ID */
  1191. if (isp116x_check_id(isp116x) < 0)
  1192. return -1;
  1193. isp116x->disabled = 1;
  1194. isp116x->sleeping = 0;
  1195. isp116x_reset(isp116x);
  1196. isp116x_start(isp116x);
  1197. return 0;
  1198. }
  1199. int usb_lowlevel_stop(void)
  1200. {
  1201. struct isp116x *isp116x = &isp116x_dev;
  1202. DBG("");
  1203. if (!isp116x->disabled)
  1204. isp116x_stop(isp116x);
  1205. return 0;
  1206. }