cm5200.c 11 KB

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  1. /*
  2. * (C) Copyright 2003-2007
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004
  6. * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
  7. *
  8. * (C) Copyright 2004-2005
  9. * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  10. *
  11. * Adapted to U-Boot 1.2 by:
  12. * Bartlomiej Sieka <tur@semihalf.com>:
  13. * - HW ID readout from EEPROM
  14. * - module detection
  15. * Grzegorz Bernacki <gjb@semihalf.com>:
  16. * - run-time SDRAM controller configuration
  17. * - LIBFDT support
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <mpc5xxx.h>
  39. #include <pci.h>
  40. #include <asm/processor.h>
  41. #include <i2c.h>
  42. #include <linux/ctype.h>
  43. #ifdef CONFIG_OF_LIBFDT
  44. #include <libfdt.h>
  45. #include <libfdt_env.h>
  46. #include <fdt_support.h>
  47. #endif /* CONFIG_OF_LIBFDT */
  48. #include "cm5200.h"
  49. #include "fwupdate.h"
  50. DECLARE_GLOBAL_DATA_PTR;
  51. static hw_id_t hw_id;
  52. #ifndef CFG_RAMBOOT
  53. /*
  54. * Helper function to initialize SDRAM controller.
  55. */
  56. static void sdram_start(int hi_addr, mem_conf_t *mem_conf)
  57. {
  58. long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  59. /* unlock mode register */
  60. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 |
  61. hi_addr_bit;
  62. /* precharge all banks */
  63. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 |
  64. hi_addr_bit;
  65. /* auto refresh */
  66. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
  67. hi_addr_bit;
  68. /* auto refresh, second time */
  69. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
  70. hi_addr_bit;
  71. /* set mode register */
  72. *(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode;
  73. /* normal operation */
  74. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit;
  75. }
  76. #endif /* CFG_RAMBOOT */
  77. /*
  78. * Retrieve memory configuration for a given module. board_type is the index
  79. * in hw_id_list[] corresponding to the module we are executing on; we return
  80. * SDRAM controller settings approprate for this module.
  81. */
  82. static mem_conf_t* get_mem_config(int board_type)
  83. {
  84. switch(board_type){
  85. case CM1_QA:
  86. return memory_config[0];
  87. case CM11_QA:
  88. case CMU1_QA:
  89. return memory_config[1];
  90. default:
  91. printf("ERROR: Unknown module, using a default SDRAM "
  92. "configuration - things may not work!!!.\n");
  93. return memory_config[0];
  94. }
  95. }
  96. /*
  97. * Initalize SDRAM - configure SDRAM controller, detect memory size.
  98. */
  99. phys_size_t initdram(int board_type)
  100. {
  101. ulong dramsize = 0;
  102. #ifndef CFG_RAMBOOT
  103. ulong test1, test2;
  104. mem_conf_t *mem_conf;
  105. mem_conf = get_mem_config(board_type);
  106. /* configure SDRAM start/end for detection */
  107. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
  108. /* setup config registers */
  109. *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1;
  110. *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2;
  111. sdram_start(0, mem_conf);
  112. test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
  113. sdram_start(1, mem_conf);
  114. test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
  115. if (test1 > test2) {
  116. sdram_start(0, mem_conf);
  117. dramsize = test1;
  118. } else
  119. dramsize = test2;
  120. /* memory smaller than 1MB is impossible */
  121. if (dramsize < (1 << 20))
  122. dramsize = 0;
  123. /* set SDRAM CS0 size according to the amount of RAM found */
  124. if (dramsize > 0) {
  125. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
  126. __builtin_ffs(dramsize >> 20) - 1;
  127. } else
  128. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
  129. #else /* CFG_RAMBOOT */
  130. /* retrieve size of memory connected to SDRAM CS0 */
  131. dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
  132. if (dramsize >= 0x13)
  133. dramsize = (1 << (dramsize - 0x13)) << 20;
  134. else
  135. dramsize = 0;
  136. #endif /* !CFG_RAMBOOT */
  137. /*
  138. * On MPC5200B we need to set the special configuration delay in the
  139. * DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
  140. * the MPC5200B User's Manual.
  141. */
  142. *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
  143. __asm__ volatile ("sync");
  144. return dramsize;
  145. }
  146. /*
  147. * Read module hardware identification data from the I2C EEPROM.
  148. */
  149. static void read_hw_id(hw_id_t hw_id)
  150. {
  151. int i;
  152. for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
  153. if (i2c_read(CFG_I2C_EEPROM,
  154. hw_id_format[i].offset,
  155. 2,
  156. (uchar *)&hw_id[i][0],
  157. hw_id_format[i].length) != 0)
  158. printf("ERROR: can't read HW ID from EEPROM\n");
  159. }
  160. /*
  161. * Identify module we are running on, set gd->board_type to the index in
  162. * hw_id_list[] corresponding to the module identifed, or to
  163. * CM5200_UNKNOWN_MODULE if we can't identify the module.
  164. */
  165. static void identify_module(hw_id_t hw_id)
  166. {
  167. int i, j, element;
  168. char match;
  169. gd->board_type = CM5200_UNKNOWN_MODULE;
  170. for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) {
  171. match = 1;
  172. for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) {
  173. element = hw_id_identify[j];
  174. if (strncmp(hw_id_list[i][element],
  175. &hw_id[element][0],
  176. hw_id_format[element].length) != 0) {
  177. match = 0;
  178. break;
  179. }
  180. }
  181. if (match) {
  182. gd->board_type = i;
  183. break;
  184. }
  185. }
  186. }
  187. /*
  188. * Compose string with module name.
  189. * buf is assumed to have enough space, and be null-terminated.
  190. */
  191. static void compose_module_name(hw_id_t hw_id, char *buf)
  192. {
  193. char tmp[MODULE_NAME_MAXLEN];
  194. strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
  195. strncat(buf, ".", 1);
  196. strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
  197. strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
  198. strncat(buf, " (", 2);
  199. strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0],
  200. hw_id_format[IDENTIFICATION_NUMBER].length);
  201. sprintf(tmp, " / %u.%u)",
  202. hw_id[MAJOR_SW_VERSION][0],
  203. hw_id[MINOR_SW_VERSION][0]);
  204. strcat(buf, tmp);
  205. }
  206. /*
  207. * Compose string with hostname.
  208. * buf is assumed to have enough space, and be null-terminated.
  209. */
  210. static void compose_hostname(hw_id_t hw_id, char *buf)
  211. {
  212. char *p;
  213. strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
  214. strncat(buf, "_", 1);
  215. strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
  216. strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
  217. for (p = buf; *p; ++p)
  218. *p = tolower(*p);
  219. }
  220. #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
  221. /*
  222. * Update 'model' and 'memory' properties in the blob according to the module
  223. * that we are running on.
  224. */
  225. static void ft_blob_update(void *blob, bd_t *bd)
  226. {
  227. int len, ret, nodeoffset = 0;
  228. char module_name[MODULE_NAME_MAXLEN] = {0};
  229. compose_module_name(hw_id, module_name);
  230. len = strlen(module_name) + 1;
  231. ret = fdt_setprop(blob, nodeoffset, "model", module_name, len);
  232. if (ret < 0)
  233. printf("ft_blob_update(): cannot set /model property err:%s\n",
  234. fdt_strerror(ret));
  235. ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
  236. if (ret < 0) {
  237. printf("ft_blob_update(): cannot set /memory/reg "
  238. "property err:%s\n", fdt_strerror(ret));
  239. }
  240. }
  241. #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
  242. /*
  243. * Read HW ID from I2C EEPROM and detect the modue we are running on. Note
  244. * that we need to use local variable for readout, because global data is not
  245. * writable yet (and we'll have to redo the readout later on).
  246. */
  247. int checkboard(void)
  248. {
  249. hw_id_t hw_id_tmp;
  250. char module_name_tmp[MODULE_NAME_MAXLEN] = "";
  251. /*
  252. * We need I2C to access HW ID data from EEPROM, so we call i2c_init()
  253. * here despite the fact that it will be called again later on. We
  254. * also use a little trick to silence I2C-related output.
  255. */
  256. gd->flags |= GD_FLG_SILENT;
  257. i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
  258. gd->flags &= ~GD_FLG_SILENT;
  259. read_hw_id(hw_id_tmp);
  260. identify_module(hw_id_tmp); /* this sets gd->board_type */
  261. compose_module_name(hw_id_tmp, module_name_tmp);
  262. if (gd->board_type != CM5200_UNKNOWN_MODULE)
  263. printf("Board: %s\n", module_name_tmp);
  264. else
  265. printf("Board: unrecognized cm5200 module (%s)\n",
  266. module_name_tmp);
  267. return 0;
  268. }
  269. int board_early_init_r(void)
  270. {
  271. /*
  272. * Now, when we are in RAM, enable flash write access for detection
  273. * process. Note that CS_BOOT cannot be cleared when executing in
  274. * flash.
  275. */
  276. *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
  277. /* Now that we can write to global data, read HW ID again. */
  278. read_hw_id(hw_id);
  279. return 0;
  280. }
  281. #ifdef CONFIG_POST
  282. int post_hotkeys_pressed(void)
  283. {
  284. return 0;
  285. }
  286. #endif /* CONFIG_POST */
  287. #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
  288. void post_word_store(ulong a)
  289. {
  290. vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
  291. *save_addr = a;
  292. }
  293. ulong post_word_load(void)
  294. {
  295. vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
  296. return *save_addr;
  297. }
  298. #endif /* CONFIG_POST || CONFIG_LOGBUFFER */
  299. #ifdef CONFIG_MISC_INIT_R
  300. int misc_init_r(void)
  301. {
  302. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  303. uchar buf[6];
  304. char str[18];
  305. char hostname[MODULE_NAME_MAXLEN];
  306. /* Read ethaddr from EEPROM */
  307. if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
  308. sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
  309. buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
  310. /* Check if MAC addr is owned by Schindler */
  311. if (strstr(str, "00:06:C3") != str)
  312. printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
  313. " in EEPROM.\n", str);
  314. else {
  315. printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
  316. str);
  317. setenv("ethaddr", str);
  318. }
  319. } else {
  320. printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
  321. " device at address %02X:%04X\n", CFG_I2C_EEPROM,
  322. CONFIG_MAC_OFFSET);
  323. }
  324. #endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
  325. if (!getenv("ethaddr"))
  326. printf(LOG_PREFIX "MAC address not set, networking is not "
  327. "operational\n");
  328. /* set the hostname appropriate to the module we're running on */
  329. hostname[0] = 0x00;
  330. compose_hostname(hw_id, hostname);
  331. setenv("hostname", hostname);
  332. return 0;
  333. }
  334. #endif /* CONFIG_MISC_INIT_R */
  335. #ifdef CONFIG_LAST_STAGE_INIT
  336. int last_stage_init(void)
  337. {
  338. #ifdef CONFIG_USB_STORAGE
  339. cm5200_fwupdate();
  340. #endif /* CONFIG_USB_STORAGE */
  341. return 0;
  342. }
  343. #endif /* CONFIG_LAST_STAGE_INIT */
  344. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  345. void ft_board_setup(void *blob, bd_t *bd)
  346. {
  347. ft_cpu_setup(blob, bd);
  348. ft_blob_update(blob, bd);
  349. }
  350. #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */