ide.c 3.2 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /* ide.c - ide support functions */
  25. #include <common.h>
  26. #ifdef CONFIG_CMD_IDE
  27. #include <ata.h>
  28. #include <ide.h>
  29. #include <pci.h>
  30. #define IT8212_PCI_CpuCONTROL 0x5e
  31. #define IT8212_PCI_PciModeCONTROL 0x50
  32. #define IT8212_PCI_IdeIoCONFIG 0x40
  33. #define IT8212_PCI_IdeBusSkewCONTROL 0x4c
  34. #define IT8212_PCI_IdeDrivingCURRENT 0x42
  35. extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
  36. extern struct pci_controller hose;
  37. int ide_preinit (void)
  38. {
  39. int status;
  40. pci_dev_t devbusfn;
  41. int l;
  42. status = 1;
  43. for (l = 0; l < CFG_IDE_MAXBUS; l++) {
  44. ide_bus_offset[l] = -ATA_STATUS;
  45. }
  46. devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0);
  47. if (devbusfn == -1)
  48. devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0);
  49. if (devbusfn != -1) {
  50. status = 0;
  51. pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
  52. (u32 *) &ide_bus_offset[0]);
  53. ide_bus_offset[0] &= 0xfffffffe;
  54. ide_bus_offset[0] = pci_hose_bus_to_phys(&hose,
  55. ide_bus_offset[0] & 0xfffffffe,
  56. PCI_REGION_IO);
  57. pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2,
  58. (u32 *) &ide_bus_offset[1]);
  59. ide_bus_offset[1] &= 0xfffffffe;
  60. ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
  61. ide_bus_offset[1] & 0xfffffffe,
  62. PCI_REGION_IO);
  63. }
  64. if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {
  65. pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01);
  66. pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00);
  67. pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047);
  68. #ifdef CONFIG_IT8212_SECONDARY_ENABLE
  69. pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3);
  70. #else
  71. pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031);
  72. #endif
  73. pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204);
  74. /* __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI */
  75. pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */
  76. /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */
  77. /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */
  78. /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */
  79. /* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */
  80. pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
  81. }
  82. return (status);
  83. }
  84. void ide_set_reset (int flag) {
  85. return;
  86. }
  87. #endif /* CONFIG_CMD_IDE */