kmsupx5.h 2.6 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091
  1. /*
  2. * Copyright (C) 2006 Freescale Semiconductor, Inc.
  3. * Dave Liu <daveliu@freescale.com>
  4. *
  5. * Copyright (C) 2007 Logic Product Development, Inc.
  6. * Peter Barada <peterb@logicpd.com>
  7. *
  8. * Copyright (C) 2007 MontaVista Software, Inc.
  9. * Anton Vorontsov <avorontsov@ru.mvista.com>
  10. *
  11. * (C) Copyright 2008
  12. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  13. *
  14. * (C) Copyright 2010
  15. * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
  16. *
  17. * (C) Copyright 2010-2011
  18. * Thomas Reufer, KEYMILE Ltd, thomas.reufer@keymile.com
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. /*
  28. * High Level Configuration Options
  29. */
  30. #define CONFIG_KMSUPX5 1 /* Keymile PBEC8321 board specific */
  31. #define CONFIG_HOSTNAME supx5
  32. #define CONFIG_KM_BOARD_NAME "supx5"
  33. #define CONFIG_SYS_TEXT_BASE 0xF0000000
  34. /* include common defines/options for all 8321 Keymile boards */
  35. #include "km/km8321-common.h"
  36. /*
  37. * Init Local Bus Memory Controller:
  38. *
  39. * Bank Bus Machine PortSz Size Device
  40. * ---- --- ------- ------ ----- ------
  41. * 2 Local GPCM 8 bit 256MB LPXF
  42. * 3 Local not used
  43. *
  44. */
  45. /*
  46. * LPXF on the local bus CS2
  47. * Window base at flash base
  48. * Window size: 256 MB
  49. */
  50. #define CONFIG_SYS_LPXF_BASE 0xA0000000 /* LPXF */
  51. #define CONFIG_SYS_LPXF_SIZE 256 /* Megabytes */
  52. #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LPXF_BASE
  53. #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
  54. #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LPXF_BASE | \
  55. BR_PS_8 | \
  56. BR_MS_GPCM | \
  57. BR_V)
  58. #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) | \
  59. OR_GPCM_CSNT | \
  60. OR_GPCM_ACS_DIV4 | \
  61. OR_GPCM_SCY_2 | \
  62. (OR_GPCM_TRLX & \
  63. (~OR_GPCM_EHTR)) | /* EHTR = 0 */ \
  64. OR_GPCM_EAD)
  65. /* LPXF: icache cacheable, but dcache-inhibit and guarded */
  66. #define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
  67. BATL_MEMCOHERENCE)
  68. #define CONFIG_SYS_IBAT5U (CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \
  69. BATU_VS | BATU_VP)
  70. #define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
  71. BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
  72. #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
  73. /* Bank 3 not used */
  74. #define CONFIG_SYS_IBAT6L (0)
  75. #define CONFIG_SYS_IBAT6U (0)
  76. #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
  77. #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
  78. #endif /* __CONFIG_H */