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  1. /*
  2. * armboot - Startup Code for ARM926EJS CPU-core
  3. *
  4. * Copyright (c) 2003 Texas Instruments
  5. *
  6. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  7. *
  8. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  9. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  10. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  11. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  12. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  13. * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <asm-offsets.h>
  34. #include <config.h>
  35. #include <common.h>
  36. #include <version.h>
  37. #if defined(CONFIG_OMAP1610)
  38. #include <./configs/omap1510.h>
  39. #elif defined(CONFIG_OMAP730)
  40. #include <./configs/omap730.h>
  41. #endif
  42. /*
  43. *************************************************************************
  44. *
  45. * Jump vector table as in table 3.1 in [1]
  46. *
  47. *************************************************************************
  48. */
  49. .globl _start
  50. _start:
  51. b reset
  52. #ifdef CONFIG_PRELOADER
  53. /* No exception handlers in preloader */
  54. ldr pc, _hang
  55. ldr pc, _hang
  56. ldr pc, _hang
  57. ldr pc, _hang
  58. ldr pc, _hang
  59. ldr pc, _hang
  60. ldr pc, _hang
  61. _hang:
  62. .word do_hang
  63. /* pad to 64 byte boundary */
  64. .word 0x12345678
  65. .word 0x12345678
  66. .word 0x12345678
  67. .word 0x12345678
  68. .word 0x12345678
  69. .word 0x12345678
  70. .word 0x12345678
  71. #else
  72. ldr pc, _undefined_instruction
  73. ldr pc, _software_interrupt
  74. ldr pc, _prefetch_abort
  75. ldr pc, _data_abort
  76. ldr pc, _not_used
  77. ldr pc, _irq
  78. ldr pc, _fiq
  79. _undefined_instruction:
  80. .word undefined_instruction
  81. _software_interrupt:
  82. .word software_interrupt
  83. _prefetch_abort:
  84. .word prefetch_abort
  85. _data_abort:
  86. .word data_abort
  87. _not_used:
  88. .word not_used
  89. _irq:
  90. .word irq
  91. _fiq:
  92. .word fiq
  93. #endif /* CONFIG_PRELOADER */
  94. .balignl 16,0xdeadbeef
  95. /*
  96. *************************************************************************
  97. *
  98. * Startup Code (reset vector)
  99. *
  100. * do important init only if we don't start from memory!
  101. * setup Memory and board specific bits prior to relocation.
  102. * relocate armboot to ram
  103. * setup stack
  104. *
  105. *************************************************************************
  106. */
  107. .globl _TEXT_BASE
  108. _TEXT_BASE:
  109. .word CONFIG_SYS_TEXT_BASE
  110. /*
  111. * These are defined in the board-specific linker script.
  112. * Subtracting _start from them lets the linker put their
  113. * relative position in the executable instead of leaving
  114. * them null.
  115. */
  116. .globl _bss_start_ofs
  117. _bss_start_ofs:
  118. .word __bss_start - _start
  119. .globl _bss_end_ofs
  120. _bss_end_ofs:
  121. .word _end - _start
  122. #ifdef CONFIG_USE_IRQ
  123. /* IRQ stack memory (calculated at run-time) */
  124. .globl IRQ_STACK_START
  125. IRQ_STACK_START:
  126. .word 0x0badc0de
  127. /* IRQ stack memory (calculated at run-time) */
  128. .globl FIQ_STACK_START
  129. FIQ_STACK_START:
  130. .word 0x0badc0de
  131. #endif
  132. #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  133. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  134. .globl IRQ_STACK_START_IN
  135. IRQ_STACK_START_IN:
  136. .word 0x0badc0de
  137. /*
  138. * the actual reset code
  139. */
  140. reset:
  141. /*
  142. * set the cpu to SVC32 mode
  143. */
  144. mrs r0,cpsr
  145. bic r0,r0,#0x1f
  146. orr r0,r0,#0xd3
  147. msr cpsr,r0
  148. /*
  149. * we do sys-critical inits only at reboot,
  150. * not when booting from ram!
  151. */
  152. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  153. bl cpu_init_crit
  154. #endif
  155. /* Set stackpointer in internal RAM to call board_init_f */
  156. call_board_init_f:
  157. ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  158. ldr r0,=0x00000000
  159. bl board_init_f
  160. /*------------------------------------------------------------------------------*/
  161. /*
  162. * void relocate_code (addr_sp, gd, addr_moni)
  163. *
  164. * This "function" does not return, instead it continues in RAM
  165. * after relocating the monitor code.
  166. *
  167. */
  168. .globl relocate_code
  169. relocate_code:
  170. mov r4, r0 /* save addr_sp */
  171. mov r5, r1 /* save addr of gd */
  172. mov r6, r2 /* save addr of destination */
  173. mov r7, r2 /* save addr of destination */
  174. /* Set up the stack */
  175. stack_setup:
  176. mov sp, r4
  177. adr r0, _start
  178. ldr r2, _TEXT_BASE
  179. ldr r3, _bss_start_ofs
  180. add r2, r0, r3 /* r2 <- source end address */
  181. cmp r0, r6
  182. beq clear_bss
  183. #ifndef CONFIG_SKIP_RELOCATE_UBOOT
  184. copy_loop:
  185. ldmia r0!, {r9-r10} /* copy from source address [r0] */
  186. stmia r6!, {r9-r10} /* copy to target address [r1] */
  187. cmp r0, r2 /* until source end address [r2] */
  188. blo copy_loop
  189. #ifndef CONFIG_PRELOADER
  190. /*
  191. * fix .rel.dyn relocations
  192. */
  193. ldr r0, _TEXT_BASE /* r0 <- Text base */
  194. sub r9, r7, r0 /* r9 <- relocation offset */
  195. ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
  196. add r10, r10, r0 /* r10 <- sym table in FLASH */
  197. ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
  198. add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
  199. ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
  200. add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
  201. fixloop:
  202. ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
  203. add r0, r0, r9 /* r0 <- location to fix up in RAM */
  204. ldr r1, [r2, #4]
  205. and r8, r1, #0xff
  206. cmp r8, #23 /* relative fixup? */
  207. beq fixrel
  208. cmp r8, #2 /* absolute fixup? */
  209. beq fixabs
  210. /* ignore unknown type of fixup */
  211. b fixnext
  212. fixabs:
  213. /* absolute fix: set location to (offset) symbol value */
  214. mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
  215. add r1, r10, r1 /* r1 <- address of symbol in table */
  216. ldr r1, [r1, #4] /* r1 <- symbol value */
  217. add r1, r9 /* r1 <- relocated sym addr */
  218. b fixnext
  219. fixrel:
  220. /* relative fix: increase location by offset */
  221. ldr r1, [r0]
  222. add r1, r1, r9
  223. fixnext:
  224. str r1, [r0]
  225. add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
  226. cmp r2, r3
  227. blo fixloop
  228. #endif
  229. #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
  230. clear_bss:
  231. #ifndef CONFIG_PRELOADER
  232. ldr r0, _bss_start_ofs
  233. ldr r1, _bss_end_ofs
  234. ldr r3, _TEXT_BASE /* Text base */
  235. mov r4, r7 /* reloc addr */
  236. add r0, r0, r4
  237. add r1, r1, r4
  238. mov r2, #0x00000000 /* clear */
  239. clbss_l:str r2, [r0] /* clear loop... */
  240. add r0, r0, #4
  241. cmp r0, r1
  242. bne clbss_l
  243. bl coloured_LED_init
  244. bl red_LED_on
  245. #endif
  246. /*
  247. * We are done. Do not return, instead branch to second part of board
  248. * initialization, now running from RAM.
  249. */
  250. #ifdef CONFIG_NAND_SPL
  251. ldr r0, _nand_boot_ofs
  252. mov pc, r0
  253. _nand_boot_ofs:
  254. .word nand_boot
  255. #else
  256. ldr r0, _board_init_r_ofs
  257. adr r1, _start
  258. add r0, r0, r1
  259. add lr, r0, r9
  260. /* setup parameters for board_init_r */
  261. mov r0, r5 /* gd_t */
  262. mov r1, r7 /* dest_addr */
  263. /* jump to it ... */
  264. mov pc, lr
  265. _board_init_r_ofs:
  266. .word board_init_r - _start
  267. #endif
  268. _rel_dyn_start_ofs:
  269. .word __rel_dyn_start - _start
  270. _rel_dyn_end_ofs:
  271. .word __rel_dyn_end - _start
  272. _dynsym_start_ofs:
  273. .word __dynsym_start - _start
  274. #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  275. /*
  276. * the actual reset code
  277. */
  278. reset:
  279. /*
  280. * set the cpu to SVC32 mode
  281. */
  282. mrs r0,cpsr
  283. bic r0,r0,#0x1f
  284. orr r0,r0,#0xd3
  285. msr cpsr,r0
  286. /*
  287. * we do sys-critical inits only at reboot,
  288. * not when booting from ram!
  289. */
  290. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  291. bl cpu_init_crit
  292. #endif
  293. #ifndef CONFIG_SKIP_RELOCATE_UBOOT
  294. relocate: /* relocate U-Boot to RAM */
  295. adr r0, _start /* r0 <- current position of code */
  296. ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
  297. cmp r0, r1 /* don't reloc during debug */
  298. beq stack_setup
  299. ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
  300. add r2, r0, r3 /* r2 <- source end address */
  301. copy_loop:
  302. ldmia r0!, {r3-r10} /* copy from source address [r0] */
  303. stmia r1!, {r3-r10} /* copy to target address [r1] */
  304. cmp r0, r2 /* until source end address [r2] */
  305. blo copy_loop
  306. #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
  307. /* Set up the stack */
  308. stack_setup:
  309. ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
  310. sub sp, r0, #128 /* leave 32 words for abort-stack */
  311. #ifndef CONFIG_PRELOADER
  312. sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
  313. sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
  314. #ifdef CONFIG_USE_IRQ
  315. sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
  316. #endif
  317. #endif /* CONFIG_PRELOADER */
  318. sub sp, r0, #12 /* leave 3 words for abort-stack */
  319. bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  320. clear_bss:
  321. adr r2, _start
  322. ldr r0, _bss_start_ofs /* find start of bss segment */
  323. add r0, r0, r2
  324. ldr r1, _bss_end_ofs /* stop here */
  325. add r1, r1, r2
  326. mov r2, #0x00000000 /* clear */
  327. #ifndef CONFIG_PRELOADER
  328. clbss_l:str r2, [r0] /* clear loop... */
  329. add r0, r0, #4
  330. cmp r0, r1
  331. blo clbss_l
  332. bl coloured_LED_init
  333. bl red_LED_on
  334. #endif /* CONFIG_PRELOADER */
  335. ldr r0, _start_armboot_ofs
  336. adr r1, _start
  337. add r0, r0, r1
  338. ldr pc, r0
  339. _start_armboot_ofs:
  340. #ifdef CONFIG_NAND_SPL
  341. .word nand_boot - _start
  342. #else
  343. .word start_armboot - _start
  344. #endif /* CONFIG_NAND_SPL */
  345. #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  346. /*
  347. *************************************************************************
  348. *
  349. * CPU_init_critical registers
  350. *
  351. * setup important registers
  352. * setup memory timing
  353. *
  354. *************************************************************************
  355. */
  356. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  357. cpu_init_crit:
  358. /*
  359. * flush v4 I/D caches
  360. */
  361. mov r0, #0
  362. mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
  363. mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
  364. /*
  365. * disable MMU stuff and caches
  366. */
  367. mrc p15, 0, r0, c1, c0, 0
  368. bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
  369. bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
  370. orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
  371. orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
  372. mcr p15, 0, r0, c1, c0, 0
  373. /*
  374. * Go setup Memory and board specific bits prior to relocation.
  375. */
  376. mov ip, lr /* perserve link reg across call */
  377. bl lowlevel_init /* go setup pll,mux,memory */
  378. mov lr, ip /* restore link */
  379. mov pc, lr /* back to my caller */
  380. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  381. #ifndef CONFIG_PRELOADER
  382. /*
  383. *************************************************************************
  384. *
  385. * Interrupt handling
  386. *
  387. *************************************************************************
  388. */
  389. @
  390. @ IRQ stack frame.
  391. @
  392. #define S_FRAME_SIZE 72
  393. #define S_OLD_R0 68
  394. #define S_PSR 64
  395. #define S_PC 60
  396. #define S_LR 56
  397. #define S_SP 52
  398. #define S_IP 48
  399. #define S_FP 44
  400. #define S_R10 40
  401. #define S_R9 36
  402. #define S_R8 32
  403. #define S_R7 28
  404. #define S_R6 24
  405. #define S_R5 20
  406. #define S_R4 16
  407. #define S_R3 12
  408. #define S_R2 8
  409. #define S_R1 4
  410. #define S_R0 0
  411. #define MODE_SVC 0x13
  412. #define I_BIT 0x80
  413. /*
  414. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  415. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  416. */
  417. .macro bad_save_user_regs
  418. @ carve out a frame on current user stack
  419. sub sp, sp, #S_FRAME_SIZE
  420. stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
  421. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  422. adr r2, _start
  423. sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  424. sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
  425. #else
  426. ldr r2, IRQ_STACK_START_IN
  427. #endif
  428. @ get values for "aborted" pc and cpsr (into parm regs)
  429. ldmia r2, {r2 - r3}
  430. add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
  431. add r5, sp, #S_SP
  432. mov r1, lr
  433. stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
  434. mov r0, sp @ save current stack into r0 (param register)
  435. .endm
  436. .macro irq_save_user_regs
  437. sub sp, sp, #S_FRAME_SIZE
  438. stmia sp, {r0 - r12} @ Calling r0-r12
  439. @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
  440. add r8, sp, #S_PC
  441. stmdb r8, {sp, lr}^ @ Calling SP, LR
  442. str lr, [r8, #0] @ Save calling PC
  443. mrs r6, spsr
  444. str r6, [r8, #4] @ Save CPSR
  445. str r0, [r8, #8] @ Save OLD_R0
  446. mov r0, sp
  447. .endm
  448. .macro irq_restore_user_regs
  449. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  450. mov r0, r0
  451. ldr lr, [sp, #S_PC] @ Get PC
  452. add sp, sp, #S_FRAME_SIZE
  453. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  454. .endm
  455. .macro get_bad_stack
  456. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  457. adr r13, _start @ setup our mode stack
  458. sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  459. sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
  460. #else
  461. ldr r13, IRQ_STACK_START_IN @ setup our mode stack
  462. #endif
  463. str lr, [r13] @ save caller lr in position 0 of saved stack
  464. mrs lr, spsr @ get the spsr
  465. str lr, [r13, #4] @ save spsr in position 1 of saved stack
  466. mov r13, #MODE_SVC @ prepare SVC-Mode
  467. @ msr spsr_c, r13
  468. msr spsr, r13 @ switch modes, make sure moves will execute
  469. mov lr, pc @ capture return pc
  470. movs pc, lr @ jump to next instruction & switch modes.
  471. .endm
  472. .macro get_irq_stack @ setup IRQ stack
  473. ldr sp, IRQ_STACK_START
  474. .endm
  475. .macro get_fiq_stack @ setup FIQ stack
  476. ldr sp, FIQ_STACK_START
  477. .endm
  478. #endif /* CONFIG_PRELOADER */
  479. /*
  480. * exception handlers
  481. */
  482. #ifdef CONFIG_PRELOADER
  483. .align 5
  484. do_hang:
  485. ldr sp, _TEXT_BASE /* switch to abort stack */
  486. 1:
  487. bl 1b /* hang and never return */
  488. #else /* !CONFIG_PRELOADER */
  489. .align 5
  490. undefined_instruction:
  491. get_bad_stack
  492. bad_save_user_regs
  493. bl do_undefined_instruction
  494. .align 5
  495. software_interrupt:
  496. get_bad_stack
  497. bad_save_user_regs
  498. bl do_software_interrupt
  499. .align 5
  500. prefetch_abort:
  501. get_bad_stack
  502. bad_save_user_regs
  503. bl do_prefetch_abort
  504. .align 5
  505. data_abort:
  506. get_bad_stack
  507. bad_save_user_regs
  508. bl do_data_abort
  509. .align 5
  510. not_used:
  511. get_bad_stack
  512. bad_save_user_regs
  513. bl do_not_used
  514. #ifdef CONFIG_USE_IRQ
  515. .align 5
  516. irq:
  517. get_irq_stack
  518. irq_save_user_regs
  519. bl do_irq
  520. irq_restore_user_regs
  521. .align 5
  522. fiq:
  523. get_fiq_stack
  524. /* someone ought to write a more effiction fiq_save_user_regs */
  525. irq_save_user_regs
  526. bl do_fiq
  527. irq_restore_user_regs
  528. #else
  529. .align 5
  530. irq:
  531. get_bad_stack
  532. bad_save_user_regs
  533. bl do_irq
  534. .align 5
  535. fiq:
  536. get_bad_stack
  537. bad_save_user_regs
  538. bl do_fiq
  539. #endif
  540. #endif /* CONFIG_PRELOADER */