skge.c 133 KB

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  1. /******************************************************************************
  2. *
  3. * Name: skge.c
  4. * Project: GEnesis, PCI Gigabit Ethernet Adapter
  5. * Version: $Revision: 1.46 $
  6. * Date: $Date: 2003/02/25 14:16:36 $
  7. * Purpose: The main driver source module
  8. *
  9. ******************************************************************************/
  10. /******************************************************************************
  11. *
  12. * (C)Copyright 1998-2003 SysKonnect GmbH.
  13. *
  14. * Driver for SysKonnect Gigabit Ethernet Server Adapters:
  15. *
  16. * SK-9871 (single link 1000Base-ZX)
  17. * SK-9872 (dual link 1000Base-ZX)
  18. * SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
  19. * SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
  20. * SK-9841 (single link 1000Base-LX)
  21. * SK-9842 (dual link 1000Base-LX)
  22. * SK-9843 (single link 1000Base-SX)
  23. * SK-9844 (dual link 1000Base-SX)
  24. * SK-9821 (single link 1000Base-T)
  25. * SK-9822 (dual link 1000Base-T)
  26. * SK-9881 (single link 1000Base-SX V2 LC)
  27. * SK-9871 (single link 1000Base-ZX V2)
  28. * SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
  29. * SK-9841 (single link 1000Base-LX V2)
  30. * SK-9843 (single link 1000Base-SX V2)
  31. * SK-9821 (single link 1000Base-T V2)
  32. *
  33. * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
  34. * SysKonnects GEnesis Solaris driver
  35. * Author: Christoph Goos (cgoos@syskonnect.de)
  36. * Mirko Lindner (mlindner@syskonnect.de)
  37. *
  38. * Address all question to: linux@syskonnect.de
  39. *
  40. * The technical manual for the adapters is available from SysKonnect's
  41. * web pages: www.syskonnect.com
  42. * Goto "Support" and search Knowledge Base for "manual".
  43. *
  44. * This program is free software; you can redistribute it and/or modify
  45. * it under the terms of the GNU General Public License as published by
  46. * the Free Software Foundation; either version 2 of the License, or
  47. * (at your option) any later version.
  48. *
  49. * The information in this file is provided "AS IS" without warranty.
  50. *
  51. ******************************************************************************/
  52. /******************************************************************************
  53. *
  54. * History:
  55. *
  56. * $Log: skge.c,v $
  57. * Revision 1.46 2003/02/25 14:16:36 mlindner
  58. * Fix: Copyright statement
  59. *
  60. * Revision 1.45 2003/02/25 13:25:55 mlindner
  61. * Add: Performance improvements
  62. * Add: Support for various vendors
  63. * Fix: Init function
  64. *
  65. * Revision 1.44 2003/01/09 09:25:26 mlindner
  66. * Fix: Remove useless init_module/cleanup_module forward declarations
  67. *
  68. * Revision 1.43 2002/11/29 08:42:41 mlindner
  69. * Fix: Boot message
  70. *
  71. * Revision 1.42 2002/11/28 13:30:23 mlindner
  72. * Add: New frame check
  73. *
  74. * Revision 1.41 2002/11/27 13:55:18 mlindner
  75. * Fix: Drop wrong csum packets
  76. * Fix: Initialize proc_entry after hw check
  77. *
  78. * Revision 1.40 2002/10/31 07:50:37 tschilli
  79. * Function SkGeInitAssignRamToQueues() from common module inserted.
  80. * Autonegotiation is set to ON for all adapters.
  81. * LinkSpeedUsed is used in link up status report.
  82. * Role parameter will show up for 1000 Mbps links only.
  83. * GetConfiguration() inserted after init level 1 in SkGeChangeMtu().
  84. * All return values of SkGeInit() and SkGeInitPort() are checked.
  85. *
  86. * Revision 1.39 2002/10/02 12:56:05 mlindner
  87. * Add: Support for Yukon
  88. * Add: Support for ZEROCOPY, scatter-gather and hw checksum
  89. * Add: New transmit ring function (use SG and TCP/UDP hardware checksumming)
  90. * Add: New init function
  91. * Add: Speed check and setup
  92. * Add: Merge source for kernel 2.2.x and 2.4.x
  93. * Add: Opcode check for tcp
  94. * Add: Frame length check
  95. * Fix: Transmit complete interrupt
  96. * Fix: Interrupt moderation
  97. *
  98. * Revision 1.29.2.13 2002/01/14 12:44:52 mlindner
  99. * Fix: Rlmt modes
  100. *
  101. * Revision 1.29.2.12 2001/12/07 12:06:18 mlindner
  102. * Fix: malloc -> slab changes
  103. *
  104. * Revision 1.29.2.11 2001/12/06 15:19:20 mlindner
  105. * Add: DMA attributes
  106. * Fix: Module initialisation
  107. * Fix: pci_map_single and pci_unmap_single replaced
  108. *
  109. * Revision 1.29.2.10 2001/12/06 09:56:50 mlindner
  110. * Corrected some printk's
  111. *
  112. * Revision 1.29.2.9 2001/09/05 12:15:34 mlindner
  113. * Add: LBFO Changes
  114. * Fix: Counter Errors (Jumbo == to long errors)
  115. * Fix: Changed pAC->PciDev declaration
  116. * Fix: too short counters
  117. *
  118. * Revision 1.29.2.8 2001/06/25 12:10:44 mlindner
  119. * fix: ReceiveIrq() changed.
  120. *
  121. * Revision 1.29.2.7 2001/06/25 08:07:05 mlindner
  122. * fix: RLMT locking in ReceiveIrq() changed.
  123. *
  124. * Revision 1.29.2.6 2001/05/21 07:59:29 mlindner
  125. * fix: MTU init problems
  126. *
  127. * Revision 1.29.2.5 2001/05/08 11:25:08 mlindner
  128. * fix: removed VLAN error message
  129. *
  130. * Revision 1.29.2.4 2001/05/04 13:31:43 gklug
  131. * fix: do not handle eth_copy on bad fragments received.
  132. *
  133. * Revision 1.29.2.3 2001/04/23 08:06:43 mlindner
  134. * Fix: error handling
  135. *
  136. * Revision 1.29.2.2 2001/03/15 12:04:54 mlindner
  137. * Fixed memory problem
  138. *
  139. * Revision 1.29.2.1 2001/03/12 16:41:44 mlindner
  140. * add: procfs function
  141. * add: dual-net function
  142. * add: RLMT networks
  143. * add: extended PNMI features
  144. *
  145. * Kernel 2.4.x specific:
  146. * Revision 1.xx 2000/09/12 13:31:56 cgoos
  147. * Fixed missign "dev=NULL in skge_probe.
  148. * Added counting for jumbo frames (corrects error statistic).
  149. * Removed VLAN tag check (enables VLAN support).
  150. *
  151. * Kernel 2.2.x specific:
  152. * Revision 1.29 2000/02/21 13:31:56 cgoos
  153. * Fixed "unused" warning for UltraSPARC change.
  154. *
  155. * Partially kernel 2.2.x specific:
  156. * Revision 1.28 2000/02/21 10:32:36 cgoos
  157. * Added fixes for UltraSPARC.
  158. * Now printing RlmtMode and PrefPort setting at startup.
  159. * Changed XmitFrame return value.
  160. * Fixed rx checksum calculation for BIG ENDIAN systems.
  161. * Fixed rx jumbo frames counted as ierrors.
  162. *
  163. *
  164. * Revision 1.27 1999/11/25 09:06:28 cgoos
  165. * Changed base_addr to unsigned long.
  166. *
  167. * Revision 1.26 1999/11/22 13:29:16 cgoos
  168. * Changed license header to GPL.
  169. * Changes for inclusion in linux kernel (2.2.13).
  170. * Removed 2.0.x defines.
  171. * Changed SkGeProbe to skge_probe.
  172. * Added checks in SkGeIoctl.
  173. *
  174. * Revision 1.25 1999/10/07 14:47:52 cgoos
  175. * Changed 984x to 98xx.
  176. *
  177. * Revision 1.24 1999/09/30 07:21:01 cgoos
  178. * Removed SK_RLMT_SLOW_LOOKAHEAD option.
  179. * Giving spanning tree packets also to OS now.
  180. *
  181. * Revision 1.23 1999/09/29 07:36:50 cgoos
  182. * Changed assignment for IsBc/IsMc.
  183. *
  184. * Revision 1.22 1999/09/28 12:57:09 cgoos
  185. * Added CheckQueue also to Single-Port-ISR.
  186. *
  187. * Revision 1.21 1999/09/28 12:42:41 cgoos
  188. * Changed parameter strings for RlmtMode.
  189. *
  190. * Revision 1.20 1999/09/28 12:37:57 cgoos
  191. * Added CheckQueue for fast delivery of RLMT frames.
  192. *
  193. * Revision 1.19 1999/09/16 07:57:25 cgoos
  194. * Copperfield changes.
  195. *
  196. * Revision 1.18 1999/09/03 13:06:30 cgoos
  197. * Fixed RlmtMode=CheckSeg bug: wrong DEV_KFREE_SKB in RLMT_SEND caused
  198. * double allocated skb's.
  199. * FrameStat in ReceiveIrq was accessed via wrong Rxd.
  200. * Queue size for async. standby Tx queue was zero.
  201. * FillRxLimit of 0 could cause problems with ReQueue, changed to 1.
  202. * Removed debug output of checksum statistic.
  203. *
  204. * Revision 1.17 1999/08/11 13:55:27 cgoos
  205. * Transmit descriptor polling was not reenabled after SkGePortInit.
  206. *
  207. * Revision 1.16 1999/07/27 15:17:29 cgoos
  208. * Added some "\n" in output strings (removed while debuging...).
  209. *
  210. * Revision 1.15 1999/07/23 12:09:30 cgoos
  211. * Performance optimization, rx checksumming, large frame support.
  212. *
  213. * Revision 1.14 1999/07/14 11:26:27 cgoos
  214. * Removed Link LED settings (now in RLMT).
  215. * Added status output at NET UP.
  216. * Fixed SMP problems with Tx and SWITCH running in parallel.
  217. * Fixed return code problem at RLMT_SEND event.
  218. *
  219. * Revision 1.13 1999/04/07 10:11:42 cgoos
  220. * Fixed Single Port problems.
  221. * Fixed Multi-Adapter problems.
  222. * Always display startup string.
  223. *
  224. * Revision 1.12 1999/03/29 12:26:37 cgoos
  225. * Reversed locking to fine granularity.
  226. * Fixed skb double alloc problem (caused by incorrect xmit return code).
  227. * Enhanced function descriptions.
  228. *
  229. * Revision 1.11 1999/03/15 13:10:51 cgoos
  230. * Changed device identifier in output string to ethX.
  231. *
  232. * Revision 1.10 1999/03/15 12:12:34 cgoos
  233. * Changed copyright notice.
  234. *
  235. * Revision 1.9 1999/03/15 12:10:17 cgoos
  236. * Changed locking to one driver lock.
  237. * Added check of SK_AC-size (for consistency with library).
  238. *
  239. * Revision 1.8 1999/03/08 11:44:02 cgoos
  240. * Fixed missing dev->tbusy in SkGeXmit.
  241. * Changed large frame (jumbo) buffer number.
  242. * Added copying of short frames.
  243. *
  244. * Revision 1.7 1999/03/04 13:26:57 cgoos
  245. * Fixed spinlock calls for SMP.
  246. *
  247. * Revision 1.6 1999/03/02 09:53:51 cgoos
  248. * Added descriptor revertion for big endian machines.
  249. *
  250. * Revision 1.5 1999/03/01 08:50:59 cgoos
  251. * Fixed SkGeChangeMtu.
  252. * Fixed pci config space accesses.
  253. *
  254. * Revision 1.4 1999/02/18 15:48:44 cgoos
  255. * Corrected some printk's.
  256. *
  257. * Revision 1.3 1999/02/18 12:45:55 cgoos
  258. * Changed SK_MAX_CARD_PARAM to default 16
  259. *
  260. * Revision 1.2 1999/02/18 10:55:32 cgoos
  261. * Removed SkGeDrvTimeStamp function.
  262. * Printing "ethX:" before adapter type at adapter init.
  263. *
  264. *
  265. * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
  266. * SysKonnects GEnesis Solaris driver
  267. *
  268. ******************************************************************************/
  269. /******************************************************************************
  270. *
  271. * Possible compiler options (#define xxx / -Dxxx):
  272. *
  273. * debugging can be enable by changing SK_DEBUG_CHKMOD and
  274. * SK_DEBUG_CHKCAT in makefile (described there).
  275. *
  276. ******************************************************************************/
  277. /******************************************************************************
  278. *
  279. * Description:
  280. *
  281. * This is the main module of the Linux GE driver.
  282. *
  283. * All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
  284. * are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
  285. * Those are used for drivers on multiple OS', so some thing may seem
  286. * unnecessary complicated on Linux. Please do not try to 'clean up'
  287. * them without VERY good reasons, because this will make it more
  288. * difficult to keep the Linux driver in synchronisation with the
  289. * other versions.
  290. *
  291. * Include file hierarchy:
  292. *
  293. * <linux/module.h>
  294. *
  295. * "h/skdrv1st.h"
  296. * <linux/version.h>
  297. * <linux/types.h>
  298. * <linux/kernel.h>
  299. * <linux/string.h>
  300. * <linux/errno.h>
  301. * <linux/ioport.h>
  302. * <linux/slab.h>
  303. * <linux/interrupt.h>
  304. * <linux/pci.h>
  305. * <asm/byteorder.h>
  306. * <asm/bitops.h>
  307. * <asm/io.h>
  308. * <linux/netdevice.h>
  309. * <linux/etherdevice.h>
  310. * <linux/skbuff.h>
  311. * those three depending on kernel version used:
  312. * <linux/bios32.h>
  313. * <linux/init.h>
  314. * <asm/uaccess.h>
  315. * <net/checksum.h>
  316. *
  317. * "h/skerror.h"
  318. * "h/skdebug.h"
  319. * "h/sktypes.h"
  320. * "h/lm80.h"
  321. * "h/xmac_ii.h"
  322. *
  323. * "h/skdrv2nd.h"
  324. * "h/skqueue.h"
  325. * "h/skgehwt.h"
  326. * "h/sktimer.h"
  327. * "h/ski2c.h"
  328. * "h/skgepnmi.h"
  329. * "h/skvpd.h"
  330. * "h/skgehw.h"
  331. * "h/skgeinit.h"
  332. * "h/skaddr.h"
  333. * "h/skgesirq.h"
  334. * "h/skcsum.h"
  335. * "h/skrlmt.h"
  336. *
  337. ******************************************************************************/
  338. #include <config.h>
  339. #ifdef CONFIG_SK98
  340. #include "h/skversion.h"
  341. #if 0
  342. #include <linux/module.h>
  343. #include <linux/init.h>
  344. #include <linux/proc_fs.h>
  345. #endif
  346. #include "h/skdrv1st.h"
  347. #include "h/skdrv2nd.h"
  348. /* defines ******************************************************************/
  349. /* for debuging on x86 only */
  350. /* #define BREAKPOINT() asm(" int $3"); */
  351. /* use the scatter-gather functionality with sendfile() */
  352. #if 0
  353. #define SK_ZEROCOPY
  354. #endif
  355. /* use of a transmit complete interrupt */
  356. #define USE_TX_COMPLETE
  357. /* use interrupt moderation (for tx complete only) */
  358. #define USE_INT_MOD
  359. #define INTS_PER_SEC 1000
  360. /*
  361. * threshold for copying small receive frames
  362. * set to 0 to avoid copying, set to 9001 to copy all frames
  363. */
  364. #define SK_COPY_THRESHOLD 50
  365. /* number of adapters that can be configured via command line params */
  366. #define SK_MAX_CARD_PARAM 16
  367. /*
  368. * use those defines for a compile-in version of the driver instead
  369. * of command line parameters
  370. */
  371. /* #define LINK_SPEED_A {"Auto", } */
  372. /* #define LINK_SPEED_B {"Auto", } */
  373. /* #define AUTO_NEG_A {"Sense", } */
  374. /* #define AUTO_NEG_B {"Sense", } */
  375. /* #define DUP_CAP_A {"Both", } */
  376. /* #define DUP_CAP_B {"Both", } */
  377. /* #define FLOW_CTRL_A {"SymOrRem", } */
  378. /* #define FLOW_CTRL_B {"SymOrRem", } */
  379. /* #define ROLE_A {"Auto", } */
  380. /* #define ROLE_B {"Auto", } */
  381. /* #define PREF_PORT {"A", } */
  382. /* #define RLMT_MODE {"CheckLinkState", } */
  383. #define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
  384. #define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
  385. #define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
  386. /* function prototypes ******************************************************/
  387. static void FreeResources(struct SK_NET_DEVICE *dev);
  388. static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
  389. static SK_BOOL BoardAllocMem(SK_AC *pAC);
  390. static void BoardFreeMem(SK_AC *pAC);
  391. static void BoardInitMem(SK_AC *pAC);
  392. static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
  393. int*, SK_BOOL);
  394. #if 0
  395. static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
  396. static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
  397. static int SkGeOpen(struct SK_NET_DEVICE *dev);
  398. static int SkGeClose(struct SK_NET_DEVICE *dev);
  399. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
  400. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
  401. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
  402. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
  403. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
  404. #else
  405. void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
  406. void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
  407. int SkGeOpen(struct SK_NET_DEVICE *dev);
  408. int SkGeClose(struct SK_NET_DEVICE *dev);
  409. int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
  410. #endif
  411. static void GetConfiguration(SK_AC*);
  412. static void ProductStr(SK_AC*);
  413. static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
  414. static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
  415. static void FillRxRing(SK_AC*, RX_PORT*);
  416. static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
  417. #if 0
  418. static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
  419. #else
  420. void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
  421. #endif
  422. static void ClearAndStartRx(SK_AC*, int);
  423. static void ClearTxIrq(SK_AC*, int, int);
  424. static void ClearRxRing(SK_AC*, RX_PORT*);
  425. static void ClearTxRing(SK_AC*, TX_PORT*);
  426. #if 0
  427. static void SetQueueSizes(SK_AC *pAC);
  428. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
  429. #endif
  430. static void PortReInitBmu(SK_AC*, int);
  431. #if 0
  432. static int SkGeIocMib(DEV_NET*, unsigned int, int);
  433. static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
  434. #endif
  435. /*Extern */
  436. /* external Proc function */
  437. extern int proc_read(
  438. char *buffer,
  439. char **buffer_location,
  440. off_t offset,
  441. int buffer_length,
  442. int *eof,
  443. void *data);
  444. #ifdef DEBUG
  445. static void DumpMsg(struct sk_buff*, char*);
  446. static void DumpData(char*, int);
  447. static void DumpLong(char*, int);
  448. #endif
  449. void dump_frag( SK_U8 *data, int length);
  450. /* global variables *********************************************************/
  451. #if 0
  452. static const char *BootString = BOOT_STRING;
  453. #endif
  454. struct SK_NET_DEVICE *SkGeRootDev = NULL;
  455. static int probed __initdata = 0;
  456. /* local variables **********************************************************/
  457. static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
  458. static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
  459. /* local variables **********************************************************/
  460. const char SK_Root_Dir_entry[8];
  461. #if 0
  462. static struct proc_dir_entry *pSkRootDir;
  463. #endif
  464. static struct pci_device_id supported[] = {
  465. {PCI_VENDOR_ID_3COM, 0x1700},
  466. {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
  467. {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
  468. {}
  469. };
  470. /*****************************************************************************
  471. *
  472. * skge_probe - find all SK-98xx adapters
  473. *
  474. * Description:
  475. * This function scans the PCI bus for SK-98xx adapters. Resources for
  476. * each adapter are allocated and the adapter is brought into Init 1
  477. * state.
  478. *
  479. * Returns:
  480. * 0, if everything is ok
  481. * !=0, on error
  482. */
  483. #if 0
  484. static int __init skge_probe (void)
  485. #else
  486. int skge_probe (struct eth_device ** ret_dev)
  487. #endif
  488. {
  489. #if 0
  490. int proc_root_initialized = 0;
  491. #endif
  492. int boards_found = 0;
  493. #if 0
  494. int vendor_flag = SK_FALSE;
  495. #endif
  496. SK_AC *pAC;
  497. DEV_NET *pNet = NULL;
  498. #if 0
  499. struct proc_dir_entry *pProcFile;
  500. struct pci_dev *pdev = NULL;
  501. unsigned long base_address;
  502. #else
  503. u32 base_address;
  504. #endif
  505. struct SK_NET_DEVICE *dev = NULL;
  506. #if 0
  507. SK_BOOL DeviceFound = SK_FALSE;
  508. #endif
  509. SK_BOOL BootStringCount = SK_FALSE;
  510. #if 1
  511. pci_dev_t devno;
  512. #endif
  513. if (probed)
  514. return -ENODEV;
  515. probed++;
  516. if (!pci_present()) /* is PCI support present? */
  517. return -ENODEV;
  518. #if 0
  519. while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev)))
  520. #else
  521. while((devno = pci_find_devices (supported, boards_found)) >= 0)
  522. #endif
  523. {
  524. dev = NULL;
  525. pNet = NULL;
  526. #if 0
  527. SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
  528. if (!vendor_flag)
  529. continue;
  530. #endif
  531. /* if ((pdev->vendor != PCI_VENDOR_ID_SYSKONNECT) &&
  532. ((pdev->device != PCI_DEVICE_ID_SYSKONNECT_GE) ||
  533. (pdev->device != PCI_DEVICE_ID_SYSKONNECT_YU))){
  534. continue;
  535. }
  536. */
  537. #if 0
  538. /* Configure DMA attributes. */
  539. if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
  540. pci_set_dma_mask(pdev, (u64) 0xffffffff))
  541. continue;
  542. #endif
  543. #if 0
  544. if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
  545. printk(KERN_ERR "Unable to allocate etherdev "
  546. "structure!\n");
  547. break;
  548. }
  549. #else
  550. dev = malloc (sizeof *dev);
  551. memset(dev, 0, sizeof(*dev));
  552. dev->priv = malloc(sizeof(DEV_NET));
  553. #endif
  554. if (dev->priv == NULL) {
  555. printk(KERN_ERR "Unable to allocate adapter "
  556. "structure!\n");
  557. break;
  558. }
  559. pNet = dev->priv;
  560. pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
  561. if (pNet->pAC == NULL){
  562. kfree(dev->priv);
  563. printk(KERN_ERR "Unable to allocate adapter "
  564. "structure!\n");
  565. break;
  566. }
  567. /* Print message */
  568. if (!BootStringCount) {
  569. /* set display flag to TRUE so that */
  570. /* we only display this string ONCE */
  571. BootStringCount = SK_TRUE;
  572. #ifdef SK98_INFO
  573. printk("%s\n", BootString);
  574. #endif
  575. }
  576. memset(pNet->pAC, 0, sizeof(SK_AC));
  577. pAC = pNet->pAC;
  578. #if 0
  579. pAC->PciDev = pdev;
  580. pAC->PciDevId = pdev->device;
  581. pAC->dev[0] = dev;
  582. pAC->dev[1] = dev;
  583. #else
  584. pAC->PciDev = devno;
  585. ret_dev[0] = pAC->dev[0] = dev;
  586. ret_dev[1] = pAC->dev[1] = dev;
  587. #endif
  588. sprintf(pAC->Name, "SysKonnect SK-98xx");
  589. pAC->CheckQueue = SK_FALSE;
  590. pNet->Mtu = 1500;
  591. pNet->Up = 0;
  592. #if 0
  593. dev->irq = pdev->irq;
  594. dev->open = &SkGeOpen;
  595. dev->stop = &SkGeClose;
  596. dev->hard_start_xmit = &SkGeXmit;
  597. dev->get_stats = &SkGeStats;
  598. dev->set_multicast_list = &SkGeSetRxMode;
  599. dev->set_mac_address = &SkGeSetMacAddr;
  600. dev->do_ioctl = &SkGeIoctl;
  601. dev->change_mtu = &SkGeChangeMtu;
  602. dev->flags &= ~IFF_RUNNING;
  603. #endif
  604. #ifdef SK_ZEROCOPY
  605. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  606. /* Use only if yukon hardware */
  607. /* SK and ZEROCOPY - fly baby... */
  608. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  609. }
  610. #endif
  611. #if 0
  612. /*
  613. * Dummy value.
  614. */
  615. dev->base_addr = 42;
  616. pci_set_master(pdev);
  617. pci_set_master(pdev);
  618. base_address = pci_resource_start (pdev, 0);
  619. #else
  620. pci_write_config_dword(devno,
  621. PCI_COMMAND,
  622. PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  623. pci_read_config_dword (devno, PCI_BASE_ADDRESS_0,
  624. &base_address);
  625. #endif
  626. #ifdef SK_BIG_ENDIAN
  627. /*
  628. * On big endian machines, we use the adapter's aibility of
  629. * reading the descriptors as big endian.
  630. */
  631. {
  632. SK_U32 our2;
  633. SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
  634. our2 |= PCI_REV_DESC;
  635. SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
  636. }
  637. #endif
  638. /*
  639. * Remap the regs into kernel space.
  640. */
  641. #if 0
  642. pAC->IoBase = (char*)ioremap(base_address, 0x4000);
  643. #else
  644. pAC->IoBase = (char*)pci_mem_to_phys(devno, base_address);
  645. #endif
  646. if (!pAC->IoBase){
  647. printk(KERN_ERR "%s: Unable to map I/O register, "
  648. "SK 98xx No. %i will be disabled.\n",
  649. dev->name, boards_found);
  650. kfree(dev);
  651. break;
  652. }
  653. pAC->Index = boards_found;
  654. if (SkGeBoardInit(dev, pAC)) {
  655. FreeResources(dev);
  656. kfree(dev);
  657. continue;
  658. }
  659. #if 0
  660. memcpy((caddr_t) &dev->dev_addr,
  661. (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
  662. #else
  663. memcpy((caddr_t) &dev->enetaddr,
  664. (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
  665. #endif
  666. #if 0
  667. /* First adapter... Create proc and print message */
  668. if (!DeviceFound) {
  669. DeviceFound = SK_TRUE;
  670. SK_MEMCPY(&SK_Root_Dir_entry, BootString,
  671. sizeof(SK_Root_Dir_entry) - 1);
  672. /*Create proc (directory)*/
  673. if(!proc_root_initialized) {
  674. pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
  675. S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
  676. proc_root_initialized = 1;
  677. }
  678. pSkRootDir->owner = THIS_MODULE;
  679. }
  680. /* Create proc file */
  681. pProcFile = create_proc_entry(dev->name,
  682. S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
  683. pSkRootDir);
  684. pProcFile->read_proc = proc_read;
  685. pProcFile->write_proc = NULL;
  686. pProcFile->nlink = 1;
  687. pProcFile->size = sizeof(dev->name + 1);
  688. pProcFile->data = (void *)pProcFile;
  689. #endif
  690. pNet->PortNr = 0;
  691. pNet->NetNr = 0;
  692. #ifdef SK_ZEROCOPY
  693. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  694. /* SG and ZEROCOPY - fly baby... */
  695. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  696. }
  697. #endif
  698. boards_found++;
  699. /* More then one port found */
  700. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  701. #if 0
  702. if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
  703. printk(KERN_ERR "Unable to allocate etherdev "
  704. "structure!\n");
  705. break;
  706. }
  707. #else
  708. dev = malloc (sizeof *dev);
  709. memset(dev, 0, sizeof(*dev));
  710. dev->priv = malloc(sizeof(DEV_NET));
  711. #endif
  712. pAC->dev[1] = dev;
  713. pNet = dev->priv;
  714. pNet->PortNr = 1;
  715. pNet->NetNr = 1;
  716. pNet->pAC = pAC;
  717. pNet->Mtu = 1500;
  718. pNet->Up = 0;
  719. #if 0
  720. dev->open = &SkGeOpen;
  721. dev->stop = &SkGeClose;
  722. dev->hard_start_xmit = &SkGeXmit;
  723. dev->get_stats = &SkGeStats;
  724. dev->set_multicast_list = &SkGeSetRxMode;
  725. dev->set_mac_address = &SkGeSetMacAddr;
  726. dev->do_ioctl = &SkGeIoctl;
  727. dev->change_mtu = &SkGeChangeMtu;
  728. dev->flags &= ~IFF_RUNNING;
  729. #endif
  730. #ifdef SK_ZEROCOPY
  731. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  732. /* SG and ZEROCOPY - fly baby... */
  733. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  734. }
  735. #endif
  736. #if 0
  737. pProcFile = create_proc_entry(dev->name,
  738. S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
  739. pSkRootDir);
  740. pProcFile->read_proc = proc_read;
  741. pProcFile->write_proc = NULL;
  742. pProcFile->nlink = 1;
  743. pProcFile->size = sizeof(dev->name + 1);
  744. pProcFile->data = (void *)pProcFile;
  745. #endif
  746. #if 0
  747. memcpy((caddr_t) &dev->dev_addr,
  748. (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
  749. #else
  750. memcpy((caddr_t) &dev->enetaddr,
  751. (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
  752. #endif
  753. printk("%s: %s\n", dev->name, pAC->DeviceStr);
  754. printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
  755. }
  756. /* Save the hardware revision */
  757. pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
  758. (pAC->GIni.GIPciHwRev & 0x0F);
  759. /*
  760. * This is bollocks, but we need to tell the net-init
  761. * code that it shall go for the next device.
  762. */
  763. #if 0
  764. #ifndef MODULE
  765. dev->base_addr = 0;
  766. #endif
  767. #endif
  768. }
  769. /*
  770. * If we're at this point we're going through skge_probe() for
  771. * the first time. Return success (0) if we've initialized 1
  772. * or more boards. Otherwise, return failure (-ENODEV).
  773. */
  774. return boards_found;
  775. } /* skge_probe */
  776. /*****************************************************************************
  777. *
  778. * FreeResources - release resources allocated for adapter
  779. *
  780. * Description:
  781. * This function releases the IRQ, unmaps the IO and
  782. * frees the desriptor ring.
  783. *
  784. * Returns: N/A
  785. *
  786. */
  787. static void FreeResources(struct SK_NET_DEVICE *dev)
  788. {
  789. SK_U32 AllocFlag;
  790. DEV_NET *pNet;
  791. SK_AC *pAC;
  792. if (dev->priv) {
  793. pNet = (DEV_NET*) dev->priv;
  794. pAC = pNet->pAC;
  795. AllocFlag = pAC->AllocFlag;
  796. #if 0
  797. if (AllocFlag & SK_ALLOC_IRQ) {
  798. free_irq(dev->irq, dev);
  799. }
  800. if (pAC->IoBase) {
  801. iounmap(pAC->IoBase);
  802. }
  803. #endif
  804. if (pAC->pDescrMem) {
  805. BoardFreeMem(pAC);
  806. }
  807. }
  808. } /* FreeResources */
  809. #if 0
  810. MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
  811. MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
  812. MODULE_LICENSE("GPL");
  813. MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  814. MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  815. MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  816. MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  817. MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  818. MODULE_PARM(DupCap_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  819. MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  820. MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  821. MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  822. MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  823. MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  824. MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  825. /* not used, just there because every driver should have them: */
  826. MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
  827. MODULE_PARM(debug, "i");
  828. #endif
  829. #ifdef LINK_SPEED_A
  830. static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED_A;
  831. #else
  832. static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
  833. #endif
  834. #ifdef LINK_SPEED_B
  835. static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED_B;
  836. #else
  837. static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
  838. #endif
  839. #ifdef AUTO_NEG_A
  840. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
  841. #else
  842. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
  843. #endif
  844. #ifdef DUP_CAP_A
  845. static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
  846. #else
  847. static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
  848. #endif
  849. #ifdef FLOW_CTRL_A
  850. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
  851. #else
  852. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
  853. #endif
  854. #ifdef ROLE_A
  855. static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
  856. #else
  857. static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
  858. #endif
  859. #ifdef AUTO_NEG_B
  860. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
  861. #else
  862. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
  863. #endif
  864. #ifdef DUP_CAP_B
  865. static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
  866. #else
  867. static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
  868. #endif
  869. #ifdef FLOW_CTRL_B
  870. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
  871. #else
  872. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
  873. #endif
  874. #ifdef ROLE_B
  875. static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
  876. #else
  877. static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
  878. #endif
  879. #ifdef PREF_PORT
  880. static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
  881. #else
  882. static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
  883. #endif
  884. #ifdef RLMT_MODE
  885. static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
  886. #else
  887. static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
  888. #endif
  889. #if 0
  890. static int debug = 0; /* not used */
  891. static int options[SK_MAX_CARD_PARAM] = {0, }; /* not used */
  892. /*****************************************************************************
  893. *
  894. * skge_init_module - module initialization function
  895. *
  896. * Description:
  897. * Very simple, only call skge_probe and return approriate result.
  898. *
  899. * Returns:
  900. * 0, if everything is ok
  901. * !=0, on error
  902. */
  903. static int __init skge_init_module(void)
  904. {
  905. int cards;
  906. SkGeRootDev = NULL;
  907. /* just to avoid warnings ... */
  908. debug = 0;
  909. options[0] = 0;
  910. cards = skge_probe();
  911. if (cards == 0) {
  912. printk("sk98lin: No adapter found.\n");
  913. }
  914. return cards ? 0 : -ENODEV;
  915. } /* skge_init_module */
  916. /*****************************************************************************
  917. *
  918. * skge_cleanup_module - module unload function
  919. *
  920. * Description:
  921. * Disable adapter if it is still running, free resources,
  922. * free device struct.
  923. *
  924. * Returns: N/A
  925. */
  926. static void __exit skge_cleanup_module(void)
  927. {
  928. DEV_NET *pNet;
  929. SK_AC *pAC;
  930. struct SK_NET_DEVICE *next;
  931. unsigned long Flags;
  932. SK_EVPARA EvPara;
  933. while (SkGeRootDev) {
  934. pNet = (DEV_NET*) SkGeRootDev->priv;
  935. pAC = pNet->pAC;
  936. next = pAC->Next;
  937. netif_stop_queue(SkGeRootDev);
  938. SkGeYellowLED(pAC, pAC->IoBase, 0);
  939. if(pAC->BoardLevel == 2) {
  940. /* board is still alive */
  941. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  942. EvPara.Para32[0] = 0;
  943. EvPara.Para32[1] = -1;
  944. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  945. EvPara.Para32[0] = 1;
  946. EvPara.Para32[1] = -1;
  947. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  948. SkEventDispatcher(pAC, pAC->IoBase);
  949. /* disable interrupts */
  950. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  951. SkGeDeInit(pAC, pAC->IoBase);
  952. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  953. pAC->BoardLevel = 0;
  954. /* We do NOT check here, if IRQ was pending, of course*/
  955. }
  956. if(pAC->BoardLevel == 1) {
  957. /* board is still alive */
  958. SkGeDeInit(pAC, pAC->IoBase);
  959. pAC->BoardLevel = 0;
  960. }
  961. if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
  962. unregister_netdev(pAC->dev[1]);
  963. kfree(pAC->dev[1]);
  964. }
  965. FreeResources(SkGeRootDev);
  966. SkGeRootDev->get_stats = NULL;
  967. /*
  968. * otherwise unregister_netdev calls get_stats with
  969. * invalid IO ... :-(
  970. */
  971. unregister_netdev(SkGeRootDev);
  972. kfree(SkGeRootDev);
  973. kfree(pAC);
  974. SkGeRootDev = next;
  975. }
  976. /* clear proc-dir */
  977. remove_proc_entry(pSkRootDir->name, proc_net);
  978. } /* skge_cleanup_module */
  979. module_init(skge_init_module);
  980. module_exit(skge_cleanup_module);
  981. #endif
  982. /*****************************************************************************
  983. *
  984. * SkGeBoardInit - do level 0 and 1 initialization
  985. *
  986. * Description:
  987. * This function prepares the board hardware for running. The desriptor
  988. * ring is set up, the IRQ is allocated and the configuration settings
  989. * are examined.
  990. *
  991. * Returns:
  992. * 0, if everything is ok
  993. * !=0, on error
  994. */
  995. static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
  996. {
  997. short i;
  998. unsigned long Flags;
  999. char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
  1000. char *VerStr = VER_STRING;
  1001. #if 0
  1002. int Ret; /* return code of request_irq */
  1003. #endif
  1004. SK_BOOL DualNet;
  1005. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1006. ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
  1007. for (i=0; i<SK_MAX_MACS; i++) {
  1008. pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
  1009. pAC->TxPort[i][0].PortIndex = i;
  1010. pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
  1011. pAC->RxPort[i].PortIndex = i;
  1012. }
  1013. /* Initialize the mutexes */
  1014. for (i=0; i<SK_MAX_MACS; i++) {
  1015. spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
  1016. spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
  1017. }
  1018. spin_lock_init(&pAC->SlowPathLock);
  1019. /* level 0 init common modules here */
  1020. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1021. /* Does a RESET on board ...*/
  1022. if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
  1023. printk("HWInit (0) failed.\n");
  1024. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1025. return(-EAGAIN);
  1026. }
  1027. SkI2cInit( pAC, pAC->IoBase, 0);
  1028. SkEventInit(pAC, pAC->IoBase, 0);
  1029. SkPnmiInit( pAC, pAC->IoBase, 0);
  1030. SkAddrInit( pAC, pAC->IoBase, 0);
  1031. SkRlmtInit( pAC, pAC->IoBase, 0);
  1032. SkTimerInit(pAC, pAC->IoBase, 0);
  1033. pAC->BoardLevel = 0;
  1034. pAC->RxBufSize = ETH_BUF_SIZE;
  1035. SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
  1036. SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
  1037. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1038. /* level 1 init common modules here (HW init) */
  1039. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1040. if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
  1041. printk("HWInit (1) failed.\n");
  1042. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1043. return(-EAGAIN);
  1044. }
  1045. SkI2cInit( pAC, pAC->IoBase, 1);
  1046. SkEventInit(pAC, pAC->IoBase, 1);
  1047. SkPnmiInit( pAC, pAC->IoBase, 1);
  1048. SkAddrInit( pAC, pAC->IoBase, 1);
  1049. SkRlmtInit( pAC, pAC->IoBase, 1);
  1050. SkTimerInit(pAC, pAC->IoBase, 1);
  1051. GetConfiguration(pAC);
  1052. if (pAC->RlmtNets == 2) {
  1053. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  1054. }
  1055. pAC->BoardLevel = 1;
  1056. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1057. #if 0
  1058. if (pAC->GIni.GIMacsFound == 2) {
  1059. Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
  1060. } else if (pAC->GIni.GIMacsFound == 1) {
  1061. Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
  1062. pAC->Name, dev);
  1063. } else {
  1064. printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
  1065. dev->name, pAC->GIni.GIMacsFound);
  1066. return -EAGAIN;
  1067. }
  1068. if (Ret) {
  1069. printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
  1070. dev->name, dev->irq);
  1071. return -EAGAIN;
  1072. }
  1073. #endif
  1074. pAC->AllocFlag |= SK_ALLOC_IRQ;
  1075. /* Alloc memory for this board (Mem for RxD/TxD) : */
  1076. if(!BoardAllocMem(pAC)) {
  1077. printk("No memory for descriptor rings.\n");
  1078. return(-EAGAIN);
  1079. }
  1080. SkCsSetReceiveFlags(pAC,
  1081. SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
  1082. &pAC->CsOfs1, &pAC->CsOfs2, 0);
  1083. pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
  1084. BoardInitMem(pAC);
  1085. #if 0
  1086. SetQueueSizes(pAC);
  1087. #else
  1088. /* tschilling: New common function with minimum size check. */
  1089. DualNet = SK_FALSE;
  1090. if (pAC->RlmtNets == 2) {
  1091. DualNet = SK_TRUE;
  1092. }
  1093. if (SkGeInitAssignRamToQueues(
  1094. pAC,
  1095. pAC->ActivePort,
  1096. DualNet)) {
  1097. BoardFreeMem(pAC);
  1098. printk("SkGeInitAssignRamToQueues failed.\n");
  1099. return(-EAGAIN);
  1100. }
  1101. #endif
  1102. /* Print adapter specific string from vpd */
  1103. ProductStr(pAC);
  1104. #ifdef SK98_INFO
  1105. printk("%s: %s\n", dev->name, pAC->DeviceStr);
  1106. /* Print configuration settings */
  1107. printk(" PrefPort:%c RlmtMode:%s\n",
  1108. 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
  1109. (pAC->RlmtMode==0) ? "Check Link State" :
  1110. ((pAC->RlmtMode==1) ? "Check Link State" :
  1111. ((pAC->RlmtMode==3) ? "Check Local Port" :
  1112. ((pAC->RlmtMode==7) ? "Check Segmentation" :
  1113. ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
  1114. #endif
  1115. SkGeYellowLED(pAC, pAC->IoBase, 1);
  1116. /*
  1117. * Register the device here
  1118. */
  1119. pAC->Next = SkGeRootDev;
  1120. SkGeRootDev = dev;
  1121. return (0);
  1122. } /* SkGeBoardInit */
  1123. /*****************************************************************************
  1124. *
  1125. * BoardAllocMem - allocate the memory for the descriptor rings
  1126. *
  1127. * Description:
  1128. * This function allocates the memory for all descriptor rings.
  1129. * Each ring is aligned for the desriptor alignment and no ring
  1130. * has a 4 GByte boundary in it (because the upper 32 bit must
  1131. * be constant for all descriptiors in one rings).
  1132. *
  1133. * Returns:
  1134. * SK_TRUE, if all memory could be allocated
  1135. * SK_FALSE, if not
  1136. */
  1137. static SK_BOOL BoardAllocMem(
  1138. SK_AC *pAC)
  1139. {
  1140. caddr_t pDescrMem; /* pointer to descriptor memory area */
  1141. size_t AllocLength; /* length of complete descriptor area */
  1142. int i; /* loop counter */
  1143. unsigned long BusAddr;
  1144. /* rings plus one for alignment (do not cross 4 GB boundary) */
  1145. /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
  1146. #if (BITS_PER_LONG == 32)
  1147. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  1148. #else
  1149. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  1150. + RX_RING_SIZE + 8;
  1151. #endif
  1152. pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
  1153. &pAC->pDescrMemDMA);
  1154. if (pDescrMem == NULL) {
  1155. return (SK_FALSE);
  1156. }
  1157. pAC->pDescrMem = pDescrMem;
  1158. BusAddr = (unsigned long) pAC->pDescrMemDMA;
  1159. /* Descriptors need 8 byte alignment, and this is ensured
  1160. * by pci_alloc_consistent.
  1161. */
  1162. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1163. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1164. ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
  1165. i, (unsigned long) pDescrMem,
  1166. BusAddr));
  1167. pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
  1168. pAC->TxPort[i][0].VTxDescrRing = BusAddr;
  1169. pDescrMem += TX_RING_SIZE;
  1170. BusAddr += TX_RING_SIZE;
  1171. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1172. ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
  1173. i, (unsigned long) pDescrMem,
  1174. (unsigned long)BusAddr));
  1175. pAC->RxPort[i].pRxDescrRing = pDescrMem;
  1176. pAC->RxPort[i].VRxDescrRing = BusAddr;
  1177. pDescrMem += RX_RING_SIZE;
  1178. BusAddr += RX_RING_SIZE;
  1179. } /* for */
  1180. return (SK_TRUE);
  1181. } /* BoardAllocMem */
  1182. /****************************************************************************
  1183. *
  1184. * BoardFreeMem - reverse of BoardAllocMem
  1185. *
  1186. * Description:
  1187. * Free all memory allocated in BoardAllocMem: adapter context,
  1188. * descriptor rings, locks.
  1189. *
  1190. * Returns: N/A
  1191. */
  1192. static void BoardFreeMem(
  1193. SK_AC *pAC)
  1194. {
  1195. size_t AllocLength; /* length of complete descriptor area */
  1196. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1197. ("BoardFreeMem\n"));
  1198. #if (BITS_PER_LONG == 32)
  1199. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  1200. #else
  1201. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  1202. + RX_RING_SIZE + 8;
  1203. #endif
  1204. pci_free_consistent(pAC->PciDev, AllocLength,
  1205. pAC->pDescrMem, pAC->pDescrMemDMA);
  1206. pAC->pDescrMem = NULL;
  1207. } /* BoardFreeMem */
  1208. /*****************************************************************************
  1209. *
  1210. * BoardInitMem - initiate the descriptor rings
  1211. *
  1212. * Description:
  1213. * This function sets the descriptor rings up in memory.
  1214. * The adapter is initialized with the descriptor start addresses.
  1215. *
  1216. * Returns: N/A
  1217. */
  1218. static void BoardInitMem(
  1219. SK_AC *pAC) /* pointer to adapter context */
  1220. {
  1221. int i; /* loop counter */
  1222. int RxDescrSize; /* the size of a rx descriptor rounded up to alignment*/
  1223. int TxDescrSize; /* the size of a tx descriptor rounded up to alignment*/
  1224. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1225. ("BoardInitMem\n"));
  1226. RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  1227. pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
  1228. TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  1229. pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
  1230. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1231. SetupRing(
  1232. pAC,
  1233. pAC->TxPort[i][0].pTxDescrRing,
  1234. pAC->TxPort[i][0].VTxDescrRing,
  1235. (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
  1236. (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
  1237. (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
  1238. &pAC->TxPort[i][0].TxdRingFree,
  1239. SK_TRUE);
  1240. SetupRing(
  1241. pAC,
  1242. pAC->RxPort[i].pRxDescrRing,
  1243. pAC->RxPort[i].VRxDescrRing,
  1244. &pAC->RxPort[i].pRxdRingHead,
  1245. &pAC->RxPort[i].pRxdRingTail,
  1246. &pAC->RxPort[i].pRxdRingPrev,
  1247. &pAC->RxPort[i].RxdRingFree,
  1248. SK_FALSE);
  1249. }
  1250. } /* BoardInitMem */
  1251. /*****************************************************************************
  1252. *
  1253. * SetupRing - create one descriptor ring
  1254. *
  1255. * Description:
  1256. * This function creates one descriptor ring in the given memory area.
  1257. * The head, tail and number of free descriptors in the ring are set.
  1258. *
  1259. * Returns:
  1260. * none
  1261. */
  1262. static void SetupRing(
  1263. SK_AC *pAC,
  1264. void *pMemArea, /* a pointer to the memory area for the ring */
  1265. uintptr_t VMemArea, /* the virtual bus address of the memory area */
  1266. RXD **ppRingHead, /* address where the head should be written */
  1267. RXD **ppRingTail, /* address where the tail should be written */
  1268. RXD **ppRingPrev, /* address where the tail should be written */
  1269. int *pRingFree, /* address where the # of free descr. goes */
  1270. SK_BOOL IsTx) /* flag: is this a tx ring */
  1271. {
  1272. int i; /* loop counter */
  1273. int DescrSize; /* the size of a descriptor rounded up to alignment*/
  1274. int DescrNum; /* number of descriptors per ring */
  1275. RXD *pDescr; /* pointer to a descriptor (receive or transmit) */
  1276. RXD *pNextDescr; /* pointer to the next descriptor */
  1277. RXD *pPrevDescr; /* pointer to the previous descriptor */
  1278. uintptr_t VNextDescr; /* the virtual bus address of the next descriptor */
  1279. if (IsTx == SK_TRUE) {
  1280. DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
  1281. DESCR_ALIGN;
  1282. DescrNum = TX_RING_SIZE / DescrSize;
  1283. } else {
  1284. DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
  1285. DESCR_ALIGN;
  1286. DescrNum = RX_RING_SIZE / DescrSize;
  1287. }
  1288. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1289. ("Descriptor size: %d Descriptor Number: %d\n",
  1290. DescrSize,DescrNum));
  1291. pDescr = (RXD*) pMemArea;
  1292. pPrevDescr = NULL;
  1293. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  1294. VNextDescr = VMemArea + DescrSize;
  1295. for(i=0; i<DescrNum; i++) {
  1296. /* set the pointers right */
  1297. pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
  1298. pDescr->pNextRxd = pNextDescr;
  1299. pDescr->TcpSumStarts = pAC->CsOfs;
  1300. /* advance one step */
  1301. pPrevDescr = pDescr;
  1302. pDescr = pNextDescr;
  1303. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  1304. VNextDescr += DescrSize;
  1305. }
  1306. pPrevDescr->pNextRxd = (RXD*) pMemArea;
  1307. pPrevDescr->VNextRxd = VMemArea;
  1308. pDescr = (RXD*) pMemArea;
  1309. *ppRingHead = (RXD*) pMemArea;
  1310. *ppRingTail = *ppRingHead;
  1311. *ppRingPrev = pPrevDescr;
  1312. *pRingFree = DescrNum;
  1313. } /* SetupRing */
  1314. /*****************************************************************************
  1315. *
  1316. * PortReInitBmu - re-initiate the descriptor rings for one port
  1317. *
  1318. * Description:
  1319. * This function reinitializes the descriptor rings of one port
  1320. * in memory. The port must be stopped before.
  1321. * The HW is initialized with the descriptor start addresses.
  1322. *
  1323. * Returns:
  1324. * none
  1325. */
  1326. static void PortReInitBmu(
  1327. SK_AC *pAC, /* pointer to adapter context */
  1328. int PortIndex) /* index of the port for which to re-init */
  1329. {
  1330. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1331. ("PortReInitBmu "));
  1332. /* set address of first descriptor of ring in BMU */
  1333. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
  1334. TX_Q_CUR_DESCR_LOW,
  1335. (uint32_t)(((caddr_t)
  1336. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  1337. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  1338. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
  1339. 0xFFFFFFFF));
  1340. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
  1341. TX_Q_DESCR_HIGH,
  1342. (uint32_t)(((caddr_t)
  1343. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  1344. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  1345. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
  1346. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
  1347. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  1348. pAC->RxPort[PortIndex].pRxDescrRing +
  1349. pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
  1350. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
  1351. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  1352. pAC->RxPort[PortIndex].pRxDescrRing +
  1353. pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
  1354. } /* PortReInitBmu */
  1355. /****************************************************************************
  1356. *
  1357. * SkGeIsr - handle adapter interrupts
  1358. *
  1359. * Description:
  1360. * The interrupt routine is called when the network adapter
  1361. * generates an interrupt. It may also be called if another device
  1362. * shares this interrupt vector with the driver.
  1363. *
  1364. * Returns: N/A
  1365. *
  1366. */
  1367. #if 0
  1368. static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
  1369. #else
  1370. void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
  1371. #endif
  1372. {
  1373. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  1374. DEV_NET *pNet;
  1375. SK_AC *pAC;
  1376. SK_U32 IntSrc; /* interrupts source register contents */
  1377. pNet = (DEV_NET*) dev->priv;
  1378. pAC = pNet->pAC;
  1379. /*
  1380. * Check and process if its our interrupt
  1381. */
  1382. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  1383. if (IntSrc == 0) {
  1384. return;
  1385. }
  1386. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  1387. #if 0 /* software irq currently not used */
  1388. if (IntSrc & IRQ_SW) {
  1389. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1390. SK_DBGCAT_DRV_INT_SRC,
  1391. ("Software IRQ\n"));
  1392. }
  1393. #endif
  1394. if (IntSrc & IRQ_EOF_RX1) {
  1395. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1396. SK_DBGCAT_DRV_INT_SRC,
  1397. ("EOF RX1 IRQ\n"));
  1398. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1399. SK_PNMI_CNT_RX_INTR(pAC, 0);
  1400. }
  1401. if (IntSrc & IRQ_EOF_RX2) {
  1402. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1403. SK_DBGCAT_DRV_INT_SRC,
  1404. ("EOF RX2 IRQ\n"));
  1405. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  1406. SK_PNMI_CNT_RX_INTR(pAC, 1);
  1407. }
  1408. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1409. if (IntSrc & IRQ_EOF_AS_TX1) {
  1410. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1411. SK_DBGCAT_DRV_INT_SRC,
  1412. ("EOF AS TX1 IRQ\n"));
  1413. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1414. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1415. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  1416. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1417. }
  1418. if (IntSrc & IRQ_EOF_AS_TX2) {
  1419. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1420. SK_DBGCAT_DRV_INT_SRC,
  1421. ("EOF AS TX2 IRQ\n"));
  1422. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1423. spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  1424. FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
  1425. spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  1426. }
  1427. #if 0 /* only if sync. queues used */
  1428. if (IntSrc & IRQ_EOF_SY_TX1) {
  1429. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1430. SK_DBGCAT_DRV_INT_SRC,
  1431. ("EOF SY TX1 IRQ\n"));
  1432. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1433. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1434. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  1435. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1436. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  1437. }
  1438. if (IntSrc & IRQ_EOF_SY_TX2) {
  1439. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1440. SK_DBGCAT_DRV_INT_SRC,
  1441. ("EOF SY TX2 IRQ\n"));
  1442. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1443. spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  1444. FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
  1445. spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  1446. ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
  1447. }
  1448. #endif
  1449. #endif
  1450. /* do all IO at once */
  1451. if (IntSrc & IRQ_EOF_RX1)
  1452. ClearAndStartRx(pAC, 0);
  1453. if (IntSrc & IRQ_EOF_RX2)
  1454. ClearAndStartRx(pAC, 1);
  1455. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1456. if (IntSrc & IRQ_EOF_AS_TX1)
  1457. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  1458. if (IntSrc & IRQ_EOF_AS_TX2)
  1459. ClearTxIrq(pAC, 1, TX_PRIO_LOW);
  1460. #endif
  1461. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  1462. } /* while (IntSrc & IRQ_MASK != 0) */
  1463. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  1464. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  1465. ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
  1466. pAC->CheckQueue = SK_FALSE;
  1467. spin_lock(&pAC->SlowPathLock);
  1468. if (IntSrc & SPECIAL_IRQS)
  1469. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  1470. SkEventDispatcher(pAC, pAC->IoBase);
  1471. spin_unlock(&pAC->SlowPathLock);
  1472. }
  1473. /*
  1474. * do it all again is case we cleared an interrupt that
  1475. * came in after handling the ring (OUTs may be delayed
  1476. * in hardware buffers, but are through after IN)
  1477. */
  1478. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1479. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  1480. if (pAC->CheckQueue) {
  1481. pAC->CheckQueue = SK_FALSE;
  1482. spin_lock(&pAC->SlowPathLock);
  1483. SkEventDispatcher(pAC, pAC->IoBase);
  1484. spin_unlock(&pAC->SlowPathLock);
  1485. }
  1486. /* IRQ is processed - Enable IRQs again*/
  1487. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1488. return;
  1489. } /* SkGeIsr */
  1490. /****************************************************************************
  1491. *
  1492. * SkGeIsrOnePort - handle adapter interrupts for single port adapter
  1493. *
  1494. * Description:
  1495. * The interrupt routine is called when the network adapter
  1496. * generates an interrupt. It may also be called if another device
  1497. * shares this interrupt vector with the driver.
  1498. * This is the same as above, but handles only one port.
  1499. *
  1500. * Returns: N/A
  1501. *
  1502. */
  1503. #if 0
  1504. static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
  1505. #else
  1506. void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
  1507. #endif
  1508. {
  1509. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  1510. DEV_NET *pNet;
  1511. SK_AC *pAC;
  1512. SK_U32 IntSrc; /* interrupts source register contents */
  1513. pNet = (DEV_NET*) dev->priv;
  1514. pAC = pNet->pAC;
  1515. /*
  1516. * Check and process if its our interrupt
  1517. */
  1518. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  1519. if (IntSrc == 0) {
  1520. return;
  1521. }
  1522. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  1523. #if 0 /* software irq currently not used */
  1524. if (IntSrc & IRQ_SW) {
  1525. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1526. SK_DBGCAT_DRV_INT_SRC,
  1527. ("Software IRQ\n"));
  1528. }
  1529. #endif
  1530. if (IntSrc & IRQ_EOF_RX1) {
  1531. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1532. SK_DBGCAT_DRV_INT_SRC,
  1533. ("EOF RX1 IRQ\n"));
  1534. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1535. SK_PNMI_CNT_RX_INTR(pAC, 0);
  1536. }
  1537. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1538. if (IntSrc & IRQ_EOF_AS_TX1) {
  1539. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1540. SK_DBGCAT_DRV_INT_SRC,
  1541. ("EOF AS TX1 IRQ\n"));
  1542. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1543. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1544. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  1545. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1546. }
  1547. #if 0 /* only if sync. queues used */
  1548. if (IntSrc & IRQ_EOF_SY_TX1) {
  1549. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1550. SK_DBGCAT_DRV_INT_SRC,
  1551. ("EOF SY TX1 IRQ\n"));
  1552. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1553. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1554. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  1555. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1556. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  1557. }
  1558. #endif
  1559. #endif
  1560. /* do all IO at once */
  1561. if (IntSrc & IRQ_EOF_RX1)
  1562. ClearAndStartRx(pAC, 0);
  1563. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1564. if (IntSrc & IRQ_EOF_AS_TX1)
  1565. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  1566. #endif
  1567. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  1568. } /* while (IntSrc & IRQ_MASK != 0) */
  1569. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  1570. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  1571. ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
  1572. pAC->CheckQueue = SK_FALSE;
  1573. spin_lock(&pAC->SlowPathLock);
  1574. if (IntSrc & SPECIAL_IRQS)
  1575. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  1576. SkEventDispatcher(pAC, pAC->IoBase);
  1577. spin_unlock(&pAC->SlowPathLock);
  1578. }
  1579. /*
  1580. * do it all again is case we cleared an interrupt that
  1581. * came in after handling the ring (OUTs may be delayed
  1582. * in hardware buffers, but are through after IN)
  1583. */
  1584. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1585. /* IRQ is processed - Enable IRQs again*/
  1586. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1587. return;
  1588. } /* SkGeIsrOnePort */
  1589. /****************************************************************************
  1590. *
  1591. * SkGeOpen - handle start of initialized adapter
  1592. *
  1593. * Description:
  1594. * This function starts the initialized adapter.
  1595. * The board level variable is set and the adapter is
  1596. * brought to full functionality.
  1597. * The device flags are set for operation.
  1598. * Do all necessary level 2 initialization, enable interrupts and
  1599. * give start command to RLMT.
  1600. *
  1601. * Returns:
  1602. * 0 on success
  1603. * != 0 on error
  1604. */
  1605. #if 0
  1606. static int SkGeOpen(
  1607. #else
  1608. int SkGeOpen(
  1609. #endif
  1610. struct SK_NET_DEVICE *dev)
  1611. {
  1612. DEV_NET *pNet;
  1613. SK_AC *pAC;
  1614. unsigned long Flags; /* for spin lock */
  1615. int i;
  1616. SK_EVPARA EvPara; /* an event parameter union */
  1617. pNet = (DEV_NET*) dev->priv;
  1618. pAC = pNet->pAC;
  1619. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1620. ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
  1621. if (pAC->BoardLevel == 0) {
  1622. /* level 1 init common modules here */
  1623. if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
  1624. printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
  1625. return (-1);
  1626. }
  1627. SkI2cInit (pAC, pAC->IoBase, 1);
  1628. SkEventInit (pAC, pAC->IoBase, 1);
  1629. SkPnmiInit (pAC, pAC->IoBase, 1);
  1630. SkAddrInit (pAC, pAC->IoBase, 1);
  1631. SkRlmtInit (pAC, pAC->IoBase, 1);
  1632. SkTimerInit (pAC, pAC->IoBase, 1);
  1633. pAC->BoardLevel = 1;
  1634. }
  1635. if (pAC->BoardLevel != 2) {
  1636. /* tschilling: Level 2 init modules here, check return value. */
  1637. if (SkGeInit(pAC, pAC->IoBase, 2) != 0) {
  1638. printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
  1639. return (-1);
  1640. }
  1641. SkI2cInit (pAC, pAC->IoBase, 2);
  1642. SkEventInit (pAC, pAC->IoBase, 2);
  1643. SkPnmiInit (pAC, pAC->IoBase, 2);
  1644. SkAddrInit (pAC, pAC->IoBase, 2);
  1645. SkRlmtInit (pAC, pAC->IoBase, 2);
  1646. SkTimerInit (pAC, pAC->IoBase, 2);
  1647. pAC->BoardLevel = 2;
  1648. }
  1649. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1650. /* Enable transmit descriptor polling. */
  1651. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  1652. FillRxRing(pAC, &pAC->RxPort[i]);
  1653. }
  1654. SkGeYellowLED(pAC, pAC->IoBase, 1);
  1655. #ifdef USE_INT_MOD
  1656. /* moderate only TX complete interrupts (these are not time critical) */
  1657. #define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
  1658. {
  1659. unsigned long ModBase;
  1660. ModBase = 53125000 / INTS_PER_SEC;
  1661. SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
  1662. SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
  1663. SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
  1664. }
  1665. #endif
  1666. /* enable Interrupts */
  1667. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1668. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  1669. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1670. if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
  1671. EvPara.Para32[0] = pAC->RlmtNets;
  1672. EvPara.Para32[1] = -1;
  1673. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
  1674. EvPara);
  1675. EvPara.Para32[0] = pAC->RlmtMode;
  1676. EvPara.Para32[1] = 0;
  1677. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
  1678. EvPara);
  1679. }
  1680. EvPara.Para32[0] = pNet->NetNr;
  1681. EvPara.Para32[1] = -1;
  1682. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  1683. SkEventDispatcher(pAC, pAC->IoBase);
  1684. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1685. pAC->MaxPorts++;
  1686. pNet->Up = 1;
  1687. MOD_INC_USE_COUNT;
  1688. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1689. ("SkGeOpen suceeded\n"));
  1690. return (0);
  1691. } /* SkGeOpen */
  1692. /****************************************************************************
  1693. *
  1694. * SkGeClose - Stop initialized adapter
  1695. *
  1696. * Description:
  1697. * Close initialized adapter.
  1698. *
  1699. * Returns:
  1700. * 0 - on success
  1701. * error code - on error
  1702. */
  1703. #if 0
  1704. static int SkGeClose(
  1705. #else
  1706. int SkGeClose(
  1707. #endif
  1708. struct SK_NET_DEVICE *dev)
  1709. {
  1710. DEV_NET *pNet;
  1711. SK_AC *pAC;
  1712. unsigned long Flags; /* for spin lock */
  1713. int i;
  1714. int PortIdx;
  1715. SK_EVPARA EvPara;
  1716. netif_stop_queue(dev);
  1717. pNet = (DEV_NET*) dev->priv;
  1718. pAC = pNet->pAC;
  1719. if (pAC->RlmtNets == 1)
  1720. PortIdx = pAC->ActivePort;
  1721. else
  1722. PortIdx = pNet->NetNr;
  1723. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1724. ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
  1725. /*
  1726. * Clear multicast table, promiscuous mode ....
  1727. */
  1728. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  1729. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  1730. SK_PROM_MODE_NONE);
  1731. if (pAC->MaxPorts == 1) {
  1732. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1733. /* disable interrupts */
  1734. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1735. EvPara.Para32[0] = pNet->NetNr;
  1736. EvPara.Para32[1] = -1;
  1737. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1738. SkEventDispatcher(pAC, pAC->IoBase);
  1739. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1740. /* stop the hardware */
  1741. SkGeDeInit(pAC, pAC->IoBase);
  1742. pAC->BoardLevel = 0;
  1743. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1744. } else {
  1745. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1746. EvPara.Para32[0] = pNet->NetNr;
  1747. EvPara.Para32[1] = -1;
  1748. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1749. SkEventDispatcher(pAC, pAC->IoBase);
  1750. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1751. /* Stop port */
  1752. spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
  1753. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1754. SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
  1755. SK_STOP_ALL, SK_HARD_RST);
  1756. spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
  1757. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1758. }
  1759. if (pAC->RlmtNets == 1) {
  1760. /* clear all descriptor rings */
  1761. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1762. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  1763. ClearRxRing(pAC, &pAC->RxPort[i]);
  1764. ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
  1765. }
  1766. } else {
  1767. /* clear port descriptor rings */
  1768. ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
  1769. ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
  1770. ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
  1771. }
  1772. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1773. ("SkGeClose: done "));
  1774. pAC->MaxPorts--;
  1775. pNet->Up = 0;
  1776. MOD_DEC_USE_COUNT;
  1777. return (0);
  1778. } /* SkGeClose */
  1779. /*****************************************************************************
  1780. *
  1781. * SkGeXmit - Linux frame transmit function
  1782. *
  1783. * Description:
  1784. * The system calls this function to send frames onto the wire.
  1785. * It puts the frame in the tx descriptor ring. If the ring is
  1786. * full then, the 'tbusy' flag is set.
  1787. *
  1788. * Returns:
  1789. * 0, if everything is ok
  1790. * !=0, on error
  1791. * WARNING: returning 1 in 'tbusy' case caused system crashes (double
  1792. * allocated skb's) !!!
  1793. */
  1794. #if 0
  1795. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
  1796. #else
  1797. int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
  1798. #endif
  1799. {
  1800. DEV_NET *pNet;
  1801. SK_AC *pAC;
  1802. int Rc; /* return code of XmitFrame */
  1803. pNet = (DEV_NET*) dev->priv;
  1804. pAC = pNet->pAC;
  1805. #if 0
  1806. if ((!skb_shinfo(skb)->nr_frags) ||
  1807. #else
  1808. if (1 ||
  1809. #endif
  1810. (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
  1811. /* Don't activate scatter-gather and hardware checksum */
  1812. if (pAC->RlmtNets == 2)
  1813. Rc = XmitFrame(
  1814. pAC,
  1815. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1816. skb);
  1817. else
  1818. Rc = XmitFrame(
  1819. pAC,
  1820. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1821. skb);
  1822. } else {
  1823. #if 0
  1824. /* scatter-gather and hardware TCP checksumming anabled*/
  1825. if (pAC->RlmtNets == 2)
  1826. Rc = XmitFrameSG(
  1827. pAC,
  1828. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1829. skb);
  1830. else
  1831. Rc = XmitFrameSG(
  1832. pAC,
  1833. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1834. skb);
  1835. #endif
  1836. }
  1837. /* Transmitter out of resources? */
  1838. if (Rc <= 0) {
  1839. netif_stop_queue(dev);
  1840. }
  1841. /* If not taken, give buffer ownership back to the
  1842. * queueing layer.
  1843. */
  1844. if (Rc < 0)
  1845. return (1);
  1846. #if 0
  1847. dev->trans_start = jiffies;
  1848. #endif
  1849. return (0);
  1850. } /* SkGeXmit */
  1851. /*****************************************************************************
  1852. *
  1853. * XmitFrame - fill one socket buffer into the transmit ring
  1854. *
  1855. * Description:
  1856. * This function puts a message into the transmit descriptor ring
  1857. * if there is a descriptors left.
  1858. * Linux skb's consist of only one continuous buffer.
  1859. * The first step locks the ring. It is held locked
  1860. * all time to avoid problems with SWITCH_../PORT_RESET.
  1861. * Then the descriptoris allocated.
  1862. * The second part is linking the buffer to the descriptor.
  1863. * At the very last, the Control field of the descriptor
  1864. * is made valid for the BMU and a start TX command is given
  1865. * if necessary.
  1866. *
  1867. * Returns:
  1868. * > 0 - on succes: the number of bytes in the message
  1869. * = 0 - on resource shortage: this frame sent or dropped, now
  1870. * the ring is full ( -> set tbusy)
  1871. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1872. */
  1873. static int XmitFrame(
  1874. SK_AC *pAC, /* pointer to adapter context */
  1875. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1876. struct sk_buff *pMessage) /* pointer to send-message */
  1877. {
  1878. TXD *pTxd; /* the rxd to fill */
  1879. unsigned long Flags;
  1880. SK_U64 PhysAddr;
  1881. int BytesSend;
  1882. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1883. ("X"));
  1884. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1885. #ifndef USE_TX_COMPLETE
  1886. FreeTxDescriptors(pAC, pTxPort);
  1887. #endif
  1888. if (pTxPort->TxdRingFree == 0) {
  1889. /* no enough free descriptors in ring at the moment */
  1890. FreeTxDescriptors(pAC, pTxPort);
  1891. if (pTxPort->TxdRingFree == 0) {
  1892. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1893. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1894. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1895. SK_DBGCAT_DRV_TX_PROGRESS,
  1896. ("XmitFrame failed\n"));
  1897. /* this message can not be sent now */
  1898. /* Because tbusy seems to be set, the message should not be freed here */
  1899. /* It will be used by the scheduler of the ethernet handler */
  1900. return (-1);
  1901. }
  1902. }
  1903. /* advance head counter behind descriptor needed for this frame */
  1904. pTxd = pTxPort->pTxdRingHead;
  1905. pTxPort->pTxdRingHead = pTxd->pNextTxd;
  1906. pTxPort->TxdRingFree--;
  1907. /* the needed descriptor is reserved now */
  1908. /*
  1909. * everything allocated ok, so add buffer to descriptor
  1910. */
  1911. #ifdef SK_DUMP_TX
  1912. DumpMsg(pMessage, "XmitFrame");
  1913. #endif
  1914. /* set up descriptor and CONTROL dword */
  1915. #if 0
  1916. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1917. virt_to_page(pMessage->data),
  1918. ((unsigned long) pMessage->data &
  1919. ~PAGE_MASK),
  1920. pMessage->len,
  1921. PCI_DMA_TODEVICE);
  1922. #else
  1923. PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32) pMessage->data);
  1924. #endif
  1925. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1926. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1927. pTxd->pMBuf = pMessage;
  1928. pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
  1929. TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
  1930. #ifdef USE_TX_COMPLETE
  1931. TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
  1932. #else
  1933. TX_CTRL_EOF | pMessage->len;
  1934. #endif
  1935. if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
  1936. /* previous descriptor already done, so give tx start cmd */
  1937. /* StartTx(pAC, pTxPort->HwAddr); */
  1938. SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
  1939. }
  1940. pTxPort->pTxdRingPrev = pTxd;
  1941. BytesSend = pMessage->len;
  1942. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1943. /* after releasing the lock, the skb may be immidiately freed */
  1944. if (pTxPort->TxdRingFree != 0)
  1945. return (BytesSend);
  1946. else
  1947. return (0);
  1948. } /* XmitFrame */
  1949. /*****************************************************************************
  1950. *
  1951. * XmitFrameSG - fill one socket buffer into the transmit ring
  1952. * (use SG and TCP/UDP hardware checksumming)
  1953. *
  1954. * Description:
  1955. * This function puts a message into the transmit descriptor ring
  1956. * if there is a descriptors left.
  1957. *
  1958. * Returns:
  1959. * > 0 - on succes: the number of bytes in the message
  1960. * = 0 - on resource shortage: this frame sent or dropped, now
  1961. * the ring is full ( -> set tbusy)
  1962. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1963. */
  1964. #if 0
  1965. static int XmitFrameSG(
  1966. SK_AC *pAC, /* pointer to adapter context */
  1967. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1968. struct sk_buff *pMessage) /* pointer to send-message */
  1969. {
  1970. int i;
  1971. int BytesSend;
  1972. int hlength;
  1973. int protocol;
  1974. skb_frag_t *sk_frag;
  1975. TXD *pTxd;
  1976. TXD *pTxdFst;
  1977. TXD *pTxdLst;
  1978. SK_U64 PhysAddr;
  1979. unsigned long Flags;
  1980. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1981. #ifndef USE_TX_COMPLETE
  1982. FreeTxDescriptors(pAC, pTxPort);
  1983. #endif
  1984. if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
  1985. FreeTxDescriptors(pAC, pTxPort);
  1986. if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
  1987. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1988. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1989. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1990. SK_DBGCAT_DRV_TX_PROGRESS,
  1991. ("XmitFrameSG failed - Ring full\n"));
  1992. /* this message can not be sent now */
  1993. return(-1);
  1994. }
  1995. }
  1996. pTxd = pTxPort->pTxdRingHead;
  1997. pTxdFst = pTxd;
  1998. pTxdLst = pTxd;
  1999. BytesSend = 0;
  2000. protocol = 0;
  2001. /* map first fragment (header) */
  2002. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2003. virt_to_page(pMessage->data),
  2004. ((unsigned long) pMessage->data & ~PAGE_MASK),
  2005. skb_headlen(pMessage),
  2006. PCI_DMA_TODEVICE);
  2007. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2008. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2009. /* HW checksum? */
  2010. if (pMessage->ip_summed == CHECKSUM_HW) {
  2011. pTxd->TBControl = TX_CTRL_STF |
  2012. TX_CTRL_ST_FWD |
  2013. skb_headlen(pMessage);
  2014. /* We have to use the opcode for tcp here because the opcode for
  2015. udp is not working in the hardware yet (revision 2.0)*/
  2016. protocol = ((SK_U8)pMessage->data[23] & 0xf);
  2017. if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
  2018. pTxd->TBControl |= BMU_UDP_CHECK;
  2019. else
  2020. pTxd->TBControl |= BMU_TCP_CHECK ;
  2021. hlength = ((SK_U8)pMessage->data[14] & 0xf) * 4;
  2022. pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
  2023. pTxd->TcpSumSt = 14+hlength+16;
  2024. pTxd->TcpSumWr = 14+hlength;
  2025. } else {
  2026. pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
  2027. TX_CTRL_SOFTWARE |
  2028. TX_CTRL_STF |
  2029. skb_headlen(pMessage);
  2030. }
  2031. pTxd = pTxd->pNextTxd;
  2032. pTxPort->TxdRingFree--;
  2033. BytesSend += skb_headlen(pMessage);
  2034. /* Map SG fragments */
  2035. for (i = 0; i < skb_shinfo(pMessage)->nr_frags; i++) {
  2036. sk_frag = &skb_shinfo(pMessage)->frags[i];
  2037. /* we already have the proper value in entry */
  2038. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2039. sk_frag->page,
  2040. sk_frag->page_offset,
  2041. sk_frag->size,
  2042. PCI_DMA_TODEVICE);
  2043. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2044. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2045. pTxd->pMBuf = pMessage;
  2046. /* HW checksum */
  2047. if (pMessage->ip_summed == CHECKSUM_HW) {
  2048. pTxd->TBControl = TX_CTRL_OWN_BMU |
  2049. TX_CTRL_SOFTWARE |
  2050. TX_CTRL_ST_FWD;
  2051. /* We have to use the opcode for tcp here because the opcode for
  2052. udp is not working in the hardware yet (revision 2.0)*/
  2053. if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
  2054. pTxd->TBControl |= BMU_UDP_CHECK ;
  2055. else
  2056. pTxd->TBControl |= BMU_TCP_CHECK ;
  2057. } else {
  2058. pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
  2059. TX_CTRL_SOFTWARE |
  2060. TX_CTRL_OWN_BMU;
  2061. }
  2062. /* Last fragment */
  2063. if( (i+1) == skb_shinfo(pMessage)->nr_frags ) {
  2064. #ifdef USE_TX_COMPLETE
  2065. pTxd->TBControl |= TX_CTRL_EOF |
  2066. TX_CTRL_EOF_IRQ |
  2067. sk_frag->size;
  2068. #else
  2069. pTxd->TBControl |= TX_CTRL_EOF |
  2070. sk_frag->size;
  2071. #endif
  2072. pTxdFst->TBControl |= TX_CTRL_OWN_BMU |
  2073. TX_CTRL_SOFTWARE;
  2074. } else {
  2075. pTxd->TBControl |= sk_frag->size;
  2076. }
  2077. pTxdLst = pTxd;
  2078. pTxd = pTxd->pNextTxd;
  2079. pTxPort->TxdRingFree--;
  2080. BytesSend += sk_frag->size;
  2081. }
  2082. if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
  2083. /* previous descriptor already done, so give tx start cmd */
  2084. /* StartTx(pAC, pTxPort->HwAddr); */
  2085. SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
  2086. }
  2087. pTxPort->pTxdRingPrev = pTxdLst;
  2088. pTxPort->pTxdRingHead = pTxd;
  2089. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  2090. if (pTxPort->TxdRingFree > 0)
  2091. return (BytesSend);
  2092. else
  2093. return (0);
  2094. }
  2095. #endif
  2096. void dump_frag( SK_U8 *data, int length)
  2097. {
  2098. int i;
  2099. printk("Length: %d\n", length);
  2100. for( i=0; i < length; i++ ) {
  2101. printk(" %02x", (SK_U8)*(data + i) );
  2102. if( !((i+1) % 20) )
  2103. printk("\n");
  2104. }
  2105. printk("\n\n");
  2106. }
  2107. /*****************************************************************************
  2108. *
  2109. * FreeTxDescriptors - release descriptors from the descriptor ring
  2110. *
  2111. * Description:
  2112. * This function releases descriptors from a transmit ring if they
  2113. * have been sent by the BMU.
  2114. * If a descriptors is sent, it can be freed and the message can
  2115. * be freed, too.
  2116. * The SOFTWARE controllable bit is used to prevent running around a
  2117. * completely free ring for ever. If this bit is no set in the
  2118. * frame (by XmitFrame), this frame has never been sent or is
  2119. * already freed.
  2120. * The Tx descriptor ring lock must be held while calling this function !!!
  2121. *
  2122. * Returns:
  2123. * none
  2124. */
  2125. static void FreeTxDescriptors(
  2126. SK_AC *pAC, /* pointer to the adapter context */
  2127. TX_PORT *pTxPort) /* pointer to destination port structure */
  2128. {
  2129. TXD *pTxd; /* pointer to the checked descriptor */
  2130. TXD *pNewTail; /* pointer to 'end' of the ring */
  2131. SK_U32 Control; /* TBControl field of descriptor */
  2132. SK_U64 PhysAddr; /* address of DMA mapping */
  2133. pNewTail = pTxPort->pTxdRingTail;
  2134. pTxd = pNewTail;
  2135. /*
  2136. * loop forever; exits if TX_CTRL_SOFTWARE bit not set in start frame
  2137. * or TX_CTRL_OWN_BMU bit set in any frame
  2138. */
  2139. while (1) {
  2140. Control = pTxd->TBControl;
  2141. if ((Control & TX_CTRL_SOFTWARE) == 0) {
  2142. /*
  2143. * software controllable bit is set in first
  2144. * fragment when given to BMU. Not set means that
  2145. * this fragment was never sent or is already
  2146. * freed ( -> ring completely free now).
  2147. */
  2148. pTxPort->pTxdRingTail = pTxd;
  2149. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  2150. return;
  2151. }
  2152. if (Control & TX_CTRL_OWN_BMU) {
  2153. pTxPort->pTxdRingTail = pTxd;
  2154. if (pTxPort->TxdRingFree > 0) {
  2155. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  2156. }
  2157. return;
  2158. }
  2159. /* release the DMA mapping */
  2160. PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
  2161. PhysAddr |= (SK_U64) pTxd->VDataLow;
  2162. pci_unmap_page(pAC->PciDev, PhysAddr,
  2163. pTxd->pMBuf->len,
  2164. PCI_DMA_TODEVICE);
  2165. if (Control & TX_CTRL_EOF)
  2166. DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
  2167. pTxPort->TxdRingFree++;
  2168. pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
  2169. pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
  2170. } /* while(forever) */
  2171. } /* FreeTxDescriptors */
  2172. /*****************************************************************************
  2173. *
  2174. * FillRxRing - fill the receive ring with valid descriptors
  2175. *
  2176. * Description:
  2177. * This function fills the receive ring descriptors with data
  2178. * segments and makes them valid for the BMU.
  2179. * The active ring is filled completely, if possible.
  2180. * The non-active ring is filled only partial to save memory.
  2181. *
  2182. * Description of rx ring structure:
  2183. * head - points to the descriptor which will be used next by the BMU
  2184. * tail - points to the next descriptor to give to the BMU
  2185. *
  2186. * Returns: N/A
  2187. */
  2188. static void FillRxRing(
  2189. SK_AC *pAC, /* pointer to the adapter context */
  2190. RX_PORT *pRxPort) /* ptr to port struct for which the ring
  2191. should be filled */
  2192. {
  2193. unsigned long Flags;
  2194. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  2195. while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
  2196. if(!FillRxDescriptor(pAC, pRxPort))
  2197. break;
  2198. }
  2199. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  2200. } /* FillRxRing */
  2201. /*****************************************************************************
  2202. *
  2203. * FillRxDescriptor - fill one buffer into the receive ring
  2204. *
  2205. * Description:
  2206. * The function allocates a new receive buffer and
  2207. * puts it into the next descriptor.
  2208. *
  2209. * Returns:
  2210. * SK_TRUE - a buffer was added to the ring
  2211. * SK_FALSE - a buffer could not be added
  2212. */
  2213. static SK_BOOL FillRxDescriptor(
  2214. SK_AC *pAC, /* pointer to the adapter context struct */
  2215. RX_PORT *pRxPort) /* ptr to port struct of ring to fill */
  2216. {
  2217. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  2218. RXD *pRxd; /* the rxd to fill */
  2219. SK_U16 Length; /* data fragment length */
  2220. SK_U64 PhysAddr; /* physical address of a rx buffer */
  2221. pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
  2222. if (pMsgBlock == NULL) {
  2223. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2224. SK_DBGCAT_DRV_ENTRY,
  2225. ("%s: Allocation of rx buffer failed !\n",
  2226. pAC->dev[pRxPort->PortIndex]->name));
  2227. SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
  2228. return(SK_FALSE);
  2229. }
  2230. skb_reserve(pMsgBlock, 2); /* to align IP frames */
  2231. /* skb allocated ok, so add buffer */
  2232. pRxd = pRxPort->pRxdRingTail;
  2233. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  2234. pRxPort->RxdRingFree--;
  2235. Length = pAC->RxBufSize;
  2236. #if 0
  2237. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2238. virt_to_page(pMsgBlock->data),
  2239. ((unsigned long) pMsgBlock->data &
  2240. ~PAGE_MASK),
  2241. pAC->RxBufSize - 2,
  2242. PCI_DMA_FROMDEVICE);
  2243. #else
  2244. PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32)pMsgBlock->data);
  2245. #endif
  2246. pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2247. pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2248. pRxd->pMBuf = pMsgBlock;
  2249. pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
  2250. RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
  2251. return (SK_TRUE);
  2252. } /* FillRxDescriptor */
  2253. /*****************************************************************************
  2254. *
  2255. * ReQueueRxBuffer - fill one buffer back into the receive ring
  2256. *
  2257. * Description:
  2258. * Fill a given buffer back into the rx ring. The buffer
  2259. * has been previously allocated and aligned, and its phys.
  2260. * address calculated, so this is no more necessary.
  2261. *
  2262. * Returns: N/A
  2263. */
  2264. static void ReQueueRxBuffer(
  2265. SK_AC *pAC, /* pointer to the adapter context struct */
  2266. RX_PORT *pRxPort, /* ptr to port struct of ring to fill */
  2267. struct sk_buff *pMsg, /* pointer to the buffer */
  2268. SK_U32 PhysHigh, /* phys address high dword */
  2269. SK_U32 PhysLow) /* phys address low dword */
  2270. {
  2271. RXD *pRxd; /* the rxd to fill */
  2272. SK_U16 Length; /* data fragment length */
  2273. pRxd = pRxPort->pRxdRingTail;
  2274. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  2275. pRxPort->RxdRingFree--;
  2276. Length = pAC->RxBufSize;
  2277. pRxd->VDataLow = PhysLow;
  2278. pRxd->VDataHigh = PhysHigh;
  2279. pRxd->pMBuf = pMsg;
  2280. pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
  2281. RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
  2282. return;
  2283. } /* ReQueueRxBuffer */
  2284. /*****************************************************************************
  2285. *
  2286. * ReceiveIrq - handle a receive IRQ
  2287. *
  2288. * Description:
  2289. * This function is called when a receive IRQ is set.
  2290. * It walks the receive descriptor ring and sends up all
  2291. * frames that are complete.
  2292. *
  2293. * Returns: N/A
  2294. */
  2295. #if 0
  2296. static void ReceiveIrq(
  2297. #else
  2298. void ReceiveIrq(
  2299. #endif
  2300. SK_AC *pAC, /* pointer to adapter context */
  2301. RX_PORT *pRxPort, /* pointer to receive port struct */
  2302. SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
  2303. {
  2304. RXD *pRxd; /* pointer to receive descriptors */
  2305. SK_U32 Control; /* control field of descriptor */
  2306. struct sk_buff *pMsg; /* pointer to message holding frame */
  2307. struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
  2308. int FrameLength; /* total length of received frame */
  2309. SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
  2310. SK_EVPARA EvPara; /* an event parameter union */
  2311. unsigned long Flags; /* for spin lock */
  2312. int PortIndex = pRxPort->PortIndex;
  2313. unsigned int Offset;
  2314. unsigned int NumBytes;
  2315. unsigned int ForRlmt;
  2316. SK_BOOL IsBc;
  2317. SK_BOOL IsMc;
  2318. SK_BOOL IsBadFrame; /* Bad frame */
  2319. SK_U32 FrameStat;
  2320. unsigned short Csum1;
  2321. unsigned short Csum2;
  2322. unsigned short Type;
  2323. #if 0
  2324. int Result;
  2325. #endif
  2326. SK_U64 PhysAddr;
  2327. rx_start:
  2328. /* do forever; exit if RX_CTRL_OWN_BMU found */
  2329. for ( pRxd = pRxPort->pRxdRingHead ;
  2330. pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
  2331. pRxd = pRxd->pNextRxd,
  2332. pRxPort->pRxdRingHead = pRxd,
  2333. pRxPort->RxdRingFree ++) {
  2334. /*
  2335. * For a better understanding of this loop
  2336. * Go through every descriptor beginning at the head
  2337. * Please note: the ring might be completely received so the OWN bit
  2338. * set is not a good crirteria to leave that loop.
  2339. * Therefore the RingFree counter is used.
  2340. * On entry of this loop pRxd is a pointer to the Rxd that needs
  2341. * to be checked next.
  2342. */
  2343. Control = pRxd->RBControl;
  2344. /* check if this descriptor is ready */
  2345. if ((Control & RX_CTRL_OWN_BMU) != 0) {
  2346. /* this descriptor is not yet ready */
  2347. /* This is the usual end of the loop */
  2348. /* We don't need to start the ring again */
  2349. FillRxRing(pAC, pRxPort);
  2350. return;
  2351. }
  2352. /* get length of frame and check it */
  2353. FrameLength = Control & RX_CTRL_LEN_MASK;
  2354. if (FrameLength > pAC->RxBufSize) {
  2355. goto rx_failed;
  2356. }
  2357. /* check for STF and EOF */
  2358. if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
  2359. (RX_CTRL_STF | RX_CTRL_EOF)) {
  2360. goto rx_failed;
  2361. }
  2362. /* here we have a complete frame in the ring */
  2363. pMsg = pRxd->pMBuf;
  2364. FrameStat = pRxd->FrameStat;
  2365. /* check for frame length mismatch */
  2366. #define XMR_FS_LEN_SHIFT 18
  2367. #define GMR_FS_LEN_SHIFT 16
  2368. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  2369. if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
  2370. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2371. SK_DBGCAT_DRV_RX_PROGRESS,
  2372. ("skge: Frame length mismatch (%u/%u).\n",
  2373. FrameLength,
  2374. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  2375. goto rx_failed;
  2376. }
  2377. }
  2378. else {
  2379. if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
  2380. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2381. SK_DBGCAT_DRV_RX_PROGRESS,
  2382. ("skge: Frame length mismatch (%u/%u).\n",
  2383. FrameLength,
  2384. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  2385. goto rx_failed;
  2386. }
  2387. }
  2388. /* Set Rx Status */
  2389. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  2390. IsBc = (FrameStat & XMR_FS_BC) != 0;
  2391. IsMc = (FrameStat & XMR_FS_MC) != 0;
  2392. IsBadFrame = (FrameStat &
  2393. (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
  2394. } else {
  2395. IsBc = (FrameStat & GMR_FS_BC) != 0;
  2396. IsMc = (FrameStat & GMR_FS_MC) != 0;
  2397. IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
  2398. ((FrameStat & GMR_FS_RX_OK) == 0));
  2399. }
  2400. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  2401. ("Received frame of length %d on port %d\n",
  2402. FrameLength, PortIndex));
  2403. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  2404. ("Number of free rx descriptors: %d\n",
  2405. pRxPort->RxdRingFree));
  2406. /* DumpMsg(pMsg, "Rx"); */
  2407. if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
  2408. (IsBadFrame)) {
  2409. #if 0
  2410. (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
  2411. #endif
  2412. /* there is a receive error in this frame */
  2413. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2414. SK_DBGCAT_DRV_RX_PROGRESS,
  2415. ("skge: Error in received frame, dropped!\n"
  2416. "Control: %x\nRxStat: %x\n",
  2417. Control, FrameStat));
  2418. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2419. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2420. pci_dma_sync_single(pAC->PciDev,
  2421. (dma_addr_t) PhysAddr,
  2422. FrameLength,
  2423. PCI_DMA_FROMDEVICE);
  2424. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  2425. pRxd->VDataHigh, pRxd->VDataLow);
  2426. continue;
  2427. }
  2428. /*
  2429. * if short frame then copy data to reduce memory waste
  2430. */
  2431. if ((FrameLength < SK_COPY_THRESHOLD) &&
  2432. ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
  2433. /*
  2434. * Short frame detected and allocation successfull
  2435. */
  2436. /* use new skb and copy data */
  2437. skb_reserve(pNewMsg, 2);
  2438. skb_put(pNewMsg, FrameLength);
  2439. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2440. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2441. pci_dma_sync_single(pAC->PciDev,
  2442. (dma_addr_t) PhysAddr,
  2443. FrameLength,
  2444. PCI_DMA_FROMDEVICE);
  2445. eth_copy_and_sum(pNewMsg, pMsg->data,
  2446. FrameLength, 0);
  2447. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  2448. pRxd->VDataHigh, pRxd->VDataLow);
  2449. pMsg = pNewMsg;
  2450. }
  2451. else {
  2452. /*
  2453. * if large frame, or SKB allocation failed, pass
  2454. * the SKB directly to the networking
  2455. */
  2456. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2457. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2458. /* release the DMA mapping */
  2459. pci_unmap_single(pAC->PciDev,
  2460. PhysAddr,
  2461. pAC->RxBufSize - 2,
  2462. PCI_DMA_FROMDEVICE);
  2463. /* set length in message */
  2464. skb_put(pMsg, FrameLength);
  2465. /* hardware checksum */
  2466. Type = ntohs(*((short*)&pMsg->data[12]));
  2467. if (Type == 0x800) {
  2468. Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
  2469. Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
  2470. #if 0
  2471. if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
  2472. (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
  2473. (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
  2474. Result = SkCsGetReceiveInfo(pAC,
  2475. &pMsg->data[14],
  2476. Csum1, Csum2, pRxPort->PortIndex);
  2477. if (Result ==
  2478. SKCS_STATUS_IP_FRAGMENT ||
  2479. Result ==
  2480. SKCS_STATUS_IP_CSUM_OK ||
  2481. Result ==
  2482. SKCS_STATUS_TCP_CSUM_OK ||
  2483. Result ==
  2484. SKCS_STATUS_UDP_CSUM_OK) {
  2485. pMsg->ip_summed =
  2486. CHECKSUM_UNNECESSARY;
  2487. } else {
  2488. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2489. SK_DBGCAT_DRV_RX_PROGRESS,
  2490. ("skge: CRC error. Frame dropped!\n"));
  2491. goto rx_failed;
  2492. }
  2493. }/* checksumControl calculation valid */
  2494. #endif
  2495. } /* IP frame */
  2496. } /* frame > SK_COPY_TRESHOLD */
  2497. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
  2498. ForRlmt = SK_RLMT_RX_PROTOCOL;
  2499. #if 0
  2500. IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
  2501. #endif
  2502. SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
  2503. IsBc, &Offset, &NumBytes);
  2504. if (NumBytes != 0) {
  2505. #if 0
  2506. IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
  2507. #endif
  2508. SK_RLMT_LOOKAHEAD(pAC, PortIndex,
  2509. &pMsg->data[Offset],
  2510. IsBc, IsMc, &ForRlmt);
  2511. }
  2512. if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
  2513. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
  2514. /* send up only frames from active port */
  2515. if ((PortIndex == pAC->ActivePort) ||
  2516. (pAC->RlmtNets == 2)) {
  2517. /* frame for upper layer */
  2518. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
  2519. #ifdef xDEBUG
  2520. DumpMsg(pMsg, "Rx");
  2521. #endif
  2522. SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
  2523. FrameLength, pRxPort->PortIndex);
  2524. #if 0
  2525. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  2526. pMsg->protocol = eth_type_trans(pMsg,
  2527. pAC->dev[pRxPort->PortIndex]);
  2528. netif_rx(pMsg);
  2529. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  2530. #else
  2531. NetReceive(pMsg->data, pMsg->len);
  2532. dev_kfree_skb_any(pMsg);
  2533. #endif
  2534. }
  2535. else {
  2536. /* drop frame */
  2537. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2538. SK_DBGCAT_DRV_RX_PROGRESS,
  2539. ("D"));
  2540. DEV_KFREE_SKB(pMsg);
  2541. }
  2542. } /* if not for rlmt */
  2543. else {
  2544. /* packet for rlmt */
  2545. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2546. SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
  2547. pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
  2548. pAC->IoBase, FrameLength);
  2549. if (pRlmtMbuf != NULL) {
  2550. pRlmtMbuf->pNext = NULL;
  2551. pRlmtMbuf->Length = FrameLength;
  2552. pRlmtMbuf->PortIdx = PortIndex;
  2553. EvPara.pParaPtr = pRlmtMbuf;
  2554. memcpy((char*)(pRlmtMbuf->pData),
  2555. (char*)(pMsg->data),
  2556. FrameLength);
  2557. /* SlowPathLock needed? */
  2558. if (SlowPathLock == SK_TRUE) {
  2559. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2560. SkEventQueue(pAC, SKGE_RLMT,
  2561. SK_RLMT_PACKET_RECEIVED,
  2562. EvPara);
  2563. pAC->CheckQueue = SK_TRUE;
  2564. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2565. } else {
  2566. SkEventQueue(pAC, SKGE_RLMT,
  2567. SK_RLMT_PACKET_RECEIVED,
  2568. EvPara);
  2569. pAC->CheckQueue = SK_TRUE;
  2570. }
  2571. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2572. SK_DBGCAT_DRV_RX_PROGRESS,
  2573. ("Q"));
  2574. }
  2575. #if 0
  2576. if ((pAC->dev[pRxPort->PortIndex]->flags &
  2577. (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
  2578. (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
  2579. SK_RLMT_RX_PROTOCOL) {
  2580. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  2581. pMsg->protocol = eth_type_trans(pMsg,
  2582. pAC->dev[pRxPort->PortIndex]);
  2583. netif_rx(pMsg);
  2584. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  2585. }
  2586. #else
  2587. if (0) {
  2588. }
  2589. #endif
  2590. else {
  2591. DEV_KFREE_SKB(pMsg);
  2592. }
  2593. } /* if packet for rlmt */
  2594. } /* for ... scanning the RXD ring */
  2595. /* RXD ring is empty -> fill and restart */
  2596. FillRxRing(pAC, pRxPort);
  2597. /* do not start if called from Close */
  2598. if (pAC->BoardLevel > 0) {
  2599. ClearAndStartRx(pAC, PortIndex);
  2600. }
  2601. return;
  2602. rx_failed:
  2603. /* remove error frame */
  2604. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
  2605. ("Schrottdescriptor, length: 0x%x\n", FrameLength));
  2606. /* release the DMA mapping */
  2607. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2608. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2609. pci_unmap_page(pAC->PciDev,
  2610. PhysAddr,
  2611. pAC->RxBufSize - 2,
  2612. PCI_DMA_FROMDEVICE);
  2613. DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
  2614. pRxd->pMBuf = NULL;
  2615. pRxPort->RxdRingFree++;
  2616. pRxPort->pRxdRingHead = pRxd->pNextRxd;
  2617. goto rx_start;
  2618. } /* ReceiveIrq */
  2619. /*****************************************************************************
  2620. *
  2621. * ClearAndStartRx - give a start receive command to BMU, clear IRQ
  2622. *
  2623. * Description:
  2624. * This function sends a start command and a clear interrupt
  2625. * command for one receive queue to the BMU.
  2626. *
  2627. * Returns: N/A
  2628. * none
  2629. */
  2630. static void ClearAndStartRx(
  2631. SK_AC *pAC, /* pointer to the adapter context */
  2632. int PortIndex) /* index of the receive port (XMAC) */
  2633. {
  2634. SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
  2635. RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
  2636. } /* ClearAndStartRx */
  2637. /*****************************************************************************
  2638. *
  2639. * ClearTxIrq - give a clear transmit IRQ command to BMU
  2640. *
  2641. * Description:
  2642. * This function sends a clear tx IRQ command for one
  2643. * transmit queue to the BMU.
  2644. *
  2645. * Returns: N/A
  2646. */
  2647. static void ClearTxIrq(
  2648. SK_AC *pAC, /* pointer to the adapter context */
  2649. int PortIndex, /* index of the transmit port (XMAC) */
  2650. int Prio) /* priority or normal queue */
  2651. {
  2652. SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
  2653. TX_Q_CTRL_CLR_I_EOF);
  2654. } /* ClearTxIrq */
  2655. /*****************************************************************************
  2656. *
  2657. * ClearRxRing - remove all buffers from the receive ring
  2658. *
  2659. * Description:
  2660. * This function removes all receive buffers from the ring.
  2661. * The receive BMU must be stopped before calling this function.
  2662. *
  2663. * Returns: N/A
  2664. */
  2665. static void ClearRxRing(
  2666. SK_AC *pAC, /* pointer to adapter context */
  2667. RX_PORT *pRxPort) /* pointer to rx port struct */
  2668. {
  2669. RXD *pRxd; /* pointer to the current descriptor */
  2670. unsigned long Flags;
  2671. SK_U64 PhysAddr;
  2672. if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
  2673. return;
  2674. }
  2675. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  2676. pRxd = pRxPort->pRxdRingHead;
  2677. do {
  2678. if (pRxd->pMBuf != NULL) {
  2679. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2680. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2681. pci_unmap_page(pAC->PciDev,
  2682. PhysAddr,
  2683. pAC->RxBufSize - 2,
  2684. PCI_DMA_FROMDEVICE);
  2685. DEV_KFREE_SKB(pRxd->pMBuf);
  2686. pRxd->pMBuf = NULL;
  2687. }
  2688. pRxd->RBControl &= RX_CTRL_OWN_BMU;
  2689. pRxd = pRxd->pNextRxd;
  2690. pRxPort->RxdRingFree++;
  2691. } while (pRxd != pRxPort->pRxdRingTail);
  2692. pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
  2693. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  2694. } /* ClearRxRing */
  2695. /*****************************************************************************
  2696. *
  2697. * ClearTxRing - remove all buffers from the transmit ring
  2698. *
  2699. * Description:
  2700. * This function removes all transmit buffers from the ring.
  2701. * The transmit BMU must be stopped before calling this function
  2702. * and transmitting at the upper level must be disabled.
  2703. * The BMU own bit of all descriptors is cleared, the rest is
  2704. * done by calling FreeTxDescriptors.
  2705. *
  2706. * Returns: N/A
  2707. */
  2708. static void ClearTxRing(
  2709. SK_AC *pAC, /* pointer to adapter context */
  2710. TX_PORT *pTxPort) /* pointer to tx prt struct */
  2711. {
  2712. TXD *pTxd; /* pointer to the current descriptor */
  2713. int i;
  2714. unsigned long Flags;
  2715. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  2716. pTxd = pTxPort->pTxdRingHead;
  2717. for (i=0; i<pAC->TxDescrPerRing; i++) {
  2718. pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
  2719. pTxd = pTxd->pNextTxd;
  2720. }
  2721. FreeTxDescriptors(pAC, pTxPort);
  2722. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  2723. } /* ClearTxRing */
  2724. #if 0
  2725. /*****************************************************************************
  2726. *
  2727. * SetQueueSizes - configure the sizes of rx and tx queues
  2728. *
  2729. * Description:
  2730. * This function assigns the sizes for active and passive port
  2731. * to the appropriate HWinit structure variables.
  2732. * The passive port(s) get standard values, all remaining RAM
  2733. * is given to the active port.
  2734. * The queue sizes are in kbyte and must be multiple of 8.
  2735. * The limits for the number of buffers filled into the rx rings
  2736. * is also set in this routine.
  2737. *
  2738. * Returns:
  2739. * none
  2740. */
  2741. static void SetQueueSizes(
  2742. SK_AC *pAC) /* pointer to the adapter context */
  2743. {
  2744. int StandbyRam; /* adapter RAM used for a standby port */
  2745. int RemainingRam; /* adapter RAM available for the active port */
  2746. int RxRam; /* RAM used for the active port receive queue */
  2747. int i; /* loop counter */
  2748. if (pAC->RlmtNets == 1) {
  2749. StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
  2750. SK_RLMT_STANDBY_QXSSIZE;
  2751. RemainingRam = pAC->GIni.GIRamSize -
  2752. (pAC->GIni.GIMacsFound-1) * StandbyRam;
  2753. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2754. pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
  2755. pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
  2756. pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
  2757. }
  2758. RxRam = (RemainingRam * 8 / 10) & ~7;
  2759. pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
  2760. pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
  2761. pAC->GIni.GP[pAC->ActivePort].PXAQSize =
  2762. (RemainingRam - RxRam) & ~7;
  2763. pAC->RxQueueSize = RxRam;
  2764. pAC->TxSQueueSize = 0;
  2765. pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
  2766. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2767. ("queue sizes settings - rx:%d txA:%d txS:%d\n",
  2768. pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
  2769. } else {
  2770. RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
  2771. RxRam = (RemainingRam * 8 / 10) & ~7;
  2772. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2773. pAC->GIni.GP[i].PRxQSize = RxRam;
  2774. pAC->GIni.GP[i].PXSQSize = 0;
  2775. pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
  2776. }
  2777. pAC->RxQueueSize = RxRam;
  2778. pAC->TxSQueueSize = 0;
  2779. pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
  2780. }
  2781. for (i=0; i<SK_MAX_MACS; i++) {
  2782. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
  2783. }
  2784. if (pAC->RlmtNets == 2) {
  2785. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2786. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
  2787. }
  2788. } else {
  2789. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2790. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
  2791. }
  2792. /*
  2793. * Do not set the Limit to 0, because this could cause
  2794. * wrap around with ReQueue'ed buffers (a buffer could
  2795. * be requeued in the same position, made accessable to
  2796. * the hardware, and the hardware could change its
  2797. * contents!
  2798. */
  2799. pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
  2800. }
  2801. #ifdef DEBUG
  2802. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2803. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  2804. ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
  2805. i,
  2806. pAC->GIni.GP[i].PRxQSize,
  2807. pAC->GIni.GP[i].PXSQSize,
  2808. pAC->GIni.GP[i].PXAQSize));
  2809. }
  2810. #endif
  2811. } /* SetQueueSizes */
  2812. /*****************************************************************************
  2813. *
  2814. * SkGeSetMacAddr - Set the hardware MAC address
  2815. *
  2816. * Description:
  2817. * This function sets the MAC address used by the adapter.
  2818. *
  2819. * Returns:
  2820. * 0, if everything is ok
  2821. * !=0, on error
  2822. */
  2823. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
  2824. {
  2825. DEV_NET *pNet = (DEV_NET*) dev->priv;
  2826. SK_AC *pAC = pNet->pAC;
  2827. struct sockaddr *addr = p;
  2828. unsigned long Flags;
  2829. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2830. ("SkGeSetMacAddr starts now...\n"));
  2831. if(netif_running(dev))
  2832. return -EBUSY;
  2833. memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
  2834. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2835. if (pAC->RlmtNets == 2)
  2836. SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
  2837. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2838. else
  2839. SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
  2840. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2841. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2842. return 0;
  2843. } /* SkGeSetMacAddr */
  2844. #endif
  2845. /*****************************************************************************
  2846. *
  2847. * SkGeSetRxMode - set receive mode
  2848. *
  2849. * Description:
  2850. * This function sets the receive mode of an adapter. The adapter
  2851. * supports promiscuous mode, allmulticast mode and a number of
  2852. * multicast addresses. If more multicast addresses the available
  2853. * are selected, a hash function in the hardware is used.
  2854. *
  2855. * Returns:
  2856. * 0, if everything is ok
  2857. * !=0, on error
  2858. */
  2859. #if 0
  2860. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
  2861. {
  2862. DEV_NET *pNet;
  2863. SK_AC *pAC;
  2864. struct dev_mc_list *pMcList;
  2865. int i;
  2866. int PortIdx;
  2867. unsigned long Flags;
  2868. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2869. ("SkGeSetRxMode starts now... "));
  2870. pNet = (DEV_NET*) dev->priv;
  2871. pAC = pNet->pAC;
  2872. if (pAC->RlmtNets == 1)
  2873. PortIdx = pAC->ActivePort;
  2874. else
  2875. PortIdx = pNet->NetNr;
  2876. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2877. if (dev->flags & IFF_PROMISC) {
  2878. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2879. ("PROMISCUOUS mode\n"));
  2880. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2881. SK_PROM_MODE_LLC);
  2882. } else if (dev->flags & IFF_ALLMULTI) {
  2883. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2884. ("ALLMULTI mode\n"));
  2885. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2886. SK_PROM_MODE_ALL_MC);
  2887. } else {
  2888. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2889. SK_PROM_MODE_NONE);
  2890. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  2891. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2892. ("Number of MC entries: %d ", dev->mc_count));
  2893. pMcList = dev->mc_list;
  2894. for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
  2895. SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
  2896. (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
  2897. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
  2898. ("%02x:%02x:%02x:%02x:%02x:%02x\n",
  2899. pMcList->dmi_addr[0],
  2900. pMcList->dmi_addr[1],
  2901. pMcList->dmi_addr[2],
  2902. pMcList->dmi_addr[3],
  2903. pMcList->dmi_addr[4],
  2904. pMcList->dmi_addr[5]));
  2905. }
  2906. SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
  2907. }
  2908. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2909. return;
  2910. } /* SkGeSetRxMode */
  2911. /*****************************************************************************
  2912. *
  2913. * SkGeChangeMtu - set the MTU to another value
  2914. *
  2915. * Description:
  2916. * This function sets is called whenever the MTU size is changed
  2917. * (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
  2918. * ethernet MTU size, long frame support is activated.
  2919. *
  2920. * Returns:
  2921. * 0, if everything is ok
  2922. * !=0, on error
  2923. */
  2924. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
  2925. {
  2926. DEV_NET *pNet;
  2927. DEV_NET *pOtherNet;
  2928. SK_AC *pAC;
  2929. unsigned long Flags;
  2930. int i;
  2931. SK_EVPARA EvPara;
  2932. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2933. ("SkGeChangeMtu starts now...\n"));
  2934. pNet = (DEV_NET*) dev->priv;
  2935. pAC = pNet->pAC;
  2936. if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
  2937. return -EINVAL;
  2938. }
  2939. if(pAC->BoardLevel != 2) {
  2940. return -EINVAL;
  2941. }
  2942. pNet->Mtu = NewMtu;
  2943. pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
  2944. if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
  2945. return(0);
  2946. }
  2947. EvPara.Para32[0] = pNet->NetNr;
  2948. EvPara.Para32[1] = -1;
  2949. pAC->RxBufSize = NewMtu + 32;
  2950. dev->mtu = NewMtu;
  2951. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2952. ("New MTU: %d\n", NewMtu));
  2953. /* prevent reconfiguration while changing the MTU */
  2954. /* disable interrupts */
  2955. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  2956. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2957. /* Found more than one port */
  2958. if ((pAC->GIni.GIMacsFound == 2 ) &&
  2959. (pAC->RlmtNets == 2)) {
  2960. /* Stop both ports */
  2961. EvPara.Para32[0] = 0;
  2962. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2963. EvPara.Para32[0] = 1;
  2964. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2965. } else {
  2966. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2967. }
  2968. SkEventDispatcher(pAC, pAC->IoBase);
  2969. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2970. spin_lock_irqsave(
  2971. &pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
  2972. netif_stop_queue(pAC->dev[i]);
  2973. }
  2974. /*
  2975. * adjust number of rx buffers allocated
  2976. */
  2977. if (NewMtu > 1500) {
  2978. /* use less rx buffers */
  2979. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2980. /* Found more than one port */
  2981. if ((pAC->GIni.GIMacsFound == 2 ) &&
  2982. (pAC->RlmtNets == 2)) {
  2983. pAC->RxPort[i].RxFillLimit =
  2984. pAC->RxDescrPerRing - 100;
  2985. } else {
  2986. if (i == pAC->ActivePort)
  2987. pAC->RxPort[i].RxFillLimit =
  2988. pAC->RxDescrPerRing - 100;
  2989. else
  2990. pAC->RxPort[i].RxFillLimit =
  2991. pAC->RxDescrPerRing - 10;
  2992. }
  2993. }
  2994. }
  2995. else {
  2996. /* use normal amount of rx buffers */
  2997. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2998. /* Found more than one port */
  2999. if ((pAC->GIni.GIMacsFound == 2 ) &&
  3000. (pAC->RlmtNets == 2)) {
  3001. pAC->RxPort[i].RxFillLimit = 1;
  3002. } else {
  3003. if (i == pAC->ActivePort)
  3004. pAC->RxPort[i].RxFillLimit = 1;
  3005. else
  3006. pAC->RxPort[i].RxFillLimit =
  3007. pAC->RxDescrPerRing - 100;
  3008. }
  3009. }
  3010. }
  3011. SkGeDeInit(pAC, pAC->IoBase);
  3012. /*
  3013. * enable/disable hardware support for long frames
  3014. */
  3015. if (NewMtu > 1500) {
  3016. /* pAC->JumboActivated = SK_TRUE; /#* is never set back !!! */
  3017. pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
  3018. }
  3019. else {
  3020. if ((pAC->GIni.GIMacsFound == 2 ) &&
  3021. (pAC->RlmtNets == 2)) {
  3022. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  3023. } else {
  3024. pAC->GIni.GIPortUsage = SK_RED_LINK;
  3025. }
  3026. }
  3027. SkGeInit( pAC, pAC->IoBase, 1);
  3028. SkI2cInit( pAC, pAC->IoBase, 1);
  3029. SkEventInit(pAC, pAC->IoBase, 1);
  3030. SkPnmiInit( pAC, pAC->IoBase, 1);
  3031. SkAddrInit( pAC, pAC->IoBase, 1);
  3032. SkRlmtInit( pAC, pAC->IoBase, 1);
  3033. SkTimerInit(pAC, pAC->IoBase, 1);
  3034. /*
  3035. * tschilling:
  3036. * Speed and others are set back to default in level 1 init!
  3037. */
  3038. GetConfiguration(pAC);
  3039. SkGeInit( pAC, pAC->IoBase, 2);
  3040. SkI2cInit( pAC, pAC->IoBase, 2);
  3041. SkEventInit(pAC, pAC->IoBase, 2);
  3042. SkPnmiInit( pAC, pAC->IoBase, 2);
  3043. SkAddrInit( pAC, pAC->IoBase, 2);
  3044. SkRlmtInit( pAC, pAC->IoBase, 2);
  3045. SkTimerInit(pAC, pAC->IoBase, 2);
  3046. /*
  3047. * clear and reinit the rx rings here
  3048. */
  3049. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  3050. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  3051. ClearRxRing(pAC, &pAC->RxPort[i]);
  3052. FillRxRing(pAC, &pAC->RxPort[i]);
  3053. /* Enable transmit descriptor polling. */
  3054. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  3055. FillRxRing(pAC, &pAC->RxPort[i]);
  3056. };
  3057. SkGeYellowLED(pAC, pAC->IoBase, 1);
  3058. #ifdef USE_INT_MOD
  3059. {
  3060. unsigned long ModBase;
  3061. ModBase = 53125000 / INTS_PER_SEC;
  3062. SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
  3063. SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
  3064. SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
  3065. }
  3066. #endif
  3067. netif_start_queue(pAC->dev[pNet->PortNr]);
  3068. for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
  3069. spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
  3070. }
  3071. /* enable Interrupts */
  3072. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  3073. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  3074. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3075. SkEventDispatcher(pAC, pAC->IoBase);
  3076. /* Found more than one port */
  3077. if ((pAC->GIni.GIMacsFound == 2 ) &&
  3078. (pAC->RlmtNets == 2)) {
  3079. /* Start both ports */
  3080. EvPara.Para32[0] = pAC->RlmtNets;
  3081. EvPara.Para32[1] = -1;
  3082. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
  3083. EvPara);
  3084. EvPara.Para32[1] = -1;
  3085. EvPara.Para32[0] = pNet->PortNr;
  3086. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3087. if (pOtherNet->Up) {
  3088. EvPara.Para32[0] = pOtherNet->PortNr;
  3089. SkEventQueue(pAC, SKGE_RLMT,
  3090. SK_RLMT_START, EvPara);
  3091. }
  3092. } else {
  3093. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3094. }
  3095. SkEventDispatcher(pAC, pAC->IoBase);
  3096. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3097. return 0;
  3098. } /* SkGeChangeMtu */
  3099. /*****************************************************************************
  3100. *
  3101. * SkGeStats - return ethernet device statistics
  3102. *
  3103. * Description:
  3104. * This function return statistic data about the ethernet device
  3105. * to the operating system.
  3106. *
  3107. * Returns:
  3108. * pointer to the statistic structure.
  3109. */
  3110. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
  3111. {
  3112. DEV_NET *pNet = (DEV_NET*) dev->priv;
  3113. SK_AC *pAC = pNet->pAC;
  3114. SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
  3115. SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
  3116. SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
  3117. unsigned int Size; /* size of pnmi struct */
  3118. unsigned long Flags; /* for spin lock */
  3119. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3120. ("SkGeStats starts now...\n"));
  3121. pPnmiStruct = &pAC->PnmiStruct;
  3122. memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
  3123. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3124. Size = SK_PNMI_STRUCT_SIZE;
  3125. SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
  3126. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3127. pPnmiStat = &pPnmiStruct->Stat[0];
  3128. pPnmiConf = &pPnmiStruct->Conf[0];
  3129. pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
  3130. pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
  3131. pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
  3132. pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
  3133. if (pNet->Mtu <= 1500) {
  3134. pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
  3135. } else {
  3136. pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
  3137. pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
  3138. }
  3139. if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
  3140. pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
  3141. pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  3142. pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
  3143. pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
  3144. pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
  3145. pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  3146. /* detailed rx_errors: */
  3147. pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
  3148. pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  3149. pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
  3150. pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
  3151. pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  3152. pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
  3153. /* detailed tx_errors */
  3154. pAC->stats.tx_aborted_errors = (SK_U32) 0;
  3155. pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  3156. pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
  3157. pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  3158. pAC->stats.tx_window_errors = (SK_U32) 0;
  3159. return(&pAC->stats);
  3160. } /* SkGeStats */
  3161. /*****************************************************************************
  3162. *
  3163. * SkGeIoctl - IO-control function
  3164. *
  3165. * Description:
  3166. * This function is called if an ioctl is issued on the device.
  3167. * There are three subfunction for reading, writing and test-writing
  3168. * the private MIB data structure (usefull for SysKonnect-internal tools).
  3169. *
  3170. * Returns:
  3171. * 0, if everything is ok
  3172. * !=0, on error
  3173. */
  3174. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
  3175. {
  3176. DEV_NET *pNet;
  3177. SK_AC *pAC;
  3178. SK_GE_IOCTL Ioctl;
  3179. unsigned int Err = 0;
  3180. int Size;
  3181. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3182. ("SkGeIoctl starts now...\n"));
  3183. pNet = (DEV_NET*) dev->priv;
  3184. pAC = pNet->pAC;
  3185. if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
  3186. return -EFAULT;
  3187. }
  3188. switch(cmd) {
  3189. case SK_IOCTL_SETMIB:
  3190. case SK_IOCTL_PRESETMIB:
  3191. if (!capable(CAP_NET_ADMIN)) return -EPERM;
  3192. case SK_IOCTL_GETMIB:
  3193. if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
  3194. Ioctl.Len<sizeof(pAC->PnmiStruct)?
  3195. Ioctl.Len : sizeof(pAC->PnmiStruct))) {
  3196. return -EFAULT;
  3197. }
  3198. Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
  3199. if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
  3200. Ioctl.Len<Size? Ioctl.Len : Size)) {
  3201. return -EFAULT;
  3202. }
  3203. Ioctl.Len = Size;
  3204. if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
  3205. return -EFAULT;
  3206. }
  3207. break;
  3208. default:
  3209. Err = -EOPNOTSUPP;
  3210. }
  3211. return(Err);
  3212. } /* SkGeIoctl */
  3213. /*****************************************************************************
  3214. *
  3215. * SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
  3216. *
  3217. * Description:
  3218. * This function reads/writes the MIB data using PNMI (Private Network
  3219. * Management Interface).
  3220. * The destination for the data must be provided with the
  3221. * ioctl call and is given to the driver in the form of
  3222. * a user space address.
  3223. * Copying from the user-provided data area into kernel messages
  3224. * and back is done by copy_from_user and copy_to_user calls in
  3225. * SkGeIoctl.
  3226. *
  3227. * Returns:
  3228. * returned size from PNMI call
  3229. */
  3230. static int SkGeIocMib(
  3231. DEV_NET *pNet, /* pointer to the adapter context */
  3232. unsigned int Size, /* length of ioctl data */
  3233. int mode) /* flag for set/preset */
  3234. {
  3235. unsigned long Flags; /* for spin lock */
  3236. SK_AC *pAC;
  3237. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3238. ("SkGeIocMib starts now...\n"));
  3239. pAC = pNet->pAC;
  3240. /* access MIB */
  3241. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3242. switch(mode) {
  3243. case SK_IOCTL_GETMIB:
  3244. SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3245. pNet->NetNr);
  3246. break;
  3247. case SK_IOCTL_PRESETMIB:
  3248. SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3249. pNet->NetNr);
  3250. break;
  3251. case SK_IOCTL_SETMIB:
  3252. SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3253. pNet->NetNr);
  3254. break;
  3255. default:
  3256. break;
  3257. }
  3258. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3259. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3260. ("MIB data access succeeded\n"));
  3261. return (Size);
  3262. } /* SkGeIocMib */
  3263. #endif
  3264. /*****************************************************************************
  3265. *
  3266. * GetConfiguration - read configuration information
  3267. *
  3268. * Description:
  3269. * This function reads per-adapter configuration information from
  3270. * the options provided on the command line.
  3271. *
  3272. * Returns:
  3273. * none
  3274. */
  3275. static void GetConfiguration(
  3276. SK_AC *pAC) /* pointer to the adapter context structure */
  3277. {
  3278. SK_I32 Port; /* preferred port */
  3279. int LinkSpeed; /* Link speed */
  3280. int AutoNeg; /* auto negotiation off (0) or on (1) */
  3281. int DuplexCap; /* duplex capabilities (0=both, 1=full, 2=half */
  3282. int MSMode; /* master / slave mode selection */
  3283. SK_BOOL AutoSet;
  3284. SK_BOOL DupSet;
  3285. /*
  3286. * The two parameters AutoNeg. and DuplexCap. map to one configuration
  3287. * parameter. The mapping is described by this table:
  3288. * DuplexCap -> | both | full | half |
  3289. * AutoNeg | | | |
  3290. * -----------------------------------------------------------------
  3291. * Off | illegal | Full | Half |
  3292. * -----------------------------------------------------------------
  3293. * On | AutoBoth | AutoFull | AutoHalf |
  3294. * -----------------------------------------------------------------
  3295. * Sense | AutoSense | AutoSense | AutoSense |
  3296. */
  3297. int Capabilities[3][3] =
  3298. { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
  3299. {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
  3300. {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
  3301. #define DC_BOTH 0
  3302. #define DC_FULL 1
  3303. #define DC_HALF 2
  3304. #define AN_OFF 0
  3305. #define AN_ON 1
  3306. #define AN_SENS 2
  3307. /* settings for port A */
  3308. /* settings link speed */
  3309. LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
  3310. if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3311. Speed_A[pAC->Index] != NULL) {
  3312. if (strcmp(Speed_A[pAC->Index],"")==0) {
  3313. LinkSpeed = SK_LSPEED_AUTO;
  3314. }
  3315. else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
  3316. LinkSpeed = SK_LSPEED_AUTO;
  3317. }
  3318. else if (strcmp(Speed_A[pAC->Index],"10")==0) {
  3319. LinkSpeed = SK_LSPEED_10MBPS;
  3320. }
  3321. else if (strcmp(Speed_A[pAC->Index],"100")==0) {
  3322. LinkSpeed = SK_LSPEED_100MBPS;
  3323. }
  3324. else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
  3325. LinkSpeed = SK_LSPEED_1000MBPS;
  3326. }
  3327. else printk("%s: Illegal value for Speed_A\n",
  3328. pAC->dev[0]->name);
  3329. }
  3330. /* Check speed parameter */
  3331. /* Only copper type adapter and GE V2 cards */
  3332. if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
  3333. (pAC->GIni.GICopperType != SK_TRUE)) &&
  3334. ((LinkSpeed != SK_LSPEED_AUTO) &&
  3335. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  3336. printk("%s: Illegal value for Speed_A. "
  3337. "Not a copper card or GE V2 card\n Using "
  3338. "speed 1000\n", pAC->dev[0]->name);
  3339. LinkSpeed = SK_LSPEED_1000MBPS;
  3340. }
  3341. pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
  3342. /* Autonegotiation */
  3343. AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
  3344. AutoSet = SK_FALSE;
  3345. if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3346. AutoNeg_A[pAC->Index] != NULL) {
  3347. AutoSet = SK_TRUE;
  3348. if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
  3349. AutoSet = SK_FALSE;
  3350. }
  3351. else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
  3352. AutoNeg = AN_ON;
  3353. }
  3354. else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
  3355. AutoNeg = AN_OFF;
  3356. }
  3357. else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
  3358. AutoNeg = AN_SENS;
  3359. }
  3360. else printk("%s: Illegal value for AutoNeg_A\n",
  3361. pAC->dev[0]->name);
  3362. }
  3363. DuplexCap = DC_BOTH;
  3364. DupSet = SK_FALSE;
  3365. if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3366. DupCap_A[pAC->Index] != NULL) {
  3367. DupSet = SK_TRUE;
  3368. if (strcmp(DupCap_A[pAC->Index],"")==0) {
  3369. DupSet = SK_FALSE;
  3370. }
  3371. else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
  3372. DuplexCap = DC_BOTH;
  3373. }
  3374. else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
  3375. DuplexCap = DC_FULL;
  3376. }
  3377. else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
  3378. DuplexCap = DC_HALF;
  3379. }
  3380. else printk("%s: Illegal value for DupCap_A\n",
  3381. pAC->dev[0]->name);
  3382. }
  3383. /* check for illegal combinations */
  3384. if (AutoSet && AutoNeg==AN_SENS && DupSet) {
  3385. printk("%s, Port A: DuplexCapabilities"
  3386. " ignored using Sense mode\n", pAC->dev[0]->name);
  3387. }
  3388. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  3389. printk("%s, Port A: Illegal combination"
  3390. " of values AutoNeg. and DuplexCap.\n Using "
  3391. "Full Duplex\n", pAC->dev[0]->name);
  3392. DuplexCap = DC_FULL;
  3393. }
  3394. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  3395. DuplexCap = DC_FULL;
  3396. }
  3397. if (!AutoSet && DupSet) {
  3398. printk("%s, Port A: Duplex setting not"
  3399. " possible in\n default AutoNegotiation mode"
  3400. " (Sense).\n Using AutoNegotiation On\n",
  3401. pAC->dev[0]->name);
  3402. AutoNeg = AN_ON;
  3403. }
  3404. /* set the desired mode */
  3405. pAC->GIni.GP[0].PLinkModeConf =
  3406. Capabilities[AutoNeg][DuplexCap];
  3407. pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  3408. if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3409. FlowCtrl_A[pAC->Index] != NULL) {
  3410. if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
  3411. }
  3412. else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
  3413. pAC->GIni.GP[0].PFlowCtrlMode =
  3414. SK_FLOW_MODE_SYM_OR_REM;
  3415. }
  3416. else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
  3417. pAC->GIni.GP[0].PFlowCtrlMode =
  3418. SK_FLOW_MODE_SYMMETRIC;
  3419. }
  3420. else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
  3421. pAC->GIni.GP[0].PFlowCtrlMode =
  3422. SK_FLOW_MODE_LOC_SEND;
  3423. }
  3424. else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
  3425. pAC->GIni.GP[0].PFlowCtrlMode =
  3426. SK_FLOW_MODE_NONE;
  3427. }
  3428. else printk("Illegal value for FlowCtrl_A\n");
  3429. }
  3430. if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
  3431. SK_FLOW_MODE_NONE) {
  3432. printk("%s, Port A: FlowControl"
  3433. " impossible without AutoNegotiation,"
  3434. " disabled\n", pAC->dev[0]->name);
  3435. pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
  3436. }
  3437. MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
  3438. if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3439. Role_A[pAC->Index] != NULL) {
  3440. if (strcmp(Role_A[pAC->Index],"")==0) {
  3441. }
  3442. else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
  3443. MSMode = SK_MS_MODE_AUTO;
  3444. }
  3445. else if (strcmp(Role_A[pAC->Index],"Master")==0) {
  3446. MSMode = SK_MS_MODE_MASTER;
  3447. }
  3448. else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
  3449. MSMode = SK_MS_MODE_SLAVE;
  3450. }
  3451. else printk("%s: Illegal value for Role_A\n",
  3452. pAC->dev[0]->name);
  3453. }
  3454. pAC->GIni.GP[0].PMSMode = MSMode;
  3455. /* settings for port B */
  3456. /* settings link speed */
  3457. LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
  3458. if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3459. Speed_B[pAC->Index] != NULL) {
  3460. if (strcmp(Speed_B[pAC->Index],"")==0) {
  3461. LinkSpeed = SK_LSPEED_AUTO;
  3462. }
  3463. else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
  3464. LinkSpeed = SK_LSPEED_AUTO;
  3465. }
  3466. else if (strcmp(Speed_B[pAC->Index],"10")==0) {
  3467. LinkSpeed = SK_LSPEED_10MBPS;
  3468. }
  3469. else if (strcmp(Speed_B[pAC->Index],"100")==0) {
  3470. LinkSpeed = SK_LSPEED_100MBPS;
  3471. }
  3472. else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
  3473. LinkSpeed = SK_LSPEED_1000MBPS;
  3474. }
  3475. else printk("%s: Illegal value for Speed_B\n",
  3476. pAC->dev[1]->name);
  3477. }
  3478. /* Check speed parameter */
  3479. /* Only copper type adapter and GE V2 cards */
  3480. if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
  3481. (pAC->GIni.GICopperType != SK_TRUE)) &&
  3482. ((LinkSpeed != SK_LSPEED_AUTO) &&
  3483. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  3484. printk("%s: Illegal value for Speed_B. "
  3485. "Not a copper card or GE V2 card\n Using "
  3486. "speed 1000\n", pAC->dev[1]->name);
  3487. LinkSpeed = SK_LSPEED_1000MBPS;
  3488. }
  3489. pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
  3490. /* Auto negotiation */
  3491. AutoNeg = AN_SENS; /* default: do auto Sense */
  3492. AutoSet = SK_FALSE;
  3493. if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3494. AutoNeg_B[pAC->Index] != NULL) {
  3495. AutoSet = SK_TRUE;
  3496. if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
  3497. AutoSet = SK_FALSE;
  3498. }
  3499. else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
  3500. AutoNeg = AN_ON;
  3501. }
  3502. else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
  3503. AutoNeg = AN_OFF;
  3504. }
  3505. else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
  3506. AutoNeg = AN_SENS;
  3507. }
  3508. else printk("Illegal value for AutoNeg_B\n");
  3509. }
  3510. DuplexCap = DC_BOTH;
  3511. DupSet = SK_FALSE;
  3512. if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3513. DupCap_B[pAC->Index] != NULL) {
  3514. DupSet = SK_TRUE;
  3515. if (strcmp(DupCap_B[pAC->Index],"")==0) {
  3516. DupSet = SK_FALSE;
  3517. }
  3518. else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
  3519. DuplexCap = DC_BOTH;
  3520. }
  3521. else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
  3522. DuplexCap = DC_FULL;
  3523. }
  3524. else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
  3525. DuplexCap = DC_HALF;
  3526. }
  3527. else printk("Illegal value for DupCap_B\n");
  3528. }
  3529. /* check for illegal combinations */
  3530. if (AutoSet && AutoNeg==AN_SENS && DupSet) {
  3531. printk("%s, Port B: DuplexCapabilities"
  3532. " ignored using Sense mode\n", pAC->dev[1]->name);
  3533. }
  3534. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  3535. printk("%s, Port B: Illegal combination"
  3536. " of values AutoNeg. and DuplexCap.\n Using "
  3537. "Full Duplex\n", pAC->dev[1]->name);
  3538. DuplexCap = DC_FULL;
  3539. }
  3540. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  3541. DuplexCap = DC_FULL;
  3542. }
  3543. if (!AutoSet && DupSet) {
  3544. printk("%s, Port B: Duplex setting not"
  3545. " possible in\n default AutoNegotiation mode"
  3546. " (Sense).\n Using AutoNegotiation On\n",
  3547. pAC->dev[1]->name);
  3548. AutoNeg = AN_ON;
  3549. }
  3550. /* set the desired mode */
  3551. pAC->GIni.GP[1].PLinkModeConf =
  3552. Capabilities[AutoNeg][DuplexCap];
  3553. pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  3554. if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3555. FlowCtrl_B[pAC->Index] != NULL) {
  3556. if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
  3557. }
  3558. else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
  3559. pAC->GIni.GP[1].PFlowCtrlMode =
  3560. SK_FLOW_MODE_SYM_OR_REM;
  3561. }
  3562. else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
  3563. pAC->GIni.GP[1].PFlowCtrlMode =
  3564. SK_FLOW_MODE_SYMMETRIC;
  3565. }
  3566. else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
  3567. pAC->GIni.GP[1].PFlowCtrlMode =
  3568. SK_FLOW_MODE_LOC_SEND;
  3569. }
  3570. else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
  3571. pAC->GIni.GP[1].PFlowCtrlMode =
  3572. SK_FLOW_MODE_NONE;
  3573. }
  3574. else printk("Illegal value for FlowCtrl_B\n");
  3575. }
  3576. if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
  3577. SK_FLOW_MODE_NONE) {
  3578. printk("%s, Port B: FlowControl"
  3579. " impossible without AutoNegotiation,"
  3580. " disabled\n", pAC->dev[1]->name);
  3581. pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
  3582. }
  3583. MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
  3584. if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3585. Role_B[pAC->Index] != NULL) {
  3586. if (strcmp(Role_B[pAC->Index],"")==0) {
  3587. }
  3588. else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
  3589. MSMode = SK_MS_MODE_AUTO;
  3590. }
  3591. else if (strcmp(Role_B[pAC->Index],"Master")==0) {
  3592. MSMode = SK_MS_MODE_MASTER;
  3593. }
  3594. else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
  3595. MSMode = SK_MS_MODE_SLAVE;
  3596. }
  3597. else printk("%s: Illegal value for Role_B\n",
  3598. pAC->dev[1]->name);
  3599. }
  3600. pAC->GIni.GP[1].PMSMode = MSMode;
  3601. /* settings for both ports */
  3602. pAC->ActivePort = 0;
  3603. if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3604. PrefPort[pAC->Index] != NULL) {
  3605. if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
  3606. pAC->ActivePort = 0;
  3607. pAC->Rlmt.Net[0].Preference = -1; /* auto */
  3608. pAC->Rlmt.Net[0].PrefPort = 0;
  3609. }
  3610. else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
  3611. /*
  3612. * do not set ActivePort here, thus a port
  3613. * switch is issued after net up.
  3614. */
  3615. Port = 0;
  3616. pAC->Rlmt.Net[0].Preference = Port;
  3617. pAC->Rlmt.Net[0].PrefPort = Port;
  3618. }
  3619. else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
  3620. /*
  3621. * do not set ActivePort here, thus a port
  3622. * switch is issued after net up.
  3623. */
  3624. Port = 1;
  3625. pAC->Rlmt.Net[0].Preference = Port;
  3626. pAC->Rlmt.Net[0].PrefPort = Port;
  3627. }
  3628. else printk("%s: Illegal value for PrefPort\n",
  3629. pAC->dev[0]->name);
  3630. }
  3631. pAC->RlmtNets = 1;
  3632. if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3633. RlmtMode[pAC->Index] != NULL) {
  3634. if (strcmp(RlmtMode[pAC->Index], "") == 0) {
  3635. pAC->RlmtMode = 0;
  3636. }
  3637. else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
  3638. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3639. }
  3640. else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
  3641. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3642. SK_RLMT_CHECK_LOC_LINK;
  3643. }
  3644. else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
  3645. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3646. SK_RLMT_CHECK_LOC_LINK |
  3647. SK_RLMT_CHECK_SEG;
  3648. }
  3649. else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
  3650. (pAC->GIni.GIMacsFound == 2)) {
  3651. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3652. pAC->RlmtNets = 2;
  3653. }
  3654. else {
  3655. printk("%s: Illegal value for"
  3656. " RlmtMode, using default\n", pAC->dev[0]->name);
  3657. pAC->RlmtMode = 0;
  3658. }
  3659. }
  3660. else {
  3661. pAC->RlmtMode = 0;
  3662. }
  3663. } /* GetConfiguration */
  3664. /*****************************************************************************
  3665. *
  3666. * ProductStr - return a adapter identification string from vpd
  3667. *
  3668. * Description:
  3669. * This function reads the product name string from the vpd area
  3670. * and puts it the field pAC->DeviceString.
  3671. *
  3672. * Returns: N/A
  3673. */
  3674. static void ProductStr(
  3675. SK_AC *pAC /* pointer to adapter context */
  3676. )
  3677. {
  3678. int StrLen = 80; /* length of the string, defined in SK_AC */
  3679. char Keyword[] = VPD_NAME; /* vpd productname identifier */
  3680. int ReturnCode; /* return code from vpd_read */
  3681. unsigned long Flags;
  3682. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3683. ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, pAC->DeviceStr,
  3684. &StrLen);
  3685. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3686. if (ReturnCode != 0) {
  3687. /* there was an error reading the vpd data */
  3688. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
  3689. ("Error reading VPD data: %d\n", ReturnCode));
  3690. pAC->DeviceStr[0] = '\0';
  3691. }
  3692. } /* ProductStr */
  3693. /****************************************************************************/
  3694. /* functions for common modules *********************************************/
  3695. /****************************************************************************/
  3696. /*****************************************************************************
  3697. *
  3698. * SkDrvAllocRlmtMbuf - allocate an RLMT mbuf
  3699. *
  3700. * Description:
  3701. * This routine returns an RLMT mbuf or NULL. The RLMT Mbuf structure
  3702. * is embedded into a socket buff data area.
  3703. *
  3704. * Context:
  3705. * runtime
  3706. *
  3707. * Returns:
  3708. * NULL or pointer to Mbuf.
  3709. */
  3710. SK_MBUF *SkDrvAllocRlmtMbuf(
  3711. SK_AC *pAC, /* pointer to adapter context */
  3712. SK_IOC IoC, /* the IO-context */
  3713. unsigned BufferSize) /* size of the requested buffer */
  3714. {
  3715. SK_MBUF *pRlmtMbuf; /* pointer to a new rlmt-mbuf structure */
  3716. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  3717. pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
  3718. if (pMsgBlock == NULL) {
  3719. return (NULL);
  3720. }
  3721. pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
  3722. skb_reserve(pMsgBlock, sizeof(SK_MBUF));
  3723. pRlmtMbuf->pNext = NULL;
  3724. pRlmtMbuf->pOs = pMsgBlock;
  3725. pRlmtMbuf->pData = pMsgBlock->data; /* Data buffer. */
  3726. pRlmtMbuf->Size = BufferSize; /* Data buffer size. */
  3727. pRlmtMbuf->Length = 0; /* Length of packet (<= Size). */
  3728. return (pRlmtMbuf);
  3729. } /* SkDrvAllocRlmtMbuf */
  3730. /*****************************************************************************
  3731. *
  3732. * SkDrvFreeRlmtMbuf - free an RLMT mbuf
  3733. *
  3734. * Description:
  3735. * This routine frees one or more RLMT mbuf(s).
  3736. *
  3737. * Context:
  3738. * runtime
  3739. *
  3740. * Returns:
  3741. * Nothing
  3742. */
  3743. void SkDrvFreeRlmtMbuf(
  3744. SK_AC *pAC, /* pointer to adapter context */
  3745. SK_IOC IoC, /* the IO-context */
  3746. SK_MBUF *pMbuf) /* size of the requested buffer */
  3747. {
  3748. SK_MBUF *pFreeMbuf;
  3749. SK_MBUF *pNextMbuf;
  3750. pFreeMbuf = pMbuf;
  3751. do {
  3752. pNextMbuf = pFreeMbuf->pNext;
  3753. DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
  3754. pFreeMbuf = pNextMbuf;
  3755. } while ( pFreeMbuf != NULL );
  3756. } /* SkDrvFreeRlmtMbuf */
  3757. /*****************************************************************************
  3758. *
  3759. * SkOsGetTime - provide a time value
  3760. *
  3761. * Description:
  3762. * This routine provides a time value. The unit is 1/HZ (defined by Linux).
  3763. * It is not used for absolute time, but only for time differences.
  3764. *
  3765. *
  3766. * Returns:
  3767. * Time value
  3768. */
  3769. SK_U64 SkOsGetTime(SK_AC *pAC)
  3770. {
  3771. #if 0
  3772. return jiffies;
  3773. #else
  3774. return get_timer(0);
  3775. #endif
  3776. } /* SkOsGetTime */
  3777. /*****************************************************************************
  3778. *
  3779. * SkPciReadCfgDWord - read a 32 bit value from pci config space
  3780. *
  3781. * Description:
  3782. * This routine reads a 32 bit value from the pci configuration
  3783. * space.
  3784. *
  3785. * Returns:
  3786. * 0 - indicate everything worked ok.
  3787. * != 0 - error indication
  3788. */
  3789. int SkPciReadCfgDWord(
  3790. SK_AC *pAC, /* Adapter Control structure pointer */
  3791. int PciAddr, /* PCI register address */
  3792. SK_U32 *pVal) /* pointer to store the read value */
  3793. {
  3794. pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
  3795. return(0);
  3796. } /* SkPciReadCfgDWord */
  3797. /*****************************************************************************
  3798. *
  3799. * SkPciReadCfgWord - read a 16 bit value from pci config space
  3800. *
  3801. * Description:
  3802. * This routine reads a 16 bit value from the pci configuration
  3803. * space.
  3804. *
  3805. * Returns:
  3806. * 0 - indicate everything worked ok.
  3807. * != 0 - error indication
  3808. */
  3809. int SkPciReadCfgWord(
  3810. SK_AC *pAC, /* Adapter Control structure pointer */
  3811. int PciAddr, /* PCI register address */
  3812. SK_U16 *pVal) /* pointer to store the read value */
  3813. {
  3814. pci_read_config_word(pAC->PciDev, PciAddr, pVal);
  3815. return(0);
  3816. } /* SkPciReadCfgWord */
  3817. /*****************************************************************************
  3818. *
  3819. * SkPciReadCfgByte - read a 8 bit value from pci config space
  3820. *
  3821. * Description:
  3822. * This routine reads a 8 bit value from the pci configuration
  3823. * space.
  3824. *
  3825. * Returns:
  3826. * 0 - indicate everything worked ok.
  3827. * != 0 - error indication
  3828. */
  3829. int SkPciReadCfgByte(
  3830. SK_AC *pAC, /* Adapter Control structure pointer */
  3831. int PciAddr, /* PCI register address */
  3832. SK_U8 *pVal) /* pointer to store the read value */
  3833. {
  3834. pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
  3835. return(0);
  3836. } /* SkPciReadCfgByte */
  3837. /*****************************************************************************
  3838. *
  3839. * SkPciWriteCfgDWord - write a 32 bit value to pci config space
  3840. *
  3841. * Description:
  3842. * This routine writes a 32 bit value to the pci configuration
  3843. * space.
  3844. *
  3845. * Returns:
  3846. * 0 - indicate everything worked ok.
  3847. * != 0 - error indication
  3848. */
  3849. int SkPciWriteCfgDWord(
  3850. SK_AC *pAC, /* Adapter Control structure pointer */
  3851. int PciAddr, /* PCI register address */
  3852. SK_U32 Val) /* pointer to store the read value */
  3853. {
  3854. pci_write_config_dword(pAC->PciDev, PciAddr, Val);
  3855. return(0);
  3856. } /* SkPciWriteCfgDWord */
  3857. /*****************************************************************************
  3858. *
  3859. * SkPciWriteCfgWord - write a 16 bit value to pci config space
  3860. *
  3861. * Description:
  3862. * This routine writes a 16 bit value to the pci configuration
  3863. * space. The flag PciConfigUp indicates whether the config space
  3864. * is accesible or must be set up first.
  3865. *
  3866. * Returns:
  3867. * 0 - indicate everything worked ok.
  3868. * != 0 - error indication
  3869. */
  3870. int SkPciWriteCfgWord(
  3871. SK_AC *pAC, /* Adapter Control structure pointer */
  3872. int PciAddr, /* PCI register address */
  3873. SK_U16 Val) /* pointer to store the read value */
  3874. {
  3875. pci_write_config_word(pAC->PciDev, PciAddr, Val);
  3876. return(0);
  3877. } /* SkPciWriteCfgWord */
  3878. /*****************************************************************************
  3879. *
  3880. * SkPciWriteCfgWord - write a 8 bit value to pci config space
  3881. *
  3882. * Description:
  3883. * This routine writes a 8 bit value to the pci configuration
  3884. * space. The flag PciConfigUp indicates whether the config space
  3885. * is accesible or must be set up first.
  3886. *
  3887. * Returns:
  3888. * 0 - indicate everything worked ok.
  3889. * != 0 - error indication
  3890. */
  3891. int SkPciWriteCfgByte(
  3892. SK_AC *pAC, /* Adapter Control structure pointer */
  3893. int PciAddr, /* PCI register address */
  3894. SK_U8 Val) /* pointer to store the read value */
  3895. {
  3896. pci_write_config_byte(pAC->PciDev, PciAddr, Val);
  3897. return(0);
  3898. } /* SkPciWriteCfgByte */
  3899. /*****************************************************************************
  3900. *
  3901. * SkDrvEvent - handle driver events
  3902. *
  3903. * Description:
  3904. * This function handles events from all modules directed to the driver
  3905. *
  3906. * Context:
  3907. * Is called under protection of slow path lock.
  3908. *
  3909. * Returns:
  3910. * 0 if everything ok
  3911. * < 0 on error
  3912. *
  3913. */
  3914. int SkDrvEvent(
  3915. SK_AC *pAC, /* pointer to adapter context */
  3916. SK_IOC IoC, /* io-context */
  3917. SK_U32 Event, /* event-id */
  3918. SK_EVPARA Param) /* event-parameter */
  3919. {
  3920. SK_MBUF *pRlmtMbuf; /* pointer to a rlmt-mbuf structure */
  3921. struct sk_buff *pMsg; /* pointer to a message block */
  3922. int FromPort; /* the port from which we switch away */
  3923. int ToPort; /* the port we switch to */
  3924. SK_EVPARA NewPara; /* parameter for further events */
  3925. #if 0
  3926. int Stat;
  3927. #endif
  3928. unsigned long Flags;
  3929. SK_BOOL DualNet;
  3930. switch (Event) {
  3931. case SK_DRV_ADAP_FAIL:
  3932. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3933. ("ADAPTER FAIL EVENT\n"));
  3934. printk("%s: Adapter failed.\n", pAC->dev[0]->name);
  3935. /* disable interrupts */
  3936. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  3937. /* cgoos */
  3938. break;
  3939. case SK_DRV_PORT_FAIL:
  3940. FromPort = Param.Para32[0];
  3941. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3942. ("PORT FAIL EVENT, Port: %d\n", FromPort));
  3943. if (FromPort == 0) {
  3944. printk("%s: Port A failed.\n", pAC->dev[0]->name);
  3945. } else {
  3946. printk("%s: Port B failed.\n", pAC->dev[1]->name);
  3947. }
  3948. /* cgoos */
  3949. break;
  3950. case SK_DRV_PORT_RESET: /* SK_U32 PortIdx */
  3951. /* action list 4 */
  3952. FromPort = Param.Para32[0];
  3953. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3954. ("PORT RESET EVENT, Port: %d ", FromPort));
  3955. NewPara.Para64 = FromPort;
  3956. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  3957. spin_lock_irqsave(
  3958. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3959. Flags);
  3960. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
  3961. #if 0
  3962. pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
  3963. #endif
  3964. spin_unlock_irqrestore(
  3965. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3966. Flags);
  3967. /* clear rx ring from received frames */
  3968. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
  3969. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  3970. spin_lock_irqsave(
  3971. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3972. Flags);
  3973. /* tschilling: Handling of return value inserted. */
  3974. if (SkGeInitPort(pAC, IoC, FromPort)) {
  3975. if (FromPort == 0) {
  3976. printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
  3977. } else {
  3978. printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
  3979. }
  3980. }
  3981. SkAddrMcUpdate(pAC,IoC, FromPort);
  3982. PortReInitBmu(pAC, FromPort);
  3983. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  3984. ClearAndStartRx(pAC, FromPort);
  3985. spin_unlock_irqrestore(
  3986. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3987. Flags);
  3988. break;
  3989. case SK_DRV_NET_UP: /* SK_U32 PortIdx */
  3990. /* action list 5 */
  3991. FromPort = Param.Para32[0];
  3992. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3993. ("NET UP EVENT, Port: %d ", Param.Para32[0]));
  3994. #ifdef SK98_INFO
  3995. printk("%s: network connection up using"
  3996. " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
  3997. /* tschilling: Values changed according to LinkSpeedUsed. */
  3998. Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
  3999. if (Stat == SK_LSPEED_STAT_10MBPS) {
  4000. printk(" speed: 10\n");
  4001. } else if (Stat == SK_LSPEED_STAT_100MBPS) {
  4002. printk(" speed: 100\n");
  4003. } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
  4004. printk(" speed: 1000\n");
  4005. } else {
  4006. printk(" speed: unknown\n");
  4007. }
  4008. Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
  4009. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  4010. Stat == SK_LMODE_STAT_AUTOFULL) {
  4011. printk(" autonegotiation: yes\n");
  4012. }
  4013. else {
  4014. printk(" autonegotiation: no\n");
  4015. }
  4016. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  4017. Stat == SK_LMODE_STAT_HALF) {
  4018. printk(" duplex mode: half\n");
  4019. }
  4020. else {
  4021. printk(" duplex mode: full\n");
  4022. }
  4023. Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
  4024. if (Stat == SK_FLOW_STAT_REM_SEND ) {
  4025. printk(" flowctrl: remote send\n");
  4026. }
  4027. else if (Stat == SK_FLOW_STAT_LOC_SEND ){
  4028. printk(" flowctrl: local send\n");
  4029. }
  4030. else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
  4031. printk(" flowctrl: symmetric\n");
  4032. }
  4033. else {
  4034. printk(" flowctrl: none\n");
  4035. }
  4036. /* tschilling: Check against CopperType now. */
  4037. if ((pAC->GIni.GICopperType == SK_TRUE) &&
  4038. (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
  4039. SK_LSPEED_STAT_1000MBPS)) {
  4040. Stat = pAC->GIni.GP[FromPort].PMSStatus;
  4041. if (Stat == SK_MS_STAT_MASTER ) {
  4042. printk(" role: master\n");
  4043. }
  4044. else if (Stat == SK_MS_STAT_SLAVE ) {
  4045. printk(" role: slave\n");
  4046. }
  4047. else {
  4048. printk(" role: ???\n");
  4049. }
  4050. }
  4051. #ifdef SK_ZEROCOPY
  4052. if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
  4053. printk(" scatter-gather: enabled\n");
  4054. else
  4055. printk(" scatter-gather: disabled\n");
  4056. #else
  4057. printk(" scatter-gather: disabled\n");
  4058. #endif
  4059. #endif /* SK98_INFO */
  4060. if ((Param.Para32[0] != pAC->ActivePort) &&
  4061. (pAC->RlmtNets == 1)) {
  4062. NewPara.Para32[0] = pAC->ActivePort;
  4063. NewPara.Para32[1] = Param.Para32[0];
  4064. SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
  4065. NewPara);
  4066. }
  4067. /* Inform the world that link protocol is up. */
  4068. #if 0
  4069. pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
  4070. #endif
  4071. break;
  4072. case SK_DRV_NET_DOWN: /* SK_U32 Reason */
  4073. /* action list 7 */
  4074. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4075. ("NET DOWN EVENT "));
  4076. #ifdef SK98_INFO
  4077. printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
  4078. #endif
  4079. #if 0
  4080. pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
  4081. #endif
  4082. break;
  4083. case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4084. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4085. ("PORT SWITCH HARD "));
  4086. case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4087. /* action list 6 */
  4088. printk("%s: switching to port %c\n", pAC->dev[0]->name,
  4089. 'A'+Param.Para32[1]);
  4090. case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4091. FromPort = Param.Para32[0];
  4092. ToPort = Param.Para32[1];
  4093. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4094. ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
  4095. FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
  4096. NewPara.Para64 = FromPort;
  4097. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  4098. NewPara.Para64 = ToPort;
  4099. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  4100. spin_lock_irqsave(
  4101. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4102. Flags);
  4103. spin_lock_irqsave(
  4104. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4105. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
  4106. SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
  4107. spin_unlock_irqrestore(
  4108. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4109. spin_unlock_irqrestore(
  4110. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4111. Flags);
  4112. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
  4113. ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
  4114. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  4115. ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
  4116. spin_lock_irqsave(
  4117. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4118. Flags);
  4119. spin_lock_irqsave(
  4120. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4121. pAC->ActivePort = ToPort;
  4122. #if 0
  4123. SetQueueSizes(pAC);
  4124. #else
  4125. /* tschilling: New common function with minimum size check. */
  4126. DualNet = SK_FALSE;
  4127. if (pAC->RlmtNets == 2) {
  4128. DualNet = SK_TRUE;
  4129. }
  4130. if (SkGeInitAssignRamToQueues(
  4131. pAC,
  4132. pAC->ActivePort,
  4133. DualNet)) {
  4134. spin_unlock_irqrestore(
  4135. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4136. spin_unlock_irqrestore(
  4137. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4138. Flags);
  4139. printk("SkGeInitAssignRamToQueues failed.\n");
  4140. break;
  4141. }
  4142. #endif
  4143. /* tschilling: Handling of return values inserted. */
  4144. if (SkGeInitPort(pAC, IoC, FromPort) ||
  4145. SkGeInitPort(pAC, IoC, ToPort)) {
  4146. printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
  4147. }
  4148. if (Event == SK_DRV_SWITCH_SOFT) {
  4149. SkMacRxTxEnable(pAC, IoC, FromPort);
  4150. }
  4151. SkMacRxTxEnable(pAC, IoC, ToPort);
  4152. SkAddrSwap(pAC, IoC, FromPort, ToPort);
  4153. SkAddrMcUpdate(pAC, IoC, FromPort);
  4154. SkAddrMcUpdate(pAC, IoC, ToPort);
  4155. PortReInitBmu(pAC, FromPort);
  4156. PortReInitBmu(pAC, ToPort);
  4157. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  4158. SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
  4159. ClearAndStartRx(pAC, FromPort);
  4160. ClearAndStartRx(pAC, ToPort);
  4161. spin_unlock_irqrestore(
  4162. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4163. spin_unlock_irqrestore(
  4164. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4165. Flags);
  4166. break;
  4167. case SK_DRV_RLMT_SEND: /* SK_MBUF *pMb */
  4168. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4169. ("RLS "));
  4170. pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
  4171. pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
  4172. skb_put(pMsg, pRlmtMbuf->Length);
  4173. if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
  4174. pMsg) < 0)
  4175. DEV_KFREE_SKB_ANY(pMsg);
  4176. break;
  4177. default:
  4178. break;
  4179. }
  4180. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4181. ("END EVENT "));
  4182. return (0);
  4183. } /* SkDrvEvent */
  4184. /*****************************************************************************
  4185. *
  4186. * SkErrorLog - log errors
  4187. *
  4188. * Description:
  4189. * This function logs errors to the system buffer and to the console
  4190. *
  4191. * Returns:
  4192. * 0 if everything ok
  4193. * < 0 on error
  4194. *
  4195. */
  4196. void SkErrorLog(
  4197. SK_AC *pAC,
  4198. int ErrClass,
  4199. int ErrNum,
  4200. char *pErrorMsg)
  4201. {
  4202. char ClassStr[80];
  4203. switch (ErrClass) {
  4204. case SK_ERRCL_OTHER:
  4205. strcpy(ClassStr, "Other error");
  4206. break;
  4207. case SK_ERRCL_CONFIG:
  4208. strcpy(ClassStr, "Configuration error");
  4209. break;
  4210. case SK_ERRCL_INIT:
  4211. strcpy(ClassStr, "Initialization error");
  4212. break;
  4213. case SK_ERRCL_NORES:
  4214. strcpy(ClassStr, "Out of resources error");
  4215. break;
  4216. case SK_ERRCL_SW:
  4217. strcpy(ClassStr, "internal Software error");
  4218. break;
  4219. case SK_ERRCL_HW:
  4220. strcpy(ClassStr, "Hardware failure");
  4221. break;
  4222. case SK_ERRCL_COMM:
  4223. strcpy(ClassStr, "Communication error");
  4224. break;
  4225. }
  4226. printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
  4227. " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
  4228. ClassStr, ErrNum, pErrorMsg);
  4229. } /* SkErrorLog */
  4230. #ifdef DEBUG
  4231. /****************************************************************************/
  4232. /* "debug only" section *****************************************************/
  4233. /****************************************************************************/
  4234. /*****************************************************************************
  4235. *
  4236. * DumpMsg - print a frame
  4237. *
  4238. * Description:
  4239. * This function prints frames to the system logfile/to the console.
  4240. *
  4241. * Returns: N/A
  4242. *
  4243. */
  4244. static void DumpMsg(struct sk_buff *skb, char *str)
  4245. {
  4246. int msglen;
  4247. if (skb == NULL) {
  4248. printk("DumpMsg(): NULL-Message\n");
  4249. return;
  4250. }
  4251. if (skb->data == NULL) {
  4252. printk("DumpMsg(): Message empty\n");
  4253. return;
  4254. }
  4255. msglen = skb->len;
  4256. if (msglen > 64)
  4257. msglen = 64;
  4258. printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
  4259. DumpData((char *)skb->data, msglen);
  4260. printk("------- End of message ---------\n");
  4261. } /* DumpMsg */
  4262. /*****************************************************************************
  4263. *
  4264. * DumpData - print a data area
  4265. *
  4266. * Description:
  4267. * This function prints a area of data to the system logfile/to the
  4268. * console.
  4269. *
  4270. * Returns: N/A
  4271. *
  4272. */
  4273. static void DumpData(char *p, int size)
  4274. {
  4275. register int i;
  4276. int haddr, addr;
  4277. char hex_buffer[180];
  4278. char asc_buffer[180];
  4279. char HEXCHAR[] = "0123456789ABCDEF";
  4280. addr = 0;
  4281. haddr = 0;
  4282. hex_buffer[0] = 0;
  4283. asc_buffer[0] = 0;
  4284. for (i=0; i < size; ) {
  4285. if (*p >= '0' && *p <='z')
  4286. asc_buffer[addr] = *p;
  4287. else
  4288. asc_buffer[addr] = '.';
  4289. addr++;
  4290. asc_buffer[addr] = 0;
  4291. hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
  4292. haddr++;
  4293. hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
  4294. haddr++;
  4295. hex_buffer[haddr] = ' ';
  4296. haddr++;
  4297. hex_buffer[haddr] = 0;
  4298. p++;
  4299. i++;
  4300. if (i%16 == 0) {
  4301. printk("%s %s\n", hex_buffer, asc_buffer);
  4302. addr = 0;
  4303. haddr = 0;
  4304. }
  4305. }
  4306. } /* DumpData */
  4307. /*****************************************************************************
  4308. *
  4309. * DumpLong - print a data area as long values
  4310. *
  4311. * Description:
  4312. * This function prints a area of data to the system logfile/to the
  4313. * console.
  4314. *
  4315. * Returns: N/A
  4316. *
  4317. */
  4318. static void DumpLong(char *pc, int size)
  4319. {
  4320. register int i;
  4321. int haddr, addr;
  4322. char hex_buffer[180];
  4323. char asc_buffer[180];
  4324. char HEXCHAR[] = "0123456789ABCDEF";
  4325. long *p;
  4326. int l;
  4327. addr = 0;
  4328. haddr = 0;
  4329. hex_buffer[0] = 0;
  4330. asc_buffer[0] = 0;
  4331. p = (long*) pc;
  4332. for (i=0; i < size; ) {
  4333. l = (long) *p;
  4334. hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
  4335. haddr++;
  4336. hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
  4337. haddr++;
  4338. hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
  4339. haddr++;
  4340. hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
  4341. haddr++;
  4342. hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
  4343. haddr++;
  4344. hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
  4345. haddr++;
  4346. hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
  4347. haddr++;
  4348. hex_buffer[haddr] = HEXCHAR[l & 0x0f];
  4349. haddr++;
  4350. hex_buffer[haddr] = ' ';
  4351. haddr++;
  4352. hex_buffer[haddr] = 0;
  4353. p++;
  4354. i++;
  4355. if (i%8 == 0) {
  4356. printk("%4x %s\n", (i-8)*4, hex_buffer);
  4357. haddr = 0;
  4358. }
  4359. }
  4360. printk("------------------------\n");
  4361. } /* DumpLong */
  4362. #endif
  4363. #endif /* CONFIG_SK98 */