universal.c 6.0 KB

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  1. /*
  2. * Copyright (C) 2010 Samsung Electronics
  3. * Minkyu Kang <mk7.kang@samsung.com>
  4. * Kyungmin Park <kyungmin.park@samsung.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <asm/io.h>
  26. #include <asm/arch/adc.h>
  27. #include <asm/arch/gpio.h>
  28. #include <asm/arch/mmc.h>
  29. #include <pmic.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. struct s5pc210_gpio_part1 *gpio1;
  32. struct s5pc210_gpio_part2 *gpio2;
  33. unsigned int board_rev;
  34. u32 get_board_rev(void)
  35. {
  36. return board_rev;
  37. }
  38. static int get_hwrev(void)
  39. {
  40. return board_rev & 0xFF;
  41. }
  42. static void check_hw_revision(void);
  43. int board_init(void)
  44. {
  45. gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
  46. gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
  47. gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
  48. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  49. check_hw_revision();
  50. printf("HW Revision:\t0x%x\n", board_rev);
  51. #if defined(CONFIG_PMIC)
  52. pmic_init();
  53. #endif
  54. return 0;
  55. }
  56. int dram_init(void)
  57. {
  58. gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
  59. get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
  60. return 0;
  61. }
  62. void dram_init_banksize(void)
  63. {
  64. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  65. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  66. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  67. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  68. }
  69. static unsigned short get_adc_value(int channel)
  70. {
  71. struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
  72. unsigned short ret = 0;
  73. unsigned int reg;
  74. unsigned int loop = 0;
  75. writel(channel & 0xF, &adc->adcmux);
  76. writel((1 << 14) | (49 << 6), &adc->adccon);
  77. writel(1000 & 0xffff, &adc->adcdly);
  78. writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
  79. udelay(10);
  80. writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
  81. udelay(10);
  82. do {
  83. udelay(1);
  84. reg = readl(&adc->adccon);
  85. } while (!(reg & (1 << 15)) && (loop++ < 1000));
  86. ret = readl(&adc->adcdat0) & 0xFFF;
  87. return ret;
  88. }
  89. static unsigned int get_hw_revision(void)
  90. {
  91. int hwrev, mode0, mode1;
  92. mode0 = get_adc_value(1); /* HWREV_MODE0 */
  93. mode1 = get_adc_value(2); /* HWREV_MODE1 */
  94. /*
  95. * XXX Always set the default hwrev as the latest board
  96. * ADC = (voltage) / 3.3 * 4096
  97. */
  98. hwrev = 3;
  99. #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
  100. if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
  101. hwrev = 0x0; /* 0.01V 0.01V */
  102. if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
  103. hwrev = 0x1; /* 610mV 0.01V */
  104. if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
  105. hwrev = 0x2; /* 1.16V 0.01V */
  106. if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
  107. hwrev = 0x3; /* 1.79V 0.01V */
  108. #undef IS_RANGE
  109. debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
  110. return hwrev;
  111. }
  112. static void check_hw_revision(void)
  113. {
  114. int hwrev;
  115. hwrev = get_hw_revision();
  116. board_rev |= hwrev;
  117. }
  118. #ifdef CONFIG_DISPLAY_BOARDINFO
  119. int checkboard(void)
  120. {
  121. puts("Board:\tUniversal C210\n");
  122. return 0;
  123. }
  124. #endif
  125. #ifdef CONFIG_GENERIC_MMC
  126. int board_mmc_init(bd_t *bis)
  127. {
  128. int i, err;
  129. switch (get_hwrev()) {
  130. case 0:
  131. /*
  132. * Set the low to enable LDO_EN
  133. * But when you use the test board for eMMC booting
  134. * you should set it HIGH since it removes the inverter
  135. */
  136. /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
  137. s5p_gpio_direction_output(&gpio1->e3, 6, 0);
  138. break;
  139. default:
  140. /*
  141. * Default reset state is High and there's no inverter
  142. * But set it as HIGH to ensure
  143. */
  144. /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
  145. s5p_gpio_direction_output(&gpio1->e1, 3, 1);
  146. break;
  147. }
  148. /*
  149. * eMMC GPIO:
  150. * SDR 8-bit@48MHz at MMC0
  151. * GPK0[0] SD_0_CLK(2)
  152. * GPK0[1] SD_0_CMD(2)
  153. * GPK0[2] SD_0_CDn -> Not used
  154. * GPK0[3:6] SD_0_DATA[0:3](2)
  155. * GPK1[3:6] SD_0_DATA[0:3](3)
  156. *
  157. * DDR 4-bit@26MHz at MMC4
  158. * GPK0[0] SD_4_CLK(3)
  159. * GPK0[1] SD_4_CMD(3)
  160. * GPK0[2] SD_4_CDn -> Not used
  161. * GPK0[3:6] SD_4_DATA[0:3](3)
  162. * GPK1[3:6] SD_4_DATA[4:7](4)
  163. */
  164. for (i = 0; i < 7; i++) {
  165. if (i == 2)
  166. continue;
  167. /* GPK0[0:6] special function 2 */
  168. s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
  169. /* GPK0[0:6] pull disable */
  170. s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
  171. /* GPK0[0:6] drv 4x */
  172. s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
  173. }
  174. for (i = 3; i < 7; i++) {
  175. /* GPK1[3:6] special function 3 */
  176. s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
  177. /* GPK1[3:6] pull disable */
  178. s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
  179. /* GPK1[3:6] drv 4x */
  180. s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
  181. }
  182. /* T-flash detect */
  183. s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
  184. s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
  185. /*
  186. * MMC device init
  187. * mmc0 : eMMC (8-bit buswidth)
  188. * mmc2 : SD card (4-bit buswidth)
  189. */
  190. err = s5p_mmc_init(0, 8);
  191. /*
  192. * Check the T-flash detect pin
  193. * GPX3[4] T-flash detect pin
  194. */
  195. if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
  196. /*
  197. * SD card GPIO:
  198. * GPK2[0] SD_2_CLK(2)
  199. * GPK2[1] SD_2_CMD(2)
  200. * GPK2[2] SD_2_CDn -> Not used
  201. * GPK2[3:6] SD_2_DATA[0:3](2)
  202. */
  203. for (i = 0; i < 7; i++) {
  204. if (i == 2)
  205. continue;
  206. /* GPK2[0:6] special function 2 */
  207. s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
  208. /* GPK2[0:6] pull disable */
  209. s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
  210. /* GPK2[0:6] drv 4x */
  211. s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
  212. }
  213. err = s5p_mmc_init(2, 4);
  214. }
  215. return err;
  216. }
  217. #endif