mxc_i2c.c 6.3 KB

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  1. /*
  2. * i2c driver for Freescale mx31
  3. *
  4. * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <asm/io.h>
  26. #if defined(CONFIG_HARD_I2C)
  27. #include <asm/arch/clock.h>
  28. #include <asm/arch/imx-regs.h>
  29. #define IADR 0x00
  30. #define IFDR 0x04
  31. #define I2CR 0x08
  32. #define I2SR 0x0c
  33. #define I2DR 0x10
  34. #define I2CR_IEN (1 << 7)
  35. #define I2CR_IIEN (1 << 6)
  36. #define I2CR_MSTA (1 << 5)
  37. #define I2CR_MTX (1 << 4)
  38. #define I2CR_TX_NO_AK (1 << 3)
  39. #define I2CR_RSTA (1 << 2)
  40. #define I2SR_ICF (1 << 7)
  41. #define I2SR_IBB (1 << 5)
  42. #define I2SR_IIF (1 << 1)
  43. #define I2SR_RX_NO_AK (1 << 0)
  44. #if defined(CONFIG_SYS_I2C_MX31_PORT1)
  45. #define I2C_BASE 0x43f80000
  46. #define I2C_CLK_OFFSET 26
  47. #elif defined (CONFIG_SYS_I2C_MX31_PORT2)
  48. #define I2C_BASE 0x43f98000
  49. #define I2C_CLK_OFFSET 28
  50. #elif defined (CONFIG_SYS_I2C_MX31_PORT3)
  51. #define I2C_BASE 0x43f84000
  52. #define I2C_CLK_OFFSET 30
  53. #elif defined(CONFIG_SYS_I2C_MX53_PORT1)
  54. #define I2C_BASE I2C1_BASE_ADDR
  55. #elif defined(CONFIG_SYS_I2C_MX53_PORT2)
  56. #define I2C_BASE I2C2_BASE_ADDR
  57. #elif defined(CONFIG_SYS_I2C_MX35_PORT1)
  58. #define I2C_BASE I2C_BASE_ADDR
  59. #else
  60. #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
  61. #endif
  62. #define I2C_MAX_TIMEOUT 10000
  63. #define I2C_MAX_RETRIES 3
  64. static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
  65. 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
  66. 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
  67. static inline void i2c_reset(void)
  68. {
  69. writew(0, I2C_BASE + I2CR); /* Reset module */
  70. writew(0, I2C_BASE + I2SR);
  71. writew(I2CR_IEN, I2C_BASE + I2CR);
  72. }
  73. void i2c_init(int speed, int unused)
  74. {
  75. int freq;
  76. int i;
  77. #if defined(CONFIG_MX31)
  78. struct clock_control_regs *sc_regs =
  79. (struct clock_control_regs *)CCM_BASE;
  80. freq = mx31_get_ipg_clk();
  81. /* start the required I2C clock */
  82. writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
  83. &sc_regs->cgr0);
  84. #else
  85. freq = mxc_get_clock(MXC_IPG_PERCLK);
  86. #endif
  87. for (i = 0; i < 0x1f; i++)
  88. if (freq / div[i] <= speed)
  89. break;
  90. debug("%s: speed: %d\n", __func__, speed);
  91. writew(i, I2C_BASE + IFDR);
  92. i2c_reset();
  93. }
  94. static int wait_idle(void)
  95. {
  96. int timeout = I2C_MAX_TIMEOUT;
  97. while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
  98. writew(0, I2C_BASE + I2SR);
  99. udelay(1);
  100. }
  101. return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
  102. }
  103. static int wait_busy(void)
  104. {
  105. int timeout = I2C_MAX_TIMEOUT;
  106. while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
  107. udelay(1);
  108. writew(0, I2C_BASE + I2SR); /* clear interrupt */
  109. return timeout;
  110. }
  111. static int wait_complete(void)
  112. {
  113. int timeout = I2C_MAX_TIMEOUT;
  114. while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
  115. writew(0, I2C_BASE + I2SR);
  116. udelay(1);
  117. }
  118. udelay(200);
  119. writew(0, I2C_BASE + I2SR); /* clear interrupt */
  120. return timeout;
  121. }
  122. static int tx_byte(u8 byte)
  123. {
  124. writew(byte, I2C_BASE + I2DR);
  125. if (!wait_complete() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
  126. return -1;
  127. return 0;
  128. }
  129. static int rx_byte(int last)
  130. {
  131. if (!wait_complete())
  132. return -1;
  133. if (last)
  134. writew(I2CR_IEN, I2C_BASE + I2CR);
  135. return readw(I2C_BASE + I2DR);
  136. }
  137. int i2c_probe(uchar chip)
  138. {
  139. int ret;
  140. writew(0, I2C_BASE + I2CR); /* Reset module */
  141. writew(I2CR_IEN, I2C_BASE + I2CR);
  142. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
  143. ret = tx_byte(chip << 1);
  144. writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
  145. return ret;
  146. }
  147. static int i2c_addr(uchar chip, uint addr, int alen)
  148. {
  149. int i, retry = 0;
  150. for (retry = 0; retry < 3; retry++) {
  151. if (wait_idle())
  152. break;
  153. i2c_reset();
  154. for (i = 0; i < I2C_MAX_TIMEOUT; i++)
  155. udelay(1);
  156. }
  157. if (retry >= I2C_MAX_RETRIES) {
  158. debug("%s:bus is busy(%x)\n",
  159. __func__, readw(I2C_BASE + I2SR));
  160. return -1;
  161. }
  162. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
  163. if (!wait_busy()) {
  164. debug("%s:trigger start fail(%x)\n",
  165. __func__, readw(I2C_BASE + I2SR));
  166. return -1;
  167. }
  168. if (tx_byte(chip << 1) || (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
  169. debug("%s:chip address cycle fail(%x)\n",
  170. __func__, readw(I2C_BASE + I2SR));
  171. return -1;
  172. }
  173. while (alen--)
  174. if (tx_byte((addr >> (alen * 8)) & 0xff) ||
  175. (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
  176. debug("%s:device address cycle fail(%x)\n",
  177. __func__, readw(I2C_BASE + I2SR));
  178. return -1;
  179. }
  180. return 0;
  181. }
  182. int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
  183. {
  184. int timeout = I2C_MAX_TIMEOUT;
  185. int ret;
  186. debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
  187. __func__, chip, addr, alen, len);
  188. if (i2c_addr(chip, addr, alen)) {
  189. printf("i2c_addr failed\n");
  190. return -1;
  191. }
  192. writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
  193. if (tx_byte(chip << 1 | 1))
  194. return -1;
  195. writew(I2CR_IEN | I2CR_MSTA |
  196. ((len == 1) ? I2CR_TX_NO_AK : 0),
  197. I2C_BASE + I2CR);
  198. ret = readw(I2C_BASE + I2DR);
  199. while (len--) {
  200. ret = rx_byte(len == 0);
  201. if (ret < 0)
  202. return -1;
  203. *buf++ = ret;
  204. if (len <= 1)
  205. writew(I2CR_IEN | I2CR_MSTA |
  206. I2CR_TX_NO_AK,
  207. I2C_BASE + I2CR);
  208. }
  209. writew(I2CR_IEN, I2C_BASE + I2CR);
  210. while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
  211. udelay(1);
  212. return 0;
  213. }
  214. int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
  215. {
  216. int timeout = I2C_MAX_TIMEOUT;
  217. debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
  218. __func__, chip, addr, alen, len);
  219. if (i2c_addr(chip, addr, alen))
  220. return -1;
  221. while (len--)
  222. if (tx_byte(*buf++))
  223. return -1;
  224. writew(I2CR_IEN, I2C_BASE + I2CR);
  225. while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
  226. udelay(1);
  227. return 0;
  228. }
  229. #endif /* CONFIG_HARD_I2C */