cfi_flash.c 64 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. #include <watchdog.h>
  42. /*
  43. * This file implements a Common Flash Interface (CFI) driver for
  44. * U-Boot.
  45. *
  46. * The width of the port and the width of the chips are determined at
  47. * initialization. These widths are used to calculate the address for
  48. * access CFI data structures.
  49. *
  50. * References
  51. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  52. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  53. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  54. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  55. * AMD CFI Specification, Release 2.0 December 1, 2001
  56. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  57. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  58. *
  59. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  60. * reading and writing ... (yes there is such a Hardware).
  61. */
  62. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  63. #ifdef CONFIG_FLASH_CFI_MTD
  64. static uint flash_verbose = 1;
  65. #else
  66. #define flash_verbose 1
  67. #endif
  68. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  69. /*
  70. * Check if chip width is defined. If not, start detecting with 8bit.
  71. */
  72. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  73. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  74. #endif
  75. /*
  76. * 0xffff is an undefined value for the configuration register. When
  77. * this value is returned, the configuration register shall not be
  78. * written at all (default mode).
  79. */
  80. static u16 cfi_flash_config_reg(int i)
  81. {
  82. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  83. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  84. #else
  85. return 0xffff;
  86. #endif
  87. }
  88. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  89. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  90. #endif
  91. static phys_addr_t __cfi_flash_bank_addr(int i)
  92. {
  93. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  94. }
  95. phys_addr_t cfi_flash_bank_addr(int i)
  96. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  97. static unsigned long __cfi_flash_bank_size(int i)
  98. {
  99. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  100. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  101. #else
  102. return 0;
  103. #endif
  104. }
  105. unsigned long cfi_flash_bank_size(int i)
  106. __attribute__((weak, alias("__cfi_flash_bank_size")));
  107. static void __flash_write8(u8 value, void *addr)
  108. {
  109. __raw_writeb(value, addr);
  110. }
  111. static void __flash_write16(u16 value, void *addr)
  112. {
  113. __raw_writew(value, addr);
  114. }
  115. static void __flash_write32(u32 value, void *addr)
  116. {
  117. __raw_writel(value, addr);
  118. }
  119. static void __flash_write64(u64 value, void *addr)
  120. {
  121. /* No architectures currently implement __raw_writeq() */
  122. *(volatile u64 *)addr = value;
  123. }
  124. static u8 __flash_read8(void *addr)
  125. {
  126. return __raw_readb(addr);
  127. }
  128. static u16 __flash_read16(void *addr)
  129. {
  130. return __raw_readw(addr);
  131. }
  132. static u32 __flash_read32(void *addr)
  133. {
  134. return __raw_readl(addr);
  135. }
  136. static u64 __flash_read64(void *addr)
  137. {
  138. /* No architectures currently implement __raw_readq() */
  139. return *(volatile u64 *)addr;
  140. }
  141. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  142. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  143. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  144. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  145. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  146. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  147. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  148. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  149. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  150. #else
  151. #define flash_write8 __flash_write8
  152. #define flash_write16 __flash_write16
  153. #define flash_write32 __flash_write32
  154. #define flash_write64 __flash_write64
  155. #define flash_read8 __flash_read8
  156. #define flash_read16 __flash_read16
  157. #define flash_read32 __flash_read32
  158. #define flash_read64 __flash_read64
  159. #endif
  160. /*-----------------------------------------------------------------------
  161. */
  162. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  163. flash_info_t *flash_get_info(ulong base)
  164. {
  165. int i;
  166. flash_info_t *info = NULL;
  167. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  168. info = & flash_info[i];
  169. if (info->size && info->start[0] <= base &&
  170. base <= info->start[0] + info->size - 1)
  171. break;
  172. }
  173. return info;
  174. }
  175. #endif
  176. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  177. {
  178. if (sect != (info->sector_count - 1))
  179. return info->start[sect + 1] - info->start[sect];
  180. else
  181. return info->start[0] + info->size - info->start[sect];
  182. }
  183. /*-----------------------------------------------------------------------
  184. * create an address based on the offset and the port width
  185. */
  186. static inline void *
  187. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  188. {
  189. unsigned int byte_offset = offset * info->portwidth / info->chipwidth;
  190. unsigned int addr = (info->start[sect] + byte_offset);
  191. unsigned int mask = 0xffffffff << (info->portwidth - 1);
  192. return (void *)(addr & mask);
  193. }
  194. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  195. unsigned int offset, void *addr)
  196. {
  197. }
  198. /*-----------------------------------------------------------------------
  199. * make a proper sized command based on the port and chip widths
  200. */
  201. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  202. {
  203. int i;
  204. int cword_offset;
  205. int cp_offset;
  206. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  207. u32 cmd_le = cpu_to_le32(cmd);
  208. #endif
  209. uchar val;
  210. uchar *cp = (uchar *) cmdbuf;
  211. for (i = info->portwidth; i > 0; i--){
  212. cword_offset = (info->portwidth-i)%info->chipwidth;
  213. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  214. cp_offset = info->portwidth - i;
  215. val = *((uchar*)&cmd_le + cword_offset);
  216. #else
  217. cp_offset = i - 1;
  218. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  219. #endif
  220. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  221. }
  222. }
  223. #ifdef DEBUG
  224. /*-----------------------------------------------------------------------
  225. * Debug support
  226. */
  227. static void print_longlong (char *str, unsigned long long data)
  228. {
  229. int i;
  230. char *cp;
  231. cp = (char *) &data;
  232. for (i = 0; i < 8; i++)
  233. sprintf (&str[i * 2], "%2.2x", *cp++);
  234. }
  235. static void flash_printqry (struct cfi_qry *qry)
  236. {
  237. u8 *p = (u8 *)qry;
  238. int x, y;
  239. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  240. debug("%02x : ", x);
  241. for (y = 0; y < 16; y++)
  242. debug("%2.2x ", p[x + y]);
  243. debug(" ");
  244. for (y = 0; y < 16; y++) {
  245. unsigned char c = p[x + y];
  246. if (c >= 0x20 && c <= 0x7e)
  247. debug("%c", c);
  248. else
  249. debug(".");
  250. }
  251. debug("\n");
  252. }
  253. }
  254. #endif
  255. /*-----------------------------------------------------------------------
  256. * read a character at a port width address
  257. */
  258. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  259. {
  260. uchar *cp;
  261. uchar retval;
  262. cp = flash_map (info, 0, offset);
  263. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  264. retval = flash_read8(cp);
  265. #else
  266. retval = flash_read8(cp + info->portwidth - 1);
  267. #endif
  268. flash_unmap (info, 0, offset, cp);
  269. return retval;
  270. }
  271. /*-----------------------------------------------------------------------
  272. * read a word at a port width address, assume 16bit bus
  273. */
  274. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  275. {
  276. ushort *addr, retval;
  277. addr = flash_map (info, 0, offset);
  278. retval = flash_read16 (addr);
  279. flash_unmap (info, 0, offset, addr);
  280. return retval;
  281. }
  282. /*-----------------------------------------------------------------------
  283. * read a long word by picking the least significant byte of each maximum
  284. * port size word. Swap for ppc format.
  285. */
  286. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  287. uint offset)
  288. {
  289. uchar *addr;
  290. ulong retval;
  291. #ifdef DEBUG
  292. int x;
  293. #endif
  294. addr = flash_map (info, sect, offset);
  295. #ifdef DEBUG
  296. debug ("long addr is at %p info->portwidth = %d\n", addr,
  297. info->portwidth);
  298. for (x = 0; x < 4 * info->portwidth; x++) {
  299. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  300. }
  301. #endif
  302. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  303. retval = ((flash_read8(addr) << 16) |
  304. (flash_read8(addr + info->portwidth) << 24) |
  305. (flash_read8(addr + 2 * info->portwidth)) |
  306. (flash_read8(addr + 3 * info->portwidth) << 8));
  307. #else
  308. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  309. (flash_read8(addr + info->portwidth - 1) << 16) |
  310. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  311. (flash_read8(addr + 3 * info->portwidth - 1)));
  312. #endif
  313. flash_unmap(info, sect, offset, addr);
  314. return retval;
  315. }
  316. /*
  317. * Write a proper sized command to the correct address
  318. */
  319. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  320. uint offset, u32 cmd)
  321. {
  322. void *addr;
  323. cfiword_t cword;
  324. addr = flash_map (info, sect, offset);
  325. flash_make_cmd (info, cmd, &cword);
  326. switch (info->portwidth) {
  327. case FLASH_CFI_8BIT:
  328. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  329. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  330. flash_write8(cword.c, addr);
  331. break;
  332. case FLASH_CFI_16BIT:
  333. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  334. cmd, cword.w,
  335. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  336. flash_write16(cword.w, addr);
  337. break;
  338. case FLASH_CFI_32BIT:
  339. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  340. cmd, cword.l,
  341. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  342. flash_write32(cword.l, addr);
  343. break;
  344. case FLASH_CFI_64BIT:
  345. #ifdef DEBUG
  346. {
  347. char str[20];
  348. print_longlong (str, cword.ll);
  349. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  350. addr, cmd, str,
  351. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  352. }
  353. #endif
  354. flash_write64(cword.ll, addr);
  355. break;
  356. default:
  357. printf("fwc: Unknown port width %d\n", info->portwidth);
  358. }
  359. /* Ensure all the instructions are fully finished */
  360. sync();
  361. flash_unmap(info, sect, offset, addr);
  362. }
  363. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  364. {
  365. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  366. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  367. }
  368. /*-----------------------------------------------------------------------
  369. */
  370. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  371. uint offset, uchar cmd)
  372. {
  373. void *addr;
  374. cfiword_t cword;
  375. int retval;
  376. addr = flash_map (info, sect, offset);
  377. flash_make_cmd (info, cmd, &cword);
  378. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  379. switch (info->portwidth) {
  380. case FLASH_CFI_8BIT:
  381. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  382. retval = (flash_read8(addr) == cword.c);
  383. break;
  384. case FLASH_CFI_16BIT:
  385. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  386. retval = (flash_read16(addr) == cword.w);
  387. break;
  388. case FLASH_CFI_32BIT:
  389. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  390. retval = (flash_read32(addr) == cword.l);
  391. break;
  392. case FLASH_CFI_64BIT:
  393. #ifdef DEBUG
  394. {
  395. char str1[20];
  396. char str2[20];
  397. print_longlong (str1, flash_read64(addr));
  398. print_longlong (str2, cword.ll);
  399. debug ("is= %s %s\n", str1, str2);
  400. }
  401. #endif
  402. retval = (flash_read64(addr) == cword.ll);
  403. break;
  404. default:
  405. retval = 0;
  406. break;
  407. }
  408. flash_unmap(info, sect, offset, addr);
  409. return retval;
  410. }
  411. /*-----------------------------------------------------------------------
  412. */
  413. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  414. uint offset, uchar cmd)
  415. {
  416. void *addr;
  417. cfiword_t cword;
  418. int retval;
  419. addr = flash_map (info, sect, offset);
  420. flash_make_cmd (info, cmd, &cword);
  421. switch (info->portwidth) {
  422. case FLASH_CFI_8BIT:
  423. retval = ((flash_read8(addr) & cword.c) == cword.c);
  424. break;
  425. case FLASH_CFI_16BIT:
  426. retval = ((flash_read16(addr) & cword.w) == cword.w);
  427. break;
  428. case FLASH_CFI_32BIT:
  429. retval = ((flash_read32(addr) & cword.l) == cword.l);
  430. break;
  431. case FLASH_CFI_64BIT:
  432. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  433. break;
  434. default:
  435. retval = 0;
  436. break;
  437. }
  438. flash_unmap(info, sect, offset, addr);
  439. return retval;
  440. }
  441. /*-----------------------------------------------------------------------
  442. */
  443. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  444. uint offset, uchar cmd)
  445. {
  446. void *addr;
  447. cfiword_t cword;
  448. int retval;
  449. addr = flash_map (info, sect, offset);
  450. flash_make_cmd (info, cmd, &cword);
  451. switch (info->portwidth) {
  452. case FLASH_CFI_8BIT:
  453. retval = flash_read8(addr) != flash_read8(addr);
  454. break;
  455. case FLASH_CFI_16BIT:
  456. retval = flash_read16(addr) != flash_read16(addr);
  457. break;
  458. case FLASH_CFI_32BIT:
  459. retval = flash_read32(addr) != flash_read32(addr);
  460. break;
  461. case FLASH_CFI_64BIT:
  462. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  463. (flash_read32(addr+4) != flash_read32(addr+4)) );
  464. break;
  465. default:
  466. retval = 0;
  467. break;
  468. }
  469. flash_unmap(info, sect, offset, addr);
  470. return retval;
  471. }
  472. /*
  473. * flash_is_busy - check to see if the flash is busy
  474. *
  475. * This routine checks the status of the chip and returns true if the
  476. * chip is busy.
  477. */
  478. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  479. {
  480. int retval;
  481. switch (info->vendor) {
  482. case CFI_CMDSET_INTEL_PROG_REGIONS:
  483. case CFI_CMDSET_INTEL_STANDARD:
  484. case CFI_CMDSET_INTEL_EXTENDED:
  485. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  486. break;
  487. case CFI_CMDSET_AMD_STANDARD:
  488. case CFI_CMDSET_AMD_EXTENDED:
  489. #ifdef CONFIG_FLASH_CFI_LEGACY
  490. case CFI_CMDSET_AMD_LEGACY:
  491. #endif
  492. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  493. break;
  494. default:
  495. retval = 0;
  496. }
  497. debug ("flash_is_busy: %d\n", retval);
  498. return retval;
  499. }
  500. /*-----------------------------------------------------------------------
  501. * wait for XSR.7 to be set. Time out with an error if it does not.
  502. * This routine does not set the flash to read-array mode.
  503. */
  504. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  505. ulong tout, char *prompt)
  506. {
  507. ulong start;
  508. #if CONFIG_SYS_HZ != 1000
  509. if ((ulong)CONFIG_SYS_HZ > 100000)
  510. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  511. else
  512. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  513. #endif
  514. /* Wait for command completion */
  515. #ifdef CONFIG_SYS_LOW_RES_TIMER
  516. reset_timer();
  517. #endif
  518. start = get_timer (0);
  519. WATCHDOG_RESET();
  520. while (flash_is_busy (info, sector)) {
  521. if (get_timer (start) > tout) {
  522. printf ("Flash %s timeout at address %lx data %lx\n",
  523. prompt, info->start[sector],
  524. flash_read_long (info, sector, 0));
  525. flash_write_cmd (info, sector, 0, info->cmd_reset);
  526. return ERR_TIMOUT;
  527. }
  528. udelay (1); /* also triggers watchdog */
  529. }
  530. return ERR_OK;
  531. }
  532. /*-----------------------------------------------------------------------
  533. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  534. * do a full status check.
  535. *
  536. * This routine sets the flash to read-array mode.
  537. */
  538. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  539. ulong tout, char *prompt)
  540. {
  541. int retcode;
  542. retcode = flash_status_check (info, sector, tout, prompt);
  543. switch (info->vendor) {
  544. case CFI_CMDSET_INTEL_PROG_REGIONS:
  545. case CFI_CMDSET_INTEL_EXTENDED:
  546. case CFI_CMDSET_INTEL_STANDARD:
  547. if ((retcode != ERR_OK)
  548. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  549. retcode = ERR_INVAL;
  550. printf ("Flash %s error at address %lx\n", prompt,
  551. info->start[sector]);
  552. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  553. FLASH_STATUS_PSLBS)) {
  554. puts ("Command Sequence Error.\n");
  555. } else if (flash_isset (info, sector, 0,
  556. FLASH_STATUS_ECLBS)) {
  557. puts ("Block Erase Error.\n");
  558. retcode = ERR_NOT_ERASED;
  559. } else if (flash_isset (info, sector, 0,
  560. FLASH_STATUS_PSLBS)) {
  561. puts ("Locking Error\n");
  562. }
  563. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  564. puts ("Block locked.\n");
  565. retcode = ERR_PROTECTED;
  566. }
  567. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  568. puts ("Vpp Low Error.\n");
  569. }
  570. flash_write_cmd (info, sector, 0, info->cmd_reset);
  571. udelay(1);
  572. break;
  573. default:
  574. break;
  575. }
  576. return retcode;
  577. }
  578. static int use_flash_status_poll(flash_info_t *info)
  579. {
  580. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  581. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  582. info->vendor == CFI_CMDSET_AMD_STANDARD)
  583. return 1;
  584. #endif
  585. return 0;
  586. }
  587. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  588. ulong tout, char *prompt)
  589. {
  590. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  591. ulong start;
  592. int ready;
  593. #if CONFIG_SYS_HZ != 1000
  594. if ((ulong)CONFIG_SYS_HZ > 100000)
  595. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  596. else
  597. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  598. #endif
  599. /* Wait for command completion */
  600. #ifdef CONFIG_SYS_LOW_RES_TIMER
  601. reset_timer();
  602. #endif
  603. start = get_timer(0);
  604. WATCHDOG_RESET();
  605. while (1) {
  606. switch (info->portwidth) {
  607. case FLASH_CFI_8BIT:
  608. ready = flash_read8(dst) == flash_read8(src);
  609. break;
  610. case FLASH_CFI_16BIT:
  611. ready = flash_read16(dst) == flash_read16(src);
  612. break;
  613. case FLASH_CFI_32BIT:
  614. ready = flash_read32(dst) == flash_read32(src);
  615. break;
  616. case FLASH_CFI_64BIT:
  617. ready = flash_read64(dst) == flash_read64(src);
  618. break;
  619. default:
  620. ready = 0;
  621. break;
  622. }
  623. if (ready)
  624. break;
  625. if (get_timer(start) > tout) {
  626. printf("Flash %s timeout at address %lx data %lx\n",
  627. prompt, (ulong)dst, (ulong)flash_read8(dst));
  628. return ERR_TIMOUT;
  629. }
  630. udelay(1); /* also triggers watchdog */
  631. }
  632. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  633. return ERR_OK;
  634. }
  635. /*-----------------------------------------------------------------------
  636. */
  637. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  638. {
  639. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  640. unsigned short w;
  641. unsigned int l;
  642. unsigned long long ll;
  643. #endif
  644. switch (info->portwidth) {
  645. case FLASH_CFI_8BIT:
  646. cword->c = c;
  647. break;
  648. case FLASH_CFI_16BIT:
  649. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  650. w = c;
  651. w <<= 8;
  652. cword->w = (cword->w >> 8) | w;
  653. #else
  654. cword->w = (cword->w << 8) | c;
  655. #endif
  656. break;
  657. case FLASH_CFI_32BIT:
  658. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  659. l = c;
  660. l <<= 24;
  661. cword->l = (cword->l >> 8) | l;
  662. #else
  663. cword->l = (cword->l << 8) | c;
  664. #endif
  665. break;
  666. case FLASH_CFI_64BIT:
  667. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  668. ll = c;
  669. ll <<= 56;
  670. cword->ll = (cword->ll >> 8) | ll;
  671. #else
  672. cword->ll = (cword->ll << 8) | c;
  673. #endif
  674. break;
  675. }
  676. }
  677. /*
  678. * Loop through the sector table starting from the previously found sector.
  679. * Searches forwards or backwards, dependent on the passed address.
  680. */
  681. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  682. {
  683. static flash_sect_t saved_sector; /* previously found sector */
  684. flash_sect_t sector = saved_sector;
  685. while ((info->start[sector] < addr)
  686. && (sector < info->sector_count - 1))
  687. sector++;
  688. while ((info->start[sector] > addr) && (sector > 0))
  689. /*
  690. * also decrements the sector in case of an overshot
  691. * in the first loop
  692. */
  693. sector--;
  694. saved_sector = sector;
  695. return sector;
  696. }
  697. /*-----------------------------------------------------------------------
  698. */
  699. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  700. cfiword_t cword)
  701. {
  702. void *dstaddr = (void *)dest;
  703. int flag;
  704. flash_sect_t sect = 0;
  705. char sect_found = 0;
  706. /* Check if Flash is (sufficiently) erased */
  707. switch (info->portwidth) {
  708. case FLASH_CFI_8BIT:
  709. debug("%s: 8-bit 0x%02x\n", __func__, cword.c);
  710. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  711. break;
  712. case FLASH_CFI_16BIT:
  713. debug("%s: 16-bit 0x%04x\n", __func__, cword.w);
  714. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  715. break;
  716. case FLASH_CFI_32BIT:
  717. debug("%s: 32-bit 0x%08lx\n", __func__, cword.l);
  718. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  719. break;
  720. case FLASH_CFI_64BIT:
  721. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  722. break;
  723. default:
  724. flag = 0;
  725. break;
  726. }
  727. if (!flag)
  728. return ERR_NOT_ERASED;
  729. /* Disable interrupts which might cause a timeout here */
  730. flag = disable_interrupts ();
  731. switch (info->vendor) {
  732. case CFI_CMDSET_INTEL_PROG_REGIONS:
  733. case CFI_CMDSET_INTEL_EXTENDED:
  734. case CFI_CMDSET_INTEL_STANDARD:
  735. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  736. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  737. break;
  738. case CFI_CMDSET_AMD_EXTENDED:
  739. case CFI_CMDSET_AMD_STANDARD:
  740. sect = find_sector(info, dest);
  741. flash_unlock_seq (info, sect);
  742. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  743. sect_found = 1;
  744. break;
  745. #ifdef CONFIG_FLASH_CFI_LEGACY
  746. case CFI_CMDSET_AMD_LEGACY:
  747. sect = find_sector(info, dest);
  748. flash_unlock_seq (info, 0);
  749. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  750. sect_found = 1;
  751. break;
  752. #endif
  753. }
  754. switch (info->portwidth) {
  755. case FLASH_CFI_8BIT:
  756. flash_write8(cword.c, dstaddr);
  757. break;
  758. case FLASH_CFI_16BIT:
  759. flash_write16(cword.w, dstaddr);
  760. break;
  761. case FLASH_CFI_32BIT:
  762. flash_write32(cword.l, dstaddr);
  763. break;
  764. case FLASH_CFI_64BIT:
  765. flash_write64(cword.ll, dstaddr);
  766. break;
  767. }
  768. /* re-enable interrupts if necessary */
  769. if (flag)
  770. enable_interrupts ();
  771. if (!sect_found)
  772. sect = find_sector (info, dest);
  773. if (use_flash_status_poll(info))
  774. return flash_status_poll(info, &cword, dstaddr,
  775. info->write_tout, "write");
  776. else
  777. return flash_full_status_check(info, sect,
  778. info->write_tout, "write");
  779. }
  780. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  781. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  782. int len)
  783. {
  784. flash_sect_t sector;
  785. int cnt;
  786. int retcode;
  787. void *src = cp;
  788. void *dst = (void *)dest;
  789. void *dst2 = dst;
  790. int flag = 1;
  791. uint offset = 0;
  792. unsigned int shift;
  793. uchar write_cmd;
  794. switch (info->portwidth) {
  795. case FLASH_CFI_8BIT:
  796. shift = 0;
  797. break;
  798. case FLASH_CFI_16BIT:
  799. shift = 1;
  800. break;
  801. case FLASH_CFI_32BIT:
  802. shift = 2;
  803. break;
  804. case FLASH_CFI_64BIT:
  805. shift = 3;
  806. break;
  807. default:
  808. retcode = ERR_INVAL;
  809. goto out_unmap;
  810. }
  811. cnt = len >> shift;
  812. while ((cnt-- > 0) && (flag == 1)) {
  813. switch (info->portwidth) {
  814. case FLASH_CFI_8BIT:
  815. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  816. flash_read8(src));
  817. src += 1, dst2 += 1;
  818. break;
  819. case FLASH_CFI_16BIT:
  820. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  821. flash_read16(src));
  822. src += 2, dst2 += 2;
  823. break;
  824. case FLASH_CFI_32BIT:
  825. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  826. flash_read32(src));
  827. src += 4, dst2 += 4;
  828. break;
  829. case FLASH_CFI_64BIT:
  830. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  831. flash_read64(src));
  832. src += 8, dst2 += 8;
  833. break;
  834. }
  835. }
  836. if (!flag) {
  837. retcode = ERR_NOT_ERASED;
  838. goto out_unmap;
  839. }
  840. src = cp;
  841. sector = find_sector (info, dest);
  842. switch (info->vendor) {
  843. case CFI_CMDSET_INTEL_PROG_REGIONS:
  844. case CFI_CMDSET_INTEL_STANDARD:
  845. case CFI_CMDSET_INTEL_EXTENDED:
  846. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  847. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  848. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  849. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  850. flash_write_cmd (info, sector, 0, write_cmd);
  851. retcode = flash_status_check (info, sector,
  852. info->buffer_write_tout,
  853. "write to buffer");
  854. if (retcode == ERR_OK) {
  855. /* reduce the number of loops by the width of
  856. * the port */
  857. cnt = len >> shift;
  858. flash_write_cmd (info, sector, 0, cnt - 1);
  859. while (cnt-- > 0) {
  860. switch (info->portwidth) {
  861. case FLASH_CFI_8BIT:
  862. flash_write8(flash_read8(src), dst);
  863. src += 1, dst += 1;
  864. break;
  865. case FLASH_CFI_16BIT:
  866. flash_write16(flash_read16(src), dst);
  867. src += 2, dst += 2;
  868. break;
  869. case FLASH_CFI_32BIT:
  870. flash_write32(flash_read32(src), dst);
  871. src += 4, dst += 4;
  872. break;
  873. case FLASH_CFI_64BIT:
  874. flash_write64(flash_read64(src), dst);
  875. src += 8, dst += 8;
  876. break;
  877. default:
  878. retcode = ERR_INVAL;
  879. goto out_unmap;
  880. }
  881. }
  882. flash_write_cmd (info, sector, 0,
  883. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  884. retcode = flash_full_status_check (
  885. info, sector, info->buffer_write_tout,
  886. "buffer write");
  887. }
  888. break;
  889. case CFI_CMDSET_AMD_STANDARD:
  890. case CFI_CMDSET_AMD_EXTENDED:
  891. flash_unlock_seq(info,0);
  892. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  893. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  894. #endif
  895. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  896. cnt = len >> shift;
  897. flash_write_cmd(info, sector, offset, cnt - 1);
  898. switch (info->portwidth) {
  899. case FLASH_CFI_8BIT:
  900. while (cnt-- > 0) {
  901. flash_write8(flash_read8(src), dst);
  902. src += 1, dst += 1;
  903. }
  904. break;
  905. case FLASH_CFI_16BIT:
  906. while (cnt-- > 0) {
  907. flash_write16(flash_read16(src), dst);
  908. src += 2, dst += 2;
  909. }
  910. break;
  911. case FLASH_CFI_32BIT:
  912. while (cnt-- > 0) {
  913. flash_write32(flash_read32(src), dst);
  914. src += 4, dst += 4;
  915. }
  916. break;
  917. case FLASH_CFI_64BIT:
  918. while (cnt-- > 0) {
  919. flash_write64(flash_read64(src), dst);
  920. src += 8, dst += 8;
  921. }
  922. break;
  923. default:
  924. retcode = ERR_INVAL;
  925. goto out_unmap;
  926. }
  927. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  928. if (use_flash_status_poll(info))
  929. retcode = flash_status_poll(info, src - (1 << shift),
  930. dst - (1 << shift),
  931. info->buffer_write_tout,
  932. "buffer write");
  933. else
  934. retcode = flash_full_status_check(info, sector,
  935. info->buffer_write_tout,
  936. "buffer write");
  937. break;
  938. default:
  939. debug ("Unknown Command Set\n");
  940. retcode = ERR_INVAL;
  941. break;
  942. }
  943. out_unmap:
  944. return retcode;
  945. }
  946. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  947. /*-----------------------------------------------------------------------
  948. */
  949. int flash_erase (flash_info_t * info, int s_first, int s_last)
  950. {
  951. int rcode = 0;
  952. int prot;
  953. flash_sect_t sect;
  954. int st;
  955. debug("%s: erasing sectors %d to %d\n", __func__, s_first, s_last);
  956. if (info->flash_id != FLASH_MAN_CFI) {
  957. puts ("Can't erase unknown flash type - aborted\n");
  958. return 1;
  959. }
  960. if ((s_first < 0) || (s_first > s_last)) {
  961. puts ("- no sectors to erase\n");
  962. return 1;
  963. }
  964. prot = 0;
  965. for (sect = s_first; sect <= s_last; ++sect) {
  966. if (info->protect[sect]) {
  967. prot++;
  968. }
  969. }
  970. if (prot) {
  971. printf ("- Warning: %d protected sectors will not be erased!\n",
  972. prot);
  973. } else if (flash_verbose) {
  974. putc ('\n');
  975. }
  976. for (sect = s_first; sect <= s_last; sect++) {
  977. if (ctrlc()) {
  978. printf("\n");
  979. return 1;
  980. }
  981. if (info->protect[sect] == 0) { /* not protected */
  982. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  983. int k;
  984. int size;
  985. int erased;
  986. u32 *flash;
  987. /*
  988. * Check if whole sector is erased
  989. */
  990. size = flash_sector_size(info, sect);
  991. erased = 1;
  992. flash = (u32 *)info->start[sect];
  993. /* divide by 4 for longword access */
  994. size = size >> 2;
  995. for (k = 0; k < size; k++) {
  996. if (flash_read32(flash++) != 0xffffffff) {
  997. erased = 0;
  998. break;
  999. }
  1000. }
  1001. if (erased) {
  1002. if (flash_verbose)
  1003. putc(',');
  1004. continue;
  1005. }
  1006. #endif
  1007. switch (info->vendor) {
  1008. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1009. case CFI_CMDSET_INTEL_STANDARD:
  1010. case CFI_CMDSET_INTEL_EXTENDED:
  1011. flash_write_cmd (info, sect, 0,
  1012. FLASH_CMD_CLEAR_STATUS);
  1013. flash_write_cmd (info, sect, 0,
  1014. FLASH_CMD_BLOCK_ERASE);
  1015. flash_write_cmd (info, sect, 0,
  1016. FLASH_CMD_ERASE_CONFIRM);
  1017. break;
  1018. case CFI_CMDSET_AMD_STANDARD:
  1019. case CFI_CMDSET_AMD_EXTENDED:
  1020. flash_unlock_seq (info, sect);
  1021. flash_write_cmd (info, sect,
  1022. info->addr_unlock1,
  1023. AMD_CMD_ERASE_START);
  1024. flash_unlock_seq (info, sect);
  1025. flash_write_cmd (info, sect, 0,
  1026. info->cmd_erase_sector);
  1027. break;
  1028. #ifdef CONFIG_FLASH_CFI_LEGACY
  1029. case CFI_CMDSET_AMD_LEGACY:
  1030. flash_unlock_seq (info, 0);
  1031. flash_write_cmd (info, 0, info->addr_unlock1,
  1032. AMD_CMD_ERASE_START);
  1033. flash_unlock_seq (info, 0);
  1034. flash_write_cmd (info, sect, 0,
  1035. AMD_CMD_ERASE_SECTOR);
  1036. break;
  1037. #endif
  1038. default:
  1039. debug ("Unkown flash vendor %d\n",
  1040. info->vendor);
  1041. break;
  1042. }
  1043. if (use_flash_status_poll(info)) {
  1044. cfiword_t cword;
  1045. void *dest;
  1046. cword.ll = 0xffffffffffffffffULL;
  1047. dest = flash_map(info, sect, 0);
  1048. st = flash_status_poll(info, &cword, dest,
  1049. info->erase_blk_tout, "erase");
  1050. flash_unmap(info, sect, 0, dest);
  1051. } else
  1052. st = flash_full_status_check(info, sect,
  1053. info->erase_blk_tout,
  1054. "erase");
  1055. if (st)
  1056. rcode = 1;
  1057. else if (flash_verbose)
  1058. putc ('.');
  1059. } else {
  1060. debug("\nSector %d is protected.\n",
  1061. info->protect[sect]);
  1062. }
  1063. }
  1064. if (flash_verbose)
  1065. puts (" done\n");
  1066. return rcode;
  1067. }
  1068. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1069. static int sector_erased(flash_info_t *info, int i)
  1070. {
  1071. int k;
  1072. int size;
  1073. u32 *flash;
  1074. /*
  1075. * Check if whole sector is erased
  1076. */
  1077. size = flash_sector_size(info, i);
  1078. flash = (u32 *)info->start[i];
  1079. /* divide by 4 for longword access */
  1080. size = size >> 2;
  1081. for (k = 0; k < size; k++) {
  1082. if (flash_read32(flash++) != 0xffffffff)
  1083. return 0; /* not erased */
  1084. }
  1085. return 1; /* erased */
  1086. }
  1087. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1088. void flash_print_info (flash_info_t * info)
  1089. {
  1090. int i;
  1091. if (info->flash_id != FLASH_MAN_CFI) {
  1092. puts ("missing or unknown FLASH type\n");
  1093. return;
  1094. }
  1095. printf ("%s flash (%d x %d)",
  1096. info->name,
  1097. (info->portwidth << 3), (info->chipwidth << 3));
  1098. if (info->size < 1024*1024)
  1099. printf (" Size: %ld kB in %d Sectors\n",
  1100. info->size >> 10, info->sector_count);
  1101. else
  1102. printf (" Size: %ld MB in %d Sectors\n",
  1103. info->size >> 20, info->sector_count);
  1104. printf (" ");
  1105. switch (info->vendor) {
  1106. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1107. printf ("Intel Prog Regions");
  1108. break;
  1109. case CFI_CMDSET_INTEL_STANDARD:
  1110. printf ("Intel Standard");
  1111. break;
  1112. case CFI_CMDSET_INTEL_EXTENDED:
  1113. printf ("Intel Extended");
  1114. break;
  1115. case CFI_CMDSET_AMD_STANDARD:
  1116. printf ("AMD Standard");
  1117. break;
  1118. case CFI_CMDSET_AMD_EXTENDED:
  1119. printf ("AMD Extended");
  1120. break;
  1121. #ifdef CONFIG_FLASH_CFI_LEGACY
  1122. case CFI_CMDSET_AMD_LEGACY:
  1123. printf ("AMD Legacy");
  1124. break;
  1125. #endif
  1126. default:
  1127. printf ("Unknown (%d)", info->vendor);
  1128. break;
  1129. }
  1130. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1131. info->manufacturer_id);
  1132. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1133. info->device_id);
  1134. if ((info->device_id & 0xff) == 0x7E) {
  1135. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1136. info->device_id2);
  1137. }
  1138. if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
  1139. printf("\n Advanced Sector Protection (PPB) enabled");
  1140. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1141. info->erase_blk_tout,
  1142. info->write_tout);
  1143. if (info->buffer_size > 1) {
  1144. printf (" Buffer write timeout: %ld ms, "
  1145. "buffer size: %d bytes\n",
  1146. info->buffer_write_tout,
  1147. info->buffer_size);
  1148. }
  1149. puts ("\n Sector Start Addresses:");
  1150. for (i = 0; i < info->sector_count; ++i) {
  1151. if (ctrlc())
  1152. break;
  1153. if ((i % 5) == 0)
  1154. putc('\n');
  1155. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1156. /* print empty and read-only info */
  1157. printf (" %08lX %c %s ",
  1158. info->start[i],
  1159. sector_erased(info, i) ? 'E' : ' ',
  1160. info->protect[i] ? "RO" : " ");
  1161. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1162. printf (" %08lX %s ",
  1163. info->start[i],
  1164. info->protect[i] ? "RO" : " ");
  1165. #endif
  1166. }
  1167. putc ('\n');
  1168. return;
  1169. }
  1170. /*-----------------------------------------------------------------------
  1171. * This is used in a few places in write_buf() to show programming
  1172. * progress. Making it a function is nasty because it needs to do side
  1173. * effect updates to digit and dots. Repeated code is nasty too, so
  1174. * we define it once here.
  1175. */
  1176. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1177. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1178. if (flash_verbose) { \
  1179. dots -= dots_sub; \
  1180. if ((scale > 0) && (dots <= 0)) { \
  1181. if ((digit % 5) == 0) \
  1182. printf ("%d", digit / 5); \
  1183. else \
  1184. putc ('.'); \
  1185. digit--; \
  1186. dots += scale; \
  1187. } \
  1188. }
  1189. #else
  1190. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1191. #endif
  1192. /*-----------------------------------------------------------------------
  1193. * Copy memory to flash, returns:
  1194. * 0 - OK
  1195. * 1 - write timeout
  1196. * 2 - Flash not erased
  1197. */
  1198. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1199. {
  1200. ulong wp;
  1201. uchar *p;
  1202. int aln;
  1203. cfiword_t cword;
  1204. int i, rc;
  1205. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1206. int buffered_size;
  1207. #endif
  1208. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1209. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1210. int scale = 0;
  1211. int dots = 0;
  1212. /*
  1213. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1214. */
  1215. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1216. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1217. CONFIG_FLASH_SHOW_PROGRESS);
  1218. }
  1219. #endif
  1220. /* get lower aligned address */
  1221. wp = (addr & ~(info->portwidth - 1));
  1222. /* handle unaligned start */
  1223. if ((aln = addr - wp) != 0) {
  1224. cword.l = 0;
  1225. p = (uchar *)wp;
  1226. for (i = 0; i < aln; ++i)
  1227. flash_add_byte (info, &cword, flash_read8(p + i));
  1228. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1229. flash_add_byte (info, &cword, *src++);
  1230. cnt--;
  1231. }
  1232. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1233. flash_add_byte (info, &cword, flash_read8(p + i));
  1234. rc = flash_write_cfiword (info, wp, cword);
  1235. if (rc != 0)
  1236. return rc;
  1237. wp += i;
  1238. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1239. }
  1240. /* handle the aligned part */
  1241. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1242. buffered_size = (info->portwidth / info->chipwidth);
  1243. buffered_size *= info->buffer_size;
  1244. while (cnt >= info->portwidth) {
  1245. /* prohibit buffer write when buffer_size is 1 */
  1246. if (info->buffer_size == 1) {
  1247. cword.l = 0;
  1248. for (i = 0; i < info->portwidth; i++)
  1249. flash_add_byte (info, &cword, *src++);
  1250. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1251. return rc;
  1252. wp += info->portwidth;
  1253. cnt -= info->portwidth;
  1254. continue;
  1255. }
  1256. /* write buffer until next buffered_size aligned boundary */
  1257. i = buffered_size - (wp % buffered_size);
  1258. if (i > cnt)
  1259. i = cnt;
  1260. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1261. return rc;
  1262. i -= i & (info->portwidth - 1);
  1263. wp += i;
  1264. src += i;
  1265. cnt -= i;
  1266. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1267. /* Only check every once in a while */
  1268. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1269. return ERR_ABORTED;
  1270. }
  1271. #else
  1272. while (cnt >= info->portwidth) {
  1273. cword.l = 0;
  1274. for (i = 0; i < info->portwidth; i++) {
  1275. flash_add_byte (info, &cword, *src++);
  1276. }
  1277. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1278. return rc;
  1279. wp += info->portwidth;
  1280. cnt -= info->portwidth;
  1281. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1282. /* Only check every once in a while */
  1283. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1284. return ERR_ABORTED;
  1285. }
  1286. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1287. if (cnt == 0) {
  1288. return (0);
  1289. }
  1290. /*
  1291. * handle unaligned tail bytes
  1292. */
  1293. cword.l = 0;
  1294. p = (uchar *)wp;
  1295. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1296. flash_add_byte (info, &cword, *src++);
  1297. --cnt;
  1298. }
  1299. for (; i < info->portwidth; ++i)
  1300. flash_add_byte (info, &cword, flash_read8(p + i));
  1301. return flash_write_cfiword (info, wp, cword);
  1302. }
  1303. static inline int manufact_match(flash_info_t *info, u32 manu)
  1304. {
  1305. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1306. }
  1307. /*-----------------------------------------------------------------------
  1308. */
  1309. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1310. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1311. {
  1312. if (manufact_match(info, INTEL_MANUFACT)
  1313. && info->device_id == NUMONYX_256MBIT) {
  1314. /*
  1315. * see errata called
  1316. * "Numonyx Axcell P33/P30 Specification Update" :)
  1317. */
  1318. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1319. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1320. prot)) {
  1321. /*
  1322. * cmd must come before FLASH_CMD_PROTECT + 20us
  1323. * Disable interrupts which might cause a timeout here.
  1324. */
  1325. int flag = disable_interrupts();
  1326. unsigned short cmd;
  1327. if (prot)
  1328. cmd = FLASH_CMD_PROTECT_SET;
  1329. else
  1330. cmd = FLASH_CMD_PROTECT_CLEAR;
  1331. flash_write_cmd(info, sector, 0,
  1332. FLASH_CMD_PROTECT);
  1333. flash_write_cmd(info, sector, 0, cmd);
  1334. /* re-enable interrupts if necessary */
  1335. if (flag)
  1336. enable_interrupts();
  1337. }
  1338. return 1;
  1339. }
  1340. return 0;
  1341. }
  1342. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1343. {
  1344. int retcode = 0;
  1345. switch (info->vendor) {
  1346. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1347. case CFI_CMDSET_INTEL_STANDARD:
  1348. case CFI_CMDSET_INTEL_EXTENDED:
  1349. if (!cfi_protect_bugfix(info, sector, prot)) {
  1350. flash_write_cmd(info, sector, 0,
  1351. FLASH_CMD_CLEAR_STATUS);
  1352. flash_write_cmd(info, sector, 0,
  1353. FLASH_CMD_PROTECT);
  1354. if (prot)
  1355. flash_write_cmd(info, sector, 0,
  1356. FLASH_CMD_PROTECT_SET);
  1357. else
  1358. flash_write_cmd(info, sector, 0,
  1359. FLASH_CMD_PROTECT_CLEAR);
  1360. }
  1361. break;
  1362. case CFI_CMDSET_AMD_EXTENDED:
  1363. case CFI_CMDSET_AMD_STANDARD:
  1364. /* U-Boot only checks the first byte */
  1365. if (manufact_match(info, ATM_MANUFACT)) {
  1366. if (prot) {
  1367. flash_unlock_seq (info, 0);
  1368. flash_write_cmd (info, 0,
  1369. info->addr_unlock1,
  1370. ATM_CMD_SOFTLOCK_START);
  1371. flash_unlock_seq (info, 0);
  1372. flash_write_cmd (info, sector, 0,
  1373. ATM_CMD_LOCK_SECT);
  1374. } else {
  1375. flash_write_cmd (info, 0,
  1376. info->addr_unlock1,
  1377. AMD_CMD_UNLOCK_START);
  1378. if (info->device_id == ATM_ID_BV6416)
  1379. flash_write_cmd (info, sector,
  1380. 0, ATM_CMD_UNLOCK_SECT);
  1381. }
  1382. }
  1383. if (info->legacy_unlock) {
  1384. int flag = disable_interrupts();
  1385. int lock_flag;
  1386. flash_unlock_seq(info, 0);
  1387. flash_write_cmd(info, 0, info->addr_unlock1,
  1388. AMD_CMD_SET_PPB_ENTRY);
  1389. lock_flag = flash_isset(info, sector, 0, 0x01);
  1390. if (prot) {
  1391. if (lock_flag) {
  1392. flash_write_cmd(info, sector, 0,
  1393. AMD_CMD_PPB_LOCK_BC1);
  1394. flash_write_cmd(info, sector, 0,
  1395. AMD_CMD_PPB_LOCK_BC2);
  1396. }
  1397. debug("sector %ld %slocked\n", sector,
  1398. lock_flag ? "" : "already ");
  1399. } else {
  1400. if (!lock_flag) {
  1401. debug("unlock %ld\n", sector);
  1402. flash_write_cmd(info, 0, 0,
  1403. AMD_CMD_PPB_UNLOCK_BC1);
  1404. flash_write_cmd(info, 0, 0,
  1405. AMD_CMD_PPB_UNLOCK_BC2);
  1406. }
  1407. debug("sector %ld %sunlocked\n", sector,
  1408. !lock_flag ? "" : "already ");
  1409. }
  1410. if (flag)
  1411. enable_interrupts();
  1412. if (flash_status_check(info, sector,
  1413. info->erase_blk_tout,
  1414. prot ? "protect" : "unprotect"))
  1415. printf("status check error\n");
  1416. flash_write_cmd(info, 0, 0,
  1417. AMD_CMD_SET_PPB_EXIT_BC1);
  1418. flash_write_cmd(info, 0, 0,
  1419. AMD_CMD_SET_PPB_EXIT_BC2);
  1420. }
  1421. break;
  1422. #ifdef CONFIG_FLASH_CFI_LEGACY
  1423. case CFI_CMDSET_AMD_LEGACY:
  1424. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1425. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1426. if (prot)
  1427. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1428. else
  1429. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1430. #endif
  1431. };
  1432. /*
  1433. * Flash needs to be in status register read mode for
  1434. * flash_full_status_check() to work correctly
  1435. */
  1436. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1437. if ((retcode =
  1438. flash_full_status_check (info, sector, info->erase_blk_tout,
  1439. prot ? "protect" : "unprotect")) == 0) {
  1440. info->protect[sector] = prot;
  1441. /*
  1442. * On some of Intel's flash chips (marked via legacy_unlock)
  1443. * unprotect unprotects all locking.
  1444. */
  1445. if ((prot == 0) && (info->legacy_unlock)) {
  1446. flash_sect_t i;
  1447. for (i = 0; i < info->sector_count; i++) {
  1448. if (info->protect[i])
  1449. flash_real_protect (info, i, 1);
  1450. }
  1451. }
  1452. }
  1453. return retcode;
  1454. }
  1455. /*-----------------------------------------------------------------------
  1456. * flash_read_user_serial - read the OneTimeProgramming cells
  1457. */
  1458. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1459. int len)
  1460. {
  1461. uchar *src;
  1462. uchar *dst;
  1463. dst = buffer;
  1464. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1465. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1466. memcpy (dst, src + offset, len);
  1467. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1468. udelay(1);
  1469. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1470. }
  1471. /*
  1472. * flash_read_factory_serial - read the device Id from the protection area
  1473. */
  1474. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1475. int len)
  1476. {
  1477. uchar *src;
  1478. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1479. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1480. memcpy (buffer, src + offset, len);
  1481. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1482. udelay(1);
  1483. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1484. }
  1485. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1486. /*-----------------------------------------------------------------------
  1487. * Reverse the order of the erase regions in the CFI QRY structure.
  1488. * This is needed for chips that are either a) correctly detected as
  1489. * top-boot, or b) buggy.
  1490. */
  1491. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1492. {
  1493. unsigned int i, j;
  1494. u32 tmp;
  1495. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1496. tmp = qry->erase_region_info[i];
  1497. qry->erase_region_info[i] = qry->erase_region_info[j];
  1498. qry->erase_region_info[j] = tmp;
  1499. }
  1500. }
  1501. /*-----------------------------------------------------------------------
  1502. * read jedec ids from device and set corresponding fields in info struct
  1503. *
  1504. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1505. *
  1506. */
  1507. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1508. {
  1509. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1510. udelay(1);
  1511. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1512. udelay(1000); /* some flash are slow to respond */
  1513. info->manufacturer_id = flash_read_uchar (info,
  1514. FLASH_OFFSET_MANUFACTURER_ID);
  1515. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1516. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1517. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1518. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1519. }
  1520. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1521. {
  1522. info->cmd_reset = FLASH_CMD_RESET;
  1523. cmdset_intel_read_jedec_ids(info);
  1524. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1525. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1526. /* read legacy lock/unlock bit from intel flash */
  1527. if (info->ext_addr) {
  1528. info->legacy_unlock = flash_read_uchar (info,
  1529. info->ext_addr + 5) & 0x08;
  1530. }
  1531. #endif
  1532. return 0;
  1533. }
  1534. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1535. {
  1536. ushort bankId = 0;
  1537. uchar manuId;
  1538. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1539. flash_unlock_seq(info, 0);
  1540. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1541. udelay(1000); /* some flash are slow to respond */
  1542. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1543. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1544. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1545. bankId += 0x100;
  1546. manuId = flash_read_uchar (info,
  1547. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1548. }
  1549. info->manufacturer_id = manuId;
  1550. switch (info->chipwidth){
  1551. case FLASH_CFI_8BIT:
  1552. info->device_id = flash_read_uchar (info,
  1553. FLASH_OFFSET_DEVICE_ID);
  1554. if (info->device_id == 0x7E) {
  1555. /* AMD 3-byte (expanded) device ids */
  1556. info->device_id2 = flash_read_uchar (info,
  1557. FLASH_OFFSET_DEVICE_ID2);
  1558. info->device_id2 <<= 8;
  1559. info->device_id2 |= flash_read_uchar (info,
  1560. FLASH_OFFSET_DEVICE_ID3);
  1561. }
  1562. break;
  1563. case FLASH_CFI_16BIT:
  1564. info->device_id = flash_read_word (info,
  1565. FLASH_OFFSET_DEVICE_ID);
  1566. if ((info->device_id & 0xff) == 0x7E) {
  1567. /* AMD 3-byte (expanded) device ids */
  1568. info->device_id2 = flash_read_uchar (info,
  1569. FLASH_OFFSET_DEVICE_ID2);
  1570. info->device_id2 <<= 8;
  1571. info->device_id2 |= flash_read_uchar (info,
  1572. FLASH_OFFSET_DEVICE_ID3);
  1573. }
  1574. break;
  1575. default:
  1576. break;
  1577. }
  1578. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1579. udelay(1);
  1580. }
  1581. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1582. {
  1583. info->cmd_reset = AMD_CMD_RESET;
  1584. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1585. cmdset_amd_read_jedec_ids(info);
  1586. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1587. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1588. if (info->ext_addr) {
  1589. /* read sector protect/unprotect scheme (at 0x49) */
  1590. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1591. info->legacy_unlock = 1;
  1592. }
  1593. #endif
  1594. return 0;
  1595. }
  1596. #ifdef CONFIG_FLASH_CFI_LEGACY
  1597. static void flash_read_jedec_ids (flash_info_t * info)
  1598. {
  1599. info->manufacturer_id = 0;
  1600. info->device_id = 0;
  1601. info->device_id2 = 0;
  1602. switch (info->vendor) {
  1603. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1604. case CFI_CMDSET_INTEL_STANDARD:
  1605. case CFI_CMDSET_INTEL_EXTENDED:
  1606. cmdset_intel_read_jedec_ids(info);
  1607. break;
  1608. case CFI_CMDSET_AMD_STANDARD:
  1609. case CFI_CMDSET_AMD_EXTENDED:
  1610. cmdset_amd_read_jedec_ids(info);
  1611. break;
  1612. default:
  1613. break;
  1614. }
  1615. }
  1616. /*-----------------------------------------------------------------------
  1617. * Call board code to request info about non-CFI flash.
  1618. * board_flash_get_legacy needs to fill in at least:
  1619. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1620. */
  1621. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1622. {
  1623. flash_info_t *info = &flash_info[banknum];
  1624. if (board_flash_get_legacy(base, banknum, info)) {
  1625. /* board code may have filled info completely. If not, we
  1626. use JEDEC ID probing. */
  1627. if (!info->vendor) {
  1628. int modes[] = {
  1629. CFI_CMDSET_AMD_STANDARD,
  1630. CFI_CMDSET_INTEL_STANDARD
  1631. };
  1632. int i;
  1633. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1634. info->vendor = modes[i];
  1635. info->start[0] =
  1636. (ulong)map_physmem(base,
  1637. info->portwidth,
  1638. MAP_NOCACHE);
  1639. if (info->portwidth == FLASH_CFI_8BIT
  1640. && info->interface == FLASH_CFI_X8X16) {
  1641. info->addr_unlock1 = 0x2AAA;
  1642. info->addr_unlock2 = 0x5555;
  1643. } else {
  1644. info->addr_unlock1 = 0x5555;
  1645. info->addr_unlock2 = 0x2AAA;
  1646. }
  1647. flash_read_jedec_ids(info);
  1648. debug("JEDEC PROBE: ID %x %x %x\n",
  1649. info->manufacturer_id,
  1650. info->device_id,
  1651. info->device_id2);
  1652. if (jedec_flash_match(info, info->start[0]))
  1653. break;
  1654. else
  1655. unmap_physmem((void *)info->start[0],
  1656. MAP_NOCACHE);
  1657. }
  1658. }
  1659. switch(info->vendor) {
  1660. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1661. case CFI_CMDSET_INTEL_STANDARD:
  1662. case CFI_CMDSET_INTEL_EXTENDED:
  1663. info->cmd_reset = FLASH_CMD_RESET;
  1664. break;
  1665. case CFI_CMDSET_AMD_STANDARD:
  1666. case CFI_CMDSET_AMD_EXTENDED:
  1667. case CFI_CMDSET_AMD_LEGACY:
  1668. info->cmd_reset = AMD_CMD_RESET;
  1669. break;
  1670. }
  1671. info->flash_id = FLASH_MAN_CFI;
  1672. return 1;
  1673. }
  1674. return 0; /* use CFI */
  1675. }
  1676. #else
  1677. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1678. {
  1679. return 0; /* use CFI */
  1680. }
  1681. #endif
  1682. /*-----------------------------------------------------------------------
  1683. * detect if flash is compatible with the Common Flash Interface (CFI)
  1684. * http://www.jedec.org/download/search/jesd68.pdf
  1685. */
  1686. static void flash_read_cfi (flash_info_t *info, void *buf,
  1687. unsigned int start, size_t len)
  1688. {
  1689. u8 *p = buf;
  1690. unsigned int i;
  1691. for (i = 0; i < len; i++)
  1692. p[i] = flash_read_uchar(info, start + (i * 2));
  1693. }
  1694. static void __flash_cmd_reset(flash_info_t *info)
  1695. {
  1696. /*
  1697. * We do not yet know what kind of commandset to use, so we issue
  1698. * the reset command in both Intel and AMD variants, in the hope
  1699. * that AMD flash roms ignore the Intel command.
  1700. */
  1701. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1702. udelay(1);
  1703. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1704. }
  1705. void flash_cmd_reset(flash_info_t *info)
  1706. __attribute__((weak,alias("__flash_cmd_reset")));
  1707. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1708. {
  1709. int cfi_offset;
  1710. for (cfi_offset=0;
  1711. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1712. cfi_offset++) {
  1713. /* Issue FLASH reset command */
  1714. flash_cmd_reset(info);
  1715. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1716. FLASH_CMD_CFI);
  1717. if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
  1718. flash_isequal(info, 0,
  1719. FLASH_OFFSET_CFI_RESP + 2, 'R') &&
  1720. flash_isequal(info, 0,
  1721. FLASH_OFFSET_CFI_RESP + 4, 'Y')) {
  1722. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1723. sizeof(struct cfi_qry));
  1724. #ifdef CONFIG_SYS_FLASH_INTERFACE_WIDTH
  1725. info->interface = CONFIG_SYS_FLASH_INTERFACE_WIDTH;
  1726. #else
  1727. info->interface = le16_to_cpu(qry->interface_desc);
  1728. /* Some flash chips can support multiple bus widths.
  1729. * In this case, override the interface width and
  1730. * limit it to the port width.
  1731. */
  1732. if ((info->interface == FLASH_CFI_X8X16) &&
  1733. (info->portwidth == FLASH_CFI_8BIT)) {
  1734. debug("Overriding 16-bit interface"
  1735. " width to 8-bit port width.\n");
  1736. info->interface = FLASH_CFI_X8;
  1737. } else if ((info->interface == FLASH_CFI_X16X32) &&
  1738. (info->portwidth == FLASH_CFI_16BIT)) {
  1739. debug("Overriding 16-bit interface"
  1740. " width to 16-bit port width.\n");
  1741. info->interface = FLASH_CFI_X16;
  1742. }
  1743. #endif
  1744. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1745. debug ("device interface is %d\n",
  1746. info->interface);
  1747. debug ("found port %d chip %d ",
  1748. info->portwidth, info->chipwidth);
  1749. debug ("port %d bits chip %d bits\n",
  1750. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1751. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1752. /* calculate command offsets as in the Linux driver */
  1753. info->addr_unlock1 = 0xaaa;
  1754. info->addr_unlock2 = 0x555;
  1755. /*
  1756. * modify the unlock address if we are
  1757. * in compatibility mode
  1758. */
  1759. if ( /* x8/x16 in x8 mode */
  1760. ((info->chipwidth == FLASH_CFI_BY8) &&
  1761. (info->interface == FLASH_CFI_X8X16)) ||
  1762. /* x16/x32 in x16 mode */
  1763. ((info->chipwidth == FLASH_CFI_BY16) &&
  1764. (info->interface == FLASH_CFI_X16X32)))
  1765. {
  1766. info->addr_unlock1 = 0xaaa;
  1767. info->addr_unlock2 = 0x555;
  1768. }
  1769. info->name = "CFI conformant";
  1770. return 1;
  1771. }
  1772. }
  1773. return 0;
  1774. }
  1775. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1776. {
  1777. debug ("flash detect cfi\n");
  1778. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1779. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1780. for (info->chipwidth = FLASH_CFI_BY8;
  1781. info->chipwidth <= info->portwidth;
  1782. info->chipwidth <<= 1)
  1783. if (__flash_detect_cfi(info, qry)) {
  1784. debug("Found CFI flash, portwidth %d,"
  1785. " chipwidth %d\n",
  1786. info->portwidth, info->chipwidth);
  1787. return 1;
  1788. }
  1789. }
  1790. debug ("not found\n");
  1791. return 0;
  1792. }
  1793. /*
  1794. * Manufacturer-specific quirks. Add workarounds for geometry
  1795. * reversal, etc. here.
  1796. */
  1797. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1798. {
  1799. /* check if flash geometry needs reversal */
  1800. if (qry->num_erase_regions > 1) {
  1801. /* reverse geometry if top boot part */
  1802. if (info->cfi_version < 0x3131) {
  1803. /* CFI < 1.1, try to guess from device id */
  1804. if ((info->device_id & 0x80) != 0)
  1805. cfi_reverse_geometry(qry);
  1806. } else if (flash_read_uchar(info, info->ext_addr + 0x1e) == 3) {
  1807. /* CFI >= 1.1, deduct from top/bottom flag */
  1808. /* note: ext_addr is valid since cfi_version > 0 */
  1809. cfi_reverse_geometry(qry);
  1810. }
  1811. }
  1812. }
  1813. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1814. {
  1815. int reverse_geometry = 0;
  1816. /* Check the "top boot" bit in the PRI */
  1817. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1818. reverse_geometry = 1;
  1819. /* AT49BV6416(T) list the erase regions in the wrong order.
  1820. * However, the device ID is identical with the non-broken
  1821. * AT49BV642D they differ in the high byte.
  1822. */
  1823. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1824. reverse_geometry = !reverse_geometry;
  1825. if (reverse_geometry)
  1826. cfi_reverse_geometry(qry);
  1827. }
  1828. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1829. {
  1830. /* check if flash geometry needs reversal */
  1831. if (qry->num_erase_regions > 1) {
  1832. /* reverse geometry if top boot part */
  1833. if (info->cfi_version < 0x3131) {
  1834. /* CFI < 1.1, guess by device id */
  1835. if (info->device_id == 0x22CA || /* M29W320DT */
  1836. info->device_id == 0x2256 || /* M29W320ET */
  1837. info->device_id == 0x22D7) { /* M29W800DT */
  1838. cfi_reverse_geometry(qry);
  1839. }
  1840. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1841. /* CFI >= 1.1, deduct from top/bottom flag */
  1842. /* note: ext_addr is valid since cfi_version > 0 */
  1843. cfi_reverse_geometry(qry);
  1844. }
  1845. }
  1846. }
  1847. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1848. {
  1849. /*
  1850. * SST, for many recent nor parallel flashes, says they are
  1851. * CFI-conformant. This is not true, since qry struct.
  1852. * reports a std. AMD command set (0x0002), while SST allows to
  1853. * erase two different sector sizes for the same memory.
  1854. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1855. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1856. * Since CFI query detect the 4KB number of sectors, users expects
  1857. * a sector granularity of 4KB, and it is here set.
  1858. */
  1859. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1860. info->device_id == 0x5C23) { /* SST39VF3202B */
  1861. /* set sector granularity to 4KB */
  1862. info->cmd_erase_sector=0x50;
  1863. }
  1864. }
  1865. /*
  1866. * The following code cannot be run from FLASH!
  1867. *
  1868. */
  1869. ulong flash_get_size (phys_addr_t base, int banknum)
  1870. {
  1871. flash_info_t *info = &flash_info[banknum];
  1872. int i, j;
  1873. flash_sect_t sect_cnt;
  1874. phys_addr_t sector;
  1875. unsigned long tmp;
  1876. int size_ratio;
  1877. uchar num_erase_regions;
  1878. int erase_region_size;
  1879. int erase_region_count;
  1880. struct cfi_qry qry;
  1881. unsigned long max_size;
  1882. memset(&qry, 0, sizeof(qry));
  1883. info->ext_addr = 0;
  1884. info->cfi_version = 0;
  1885. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1886. info->legacy_unlock = 0;
  1887. #endif
  1888. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1889. if (flash_detect_cfi (info, &qry)) {
  1890. info->vendor = le16_to_cpu(qry.p_id);
  1891. info->ext_addr = le16_to_cpu(qry.p_adr) * 2;
  1892. debug("extended address is 0x%x\n", info->ext_addr);
  1893. num_erase_regions = qry.num_erase_regions;
  1894. if (info->ext_addr) {
  1895. info->cfi_version = (ushort) flash_read_uchar (info,
  1896. info->ext_addr + 6) << 8;
  1897. info->cfi_version |= (ushort) flash_read_uchar (info,
  1898. info->ext_addr + 8);
  1899. }
  1900. #ifdef DEBUG
  1901. flash_printqry (&qry);
  1902. #endif
  1903. switch (info->vendor) {
  1904. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1905. case CFI_CMDSET_INTEL_STANDARD:
  1906. case CFI_CMDSET_INTEL_EXTENDED:
  1907. cmdset_intel_init(info, &qry);
  1908. break;
  1909. case CFI_CMDSET_AMD_STANDARD:
  1910. case CFI_CMDSET_AMD_EXTENDED:
  1911. cmdset_amd_init(info, &qry);
  1912. break;
  1913. default:
  1914. printf("CFI: Unknown command set 0x%x\n",
  1915. info->vendor);
  1916. /*
  1917. * Unfortunately, this means we don't know how
  1918. * to get the chip back to Read mode. Might
  1919. * as well try an Intel-style reset...
  1920. */
  1921. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1922. return 0;
  1923. }
  1924. /* Do manufacturer-specific fixups */
  1925. switch (info->manufacturer_id) {
  1926. case 0x0001: /* AMD */
  1927. case 0x0037: /* AMIC */
  1928. flash_fixup_amd(info, &qry);
  1929. break;
  1930. case 0x001f:
  1931. flash_fixup_atmel(info, &qry);
  1932. break;
  1933. case 0x0020:
  1934. flash_fixup_stm(info, &qry);
  1935. break;
  1936. case 0x00bf: /* SST */
  1937. flash_fixup_sst(info, &qry);
  1938. break;
  1939. }
  1940. debug ("manufacturer is %d\n", info->vendor);
  1941. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1942. debug ("device id is 0x%x\n", info->device_id);
  1943. debug ("device id2 is 0x%x\n", info->device_id2);
  1944. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1945. debug("port width: %d, chipwidth: %d, interface: %d\n",
  1946. info->portwidth, info->chipwidth, info->interface);
  1947. size_ratio = info->portwidth / info->chipwidth;
  1948. /* if the chip is x8/x16 reduce the ratio by half */
  1949. if ((info->interface == FLASH_CFI_X8X16)
  1950. && (info->chipwidth == FLASH_CFI_BY8)) {
  1951. size_ratio >>= 1;
  1952. }
  1953. debug ("size_ratio %d port %d bits chip %d bits\n",
  1954. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1955. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1956. info->size = 1 << qry.dev_size;
  1957. /* multiply the size by the number of chips */
  1958. info->size *= size_ratio;
  1959. max_size = cfi_flash_bank_size(banknum);
  1960. if (max_size && (info->size > max_size)) {
  1961. debug("[truncated from %ldMiB]", info->size >> 20);
  1962. info->size = max_size;
  1963. }
  1964. debug ("found %d erase regions\n", num_erase_regions);
  1965. sect_cnt = 0;
  1966. sector = base;
  1967. for (i = 0; i < num_erase_regions; i++) {
  1968. if (i > NUM_ERASE_REGIONS) {
  1969. printf ("%d erase regions found, only %d used\n",
  1970. num_erase_regions, NUM_ERASE_REGIONS);
  1971. break;
  1972. }
  1973. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1974. debug("erase region %u: 0x%08lx\n", i, tmp);
  1975. erase_region_count = (tmp & 0xffff) + 1;
  1976. tmp >>= 16;
  1977. erase_region_size =
  1978. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1979. debug ("erase_region_count = %d erase_region_size = %d\n",
  1980. erase_region_count, erase_region_size);
  1981. for (j = 0; j < erase_region_count; j++) {
  1982. if (sector - base >= info->size)
  1983. break;
  1984. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1985. printf("ERROR: too many flash sectors\n");
  1986. break;
  1987. }
  1988. info->start[sect_cnt] =
  1989. (ulong)map_physmem(sector,
  1990. info->portwidth,
  1991. MAP_NOCACHE);
  1992. sector += (erase_region_size * size_ratio);
  1993. /*
  1994. * Only read protection status from
  1995. * supported devices (intel...)
  1996. */
  1997. switch (info->vendor) {
  1998. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1999. case CFI_CMDSET_INTEL_EXTENDED:
  2000. case CFI_CMDSET_INTEL_STANDARD:
  2001. /*
  2002. * Set flash to read-id mode. Otherwise
  2003. * reading protected status is not
  2004. * guaranteed.
  2005. */
  2006. flash_write_cmd(info, sect_cnt, 0,
  2007. FLASH_CMD_READ_ID);
  2008. info->protect[sect_cnt] =
  2009. flash_isset (info, sect_cnt,
  2010. FLASH_OFFSET_PROTECT,
  2011. FLASH_STATUS_PROTECT);
  2012. break;
  2013. case CFI_CMDSET_AMD_EXTENDED:
  2014. case CFI_CMDSET_AMD_STANDARD:
  2015. if (!info->legacy_unlock) {
  2016. /* default: not protected */
  2017. info->protect[sect_cnt] = 0;
  2018. break;
  2019. }
  2020. /* Read protection (PPB) from sector */
  2021. flash_write_cmd(info, 0, 0,
  2022. info->cmd_reset);
  2023. flash_unlock_seq(info, 0);
  2024. flash_write_cmd(info, 0,
  2025. info->addr_unlock1,
  2026. FLASH_CMD_READ_ID);
  2027. info->protect[sect_cnt] =
  2028. flash_isset(
  2029. info, sect_cnt,
  2030. FLASH_OFFSET_PROTECT,
  2031. FLASH_STATUS_PROTECT);
  2032. break;
  2033. default:
  2034. /* default: not protected */
  2035. info->protect[sect_cnt] = 0;
  2036. }
  2037. sect_cnt++;
  2038. }
  2039. }
  2040. info->sector_count = sect_cnt;
  2041. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2042. tmp = 1 << qry.block_erase_timeout_typ;
  2043. info->erase_blk_tout = tmp *
  2044. (1 << qry.block_erase_timeout_max);
  2045. tmp = (1 << qry.buf_write_timeout_typ) *
  2046. (1 << qry.buf_write_timeout_max);
  2047. /* round up when converting to ms */
  2048. info->buffer_write_tout = (tmp + 999) / 1000;
  2049. tmp = (1 << qry.word_write_timeout_typ) *
  2050. (1 << qry.word_write_timeout_max);
  2051. /* round up when converting to ms */
  2052. info->write_tout = (tmp + 999) / 1000;
  2053. info->flash_id = FLASH_MAN_CFI;
  2054. if ((info->interface == FLASH_CFI_X8X16) &&
  2055. (info->chipwidth == FLASH_CFI_BY8)) {
  2056. /* XXX - Need to test on x8/x16 in parallel. */
  2057. info->portwidth >>= 1;
  2058. }
  2059. flash_write_cmd (info, 0, 0, info->cmd_reset);
  2060. }
  2061. return (info->size);
  2062. }
  2063. #ifdef CONFIG_FLASH_CFI_MTD
  2064. void flash_set_verbose(uint v)
  2065. {
  2066. flash_verbose = v;
  2067. }
  2068. #endif
  2069. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2070. {
  2071. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2072. /*
  2073. * Only set this config register if really defined
  2074. * to a valid value (0xffff is invalid)
  2075. */
  2076. if (val == 0xffff)
  2077. return;
  2078. /*
  2079. * Set configuration register. Data is "encrypted" in the 16 lower
  2080. * address bits.
  2081. */
  2082. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2083. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2084. /*
  2085. * Finally issue reset-command to bring device back to
  2086. * read-array mode
  2087. */
  2088. flash_write16(FLASH_CMD_RESET, (void *)base);
  2089. #endif
  2090. }
  2091. /*-----------------------------------------------------------------------
  2092. */
  2093. void flash_protect_default(void)
  2094. {
  2095. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2096. int i;
  2097. struct apl_s {
  2098. ulong start;
  2099. ulong size;
  2100. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2101. #endif
  2102. /* Monitor protection ON by default */
  2103. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2104. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2105. flash_protect(FLAG_PROTECT_SET,
  2106. CONFIG_SYS_MONITOR_BASE,
  2107. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2108. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2109. #endif
  2110. /* Environment protection ON by default */
  2111. #ifdef CONFIG_ENV_IS_IN_FLASH
  2112. flash_protect(FLAG_PROTECT_SET,
  2113. CONFIG_ENV_ADDR,
  2114. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2115. flash_get_info(CONFIG_ENV_ADDR));
  2116. #endif
  2117. /* Redundant environment protection ON by default */
  2118. #ifdef CONFIG_ENV_ADDR_REDUND
  2119. flash_protect(FLAG_PROTECT_SET,
  2120. CONFIG_ENV_ADDR_REDUND,
  2121. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2122. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2123. #endif
  2124. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2125. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  2126. debug("autoprotecting from %08lx to %08lx\n",
  2127. apl[i].start, apl[i].start + apl[i].size - 1);
  2128. flash_protect(FLAG_PROTECT_SET,
  2129. apl[i].start,
  2130. apl[i].start + apl[i].size - 1,
  2131. flash_get_info(apl[i].start));
  2132. }
  2133. #endif
  2134. }
  2135. unsigned long flash_init (void)
  2136. {
  2137. unsigned long size = 0;
  2138. int i;
  2139. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2140. /* read environment from EEPROM */
  2141. char s[64];
  2142. getenv_f("unlock", s, sizeof(s));
  2143. #endif
  2144. /* Init: no FLASHes known */
  2145. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2146. flash_info[i].flash_id = FLASH_UNKNOWN;
  2147. /* Optionally write flash configuration register */
  2148. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2149. cfi_flash_config_reg(i));
  2150. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2151. flash_get_size(cfi_flash_bank_addr(i), i);
  2152. size += flash_info[i].size;
  2153. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2154. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2155. printf ("## Unknown flash on Bank %d "
  2156. "- Size = 0x%08lx = %ld MB\n",
  2157. i+1, flash_info[i].size,
  2158. flash_info[i].size >> 20);
  2159. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2160. }
  2161. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2162. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  2163. /*
  2164. * Only the U-Boot image and it's environment
  2165. * is protected, all other sectors are
  2166. * unprotected (unlocked) if flash hardware
  2167. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2168. * and the environment variable "unlock" is
  2169. * set to "yes".
  2170. */
  2171. if (flash_info[i].legacy_unlock) {
  2172. int k;
  2173. /*
  2174. * Disable legacy_unlock temporarily,
  2175. * since flash_real_protect would
  2176. * relock all other sectors again
  2177. * otherwise.
  2178. */
  2179. flash_info[i].legacy_unlock = 0;
  2180. /*
  2181. * Legacy unlocking (e.g. Intel J3) ->
  2182. * unlock only one sector. This will
  2183. * unlock all sectors.
  2184. */
  2185. flash_real_protect (&flash_info[i], 0, 0);
  2186. flash_info[i].legacy_unlock = 1;
  2187. /*
  2188. * Manually mark other sectors as
  2189. * unlocked (unprotected)
  2190. */
  2191. for (k = 1; k < flash_info[i].sector_count; k++)
  2192. flash_info[i].protect[k] = 0;
  2193. } else {
  2194. /*
  2195. * No legancy unlocking -> unlock all sectors
  2196. */
  2197. flash_protect (FLAG_PROTECT_CLEAR,
  2198. flash_info[i].start[0],
  2199. flash_info[i].start[0]
  2200. + flash_info[i].size - 1,
  2201. &flash_info[i]);
  2202. }
  2203. }
  2204. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2205. }
  2206. flash_protect_default();
  2207. #ifdef CONFIG_FLASH_CFI_MTD
  2208. cfi_mtd_init();
  2209. #endif
  2210. return (size);
  2211. }