interrupts.c 8.0 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments, <www.ti.com>
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11. * Alex Zuepke <azu@sysgo.de>
  12. *
  13. * (C) Copyright 2002
  14. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15. *
  16. * See file CREDITS for list of people who contributed to this
  17. * project.
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License as
  21. * published by the Free Software Foundation; either version 2 of
  22. * the License, or (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  32. * MA 02111-1307 USA
  33. */
  34. #include <common.h>
  35. #include <arm925t.h>
  36. #include <configs/omap1510.h>
  37. #include <asm/proc-armv/ptrace.h>
  38. extern void reset_cpu(ulong addr);
  39. #define TIMER_LOAD_VAL 0xffffffff
  40. /* macro to read the 32 bit timer */
  41. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
  42. #ifdef CONFIG_USE_IRQ
  43. /* enable IRQ interrupts */
  44. void enable_interrupts (void)
  45. {
  46. unsigned long temp;
  47. __asm__ __volatile__("mrs %0, cpsr\n"
  48. "bic %0, %0, #0x80\n"
  49. "msr cpsr_c, %0"
  50. : "=r" (temp)
  51. :
  52. : "memory");
  53. }
  54. /*
  55. * disable IRQ/FIQ interrupts
  56. * returns true if interrupts had been enabled before we disabled them
  57. */
  58. int disable_interrupts (void)
  59. {
  60. unsigned long old,temp;
  61. __asm__ __volatile__("mrs %0, cpsr\n"
  62. "orr %1, %0, #0xc0\n"
  63. "msr cpsr_c, %1"
  64. : "=r" (old), "=r" (temp)
  65. :
  66. : "memory");
  67. return (old & 0x80) == 0;
  68. }
  69. #else
  70. void enable_interrupts (void)
  71. {
  72. return;
  73. }
  74. int disable_interrupts (void)
  75. {
  76. return 0;
  77. }
  78. #endif
  79. void bad_mode (void)
  80. {
  81. panic ("Resetting CPU ...\n");
  82. reset_cpu (0);
  83. }
  84. void show_regs (struct pt_regs *regs)
  85. {
  86. unsigned long flags;
  87. const char *processor_modes[] = {
  88. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  89. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  90. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  91. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  92. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  93. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  94. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  95. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  96. };
  97. flags = condition_codes (regs);
  98. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  99. "sp : %08lx ip : %08lx fp : %08lx\n",
  100. instruction_pointer (regs),
  101. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  102. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  103. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  104. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  105. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  106. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  107. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  108. printf ("Flags: %c%c%c%c",
  109. flags & CC_N_BIT ? 'N' : 'n',
  110. flags & CC_Z_BIT ? 'Z' : 'z',
  111. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  112. printf (" IRQs %s FIQs %s Mode %s%s\n",
  113. interrupts_enabled (regs) ? "on" : "off",
  114. fast_interrupts_enabled (regs) ? "on" : "off",
  115. processor_modes[processor_mode (regs)],
  116. thumb_mode (regs) ? " (T)" : "");
  117. }
  118. void do_undefined_instruction (struct pt_regs *pt_regs)
  119. {
  120. printf ("undefined instruction\n");
  121. show_regs (pt_regs);
  122. bad_mode ();
  123. }
  124. void do_software_interrupt (struct pt_regs *pt_regs)
  125. {
  126. printf ("software interrupt\n");
  127. show_regs (pt_regs);
  128. bad_mode ();
  129. }
  130. void do_prefetch_abort (struct pt_regs *pt_regs)
  131. {
  132. printf ("prefetch abort\n");
  133. show_regs (pt_regs);
  134. bad_mode ();
  135. }
  136. void do_data_abort (struct pt_regs *pt_regs)
  137. {
  138. printf ("data abort\n");
  139. show_regs (pt_regs);
  140. bad_mode ();
  141. }
  142. void do_not_used (struct pt_regs *pt_regs)
  143. {
  144. printf ("not used\n");
  145. show_regs (pt_regs);
  146. bad_mode ();
  147. }
  148. void do_fiq (struct pt_regs *pt_regs)
  149. {
  150. printf ("fast interrupt request\n");
  151. show_regs (pt_regs);
  152. bad_mode ();
  153. }
  154. void do_irq (struct pt_regs *pt_regs)
  155. {
  156. printf ("interrupt request\n");
  157. show_regs (pt_regs);
  158. bad_mode ();
  159. }
  160. static ulong timestamp;
  161. static ulong lastdec;
  162. /* nothing really to do with interrupts, just starts up a counter. */
  163. int interrupt_init (void)
  164. {
  165. int32_t val;
  166. /* Start the decrementer ticking down from 0xffffffff */
  167. *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
  168. val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
  169. *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
  170. /* init the timestamp and lastdec value */
  171. reset_timer_masked();
  172. return (0);
  173. }
  174. /*
  175. * timer without interrupts
  176. */
  177. void reset_timer (void)
  178. {
  179. reset_timer_masked ();
  180. }
  181. ulong get_timer (ulong base)
  182. {
  183. return get_timer_masked () - base;
  184. }
  185. void set_timer (ulong t)
  186. {
  187. timestamp = t;
  188. }
  189. /* delay x useconds AND perserve advance timstamp value */
  190. void udelay (unsigned long usec)
  191. {
  192. #ifdef CONFIG_INNOVATOROMAP1510
  193. #define LOOPS_PER_MSEC 60 /* tuned on omap1510 */
  194. volatile int i, time_remaining = LOOPS_PER_MSEC * usec;
  195. for (i = time_remaining; i > 0; i--) {
  196. }
  197. #else
  198. ulong tmo, tmp;
  199. if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
  200. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  201. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  202. tmo /= 1000; /* finish normalize. */
  203. }else{ /* else small number, don't kill it prior to HZ multiply */
  204. tmo = usec * CFG_HZ;
  205. tmo /= (1000*1000);
  206. }
  207. tmp = get_timer (0); /* get current timestamp */
  208. if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
  209. reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
  210. else
  211. tmo += tmp; /* else, set advancing stamp wake up time */
  212. while (get_timer_masked () < tmo)/* loop till event */
  213. /*NOP*/;
  214. #endif
  215. }
  216. void reset_timer_masked (void)
  217. {
  218. /* reset time */
  219. lastdec = READ_TIMER; /* capure current decrementer value time */
  220. timestamp = 0; /* start "advancing" time stamp from 0 */
  221. }
  222. ulong get_timer_masked (void)
  223. {
  224. ulong now = READ_TIMER; /* current tick value */
  225. if (lastdec >= now) { /* normal mode (non roll) */
  226. /* normal mode */
  227. timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
  228. } else { /* we have overflow of the count down timer */
  229. /* nts = ts + ld + (TLV - now)
  230. * ts=old stamp, ld=time that passed before passing through -1
  231. * (TLV-now) amount of time after passing though -1
  232. * nts = new "advancing time stamp"...it could also roll and cause problems.
  233. */
  234. timestamp += lastdec + TIMER_LOAD_VAL - now;
  235. }
  236. lastdec = now;
  237. return timestamp;
  238. }
  239. /* waits specified delay value and resets timestamp */
  240. void udelay_masked (unsigned long usec)
  241. {
  242. #ifdef CONFIG_INNOVATOROMAP1510
  243. #define LOOPS_PER_MSEC 60 /* tuned on omap1510 */
  244. volatile int i, time_remaining = LOOPS_PER_MSEC*usec;
  245. for (i=time_remaining; i>0; i--) { }
  246. #else
  247. ulong tmo;
  248. if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
  249. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  250. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  251. tmo /= 1000; /* finish normalize. */
  252. }else{ /* else small number, don't kill it prior to HZ multiply */
  253. tmo = usec * CFG_HZ;
  254. tmo /= (1000*1000);
  255. }
  256. reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */
  257. while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
  258. /*NOP*/;
  259. #endif
  260. }
  261. /*
  262. * This function is derived from PowerPC code (read timebase as long long).
  263. * On ARM it just returns the timer value.
  264. */
  265. unsigned long long get_ticks(void)
  266. {
  267. return get_timer(0);
  268. }
  269. /*
  270. * This function is derived from PowerPC code (timebase clock frequency).
  271. * On ARM it returns the number of timer ticks per second.
  272. */
  273. ulong get_tbclk (void)
  274. {
  275. ulong tbclk;
  276. tbclk = CFG_HZ;
  277. return tbclk;
  278. }