ali512x.c 9.4 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Based on sc520cdp.c from rolo 1.6:
  25. *----------------------------------------------------------------------
  26. * (C) Copyright 2000
  27. * Sysgo Real-Time Solutions GmbH
  28. * Klein-Winternheim, Germany
  29. *----------------------------------------------------------------------
  30. */
  31. #include <common.h>
  32. #include <asm/io.h>
  33. #include <asm/ic/ali512x.h>
  34. /* ALI M5123 Logical device numbers:
  35. * 0 FDC
  36. * 1 unused?
  37. * 2 unused?
  38. * 3 lpt
  39. * 4 UART1
  40. * 5 UART2
  41. * 6 RTC
  42. * 7 mouse/kbd
  43. * 8 CIO
  44. */
  45. /*
  46. ************************************************************
  47. * Some access primitives for the ALi chip: *
  48. ************************************************************
  49. */
  50. static void ali_write(u8 index, u8 value)
  51. {
  52. /* write an arbirary register */
  53. outb(index, ALI_INDEX);
  54. outb(value, ALI_DATA);
  55. }
  56. static int ali_read(u8 index)
  57. {
  58. outb(index, ALI_INDEX);
  59. return inb(ALI_DATA);
  60. }
  61. #define ALI_OPEN() \
  62. outb(0x51, ALI_DATA); \
  63. outb(0x23, ALI_DATA)
  64. #define ALI_CLOSE() \
  65. outb(0xbb, ALI_DATA)
  66. /* Select a logical device */
  67. #define ALI_SELDEV(dev) \
  68. ali_write(0x07, dev)
  69. void ali512x_init(void)
  70. {
  71. ALI_OPEN();
  72. ali_write(0x02, 0x01); /* soft reset */
  73. ali_write(0x03, 0x03); /* disable access to CIOs */
  74. ali_write(0x22, 0x00); /* disable direct powerdown */
  75. ali_write(0x23, 0x00); /* disable auto powerdown */
  76. ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
  77. ALI_CLOSE();
  78. }
  79. void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
  80. {
  81. ALI_OPEN();
  82. ALI_SELDEV(0);
  83. ali_write(0x30, enabled?1:0);
  84. if (enabled) {
  85. ali_write(0x60, io >> 8);
  86. ali_write(0x61, io & 0xff);
  87. ali_write(0x70, irq);
  88. ali_write(0x74, dma_channel);
  89. /* AT mode, no drive swap */
  90. ali_write(0xf0, 0x08);
  91. ali_write(0xf1, 0x00);
  92. ali_write(0xf2, 0xff);
  93. ali_write(0xf4, 0x00);
  94. }
  95. ALI_CLOSE();
  96. }
  97. void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
  98. {
  99. ALI_OPEN();
  100. ALI_SELDEV(3);
  101. ali_write(0x30, enabled?1:0);
  102. if (enabled) {
  103. ali_write(0x60, io >> 8);
  104. ali_write(0x61, io & 0xff);
  105. ali_write(0x70, irq);
  106. ali_write(0x74, dma_channel);
  107. /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
  108. ali_write(0xf0, 0xbc);
  109. /* 12 MHz, Burst DMA in ECP */
  110. ali_write(0xf1, 0x05);
  111. }
  112. ALI_CLOSE();
  113. }
  114. void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
  115. {
  116. ALI_OPEN();
  117. ALI_SELDEV(index?5:4);
  118. ali_write(0x30, enabled?1:0);
  119. if (enabled) {
  120. ali_write(0x60, io >> 8);
  121. ali_write(0x61, io & 0xff);
  122. ali_write(0x70, irq);
  123. ali_write(0xf0, 0x00);
  124. ali_write(0xf1, 0x00);
  125. /* huh? write 0xf2 twice - a typo in rolo
  126. * or some secret ali errata? Who knows?
  127. */
  128. if (index) {
  129. ali_write(0xf2, 0x00);
  130. }
  131. ali_write(0xf2, 0x0c);
  132. }
  133. ALI_CLOSE();
  134. }
  135. void ali512x_set_uart2_irda(int enabled)
  136. {
  137. ALI_OPEN();
  138. ALI_SELDEV(5);
  139. ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
  140. ALI_CLOSE();
  141. }
  142. void ali512x_set_rtc(int enabled, u16 io, u8 irq)
  143. {
  144. ALI_OPEN();
  145. ALI_SELDEV(6);
  146. ali_write(0x30, enabled?1:0);
  147. if (enabled) {
  148. ali_write(0x60, io >> 8);
  149. ali_write(0x61, io & 0xff);
  150. ali_write(0x70, irq);
  151. ali_write(0xf0, 0x00);
  152. }
  153. ALI_CLOSE();
  154. }
  155. void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
  156. {
  157. ALI_OPEN();
  158. ALI_SELDEV(7);
  159. ali_write(0x30, enabled?1:0);
  160. if (enabled) {
  161. ali_write(0x70, kbc_irq);
  162. ali_write(0x72, mouse_irq);
  163. ali_write(0xf0, 0x00);
  164. }
  165. ALI_CLOSE();
  166. }
  167. /* Common I/O
  168. *
  169. * (This descripotsion is base on several incompete sources
  170. * since I have not been able to obtain any datasheet for the device
  171. * there may be some mis-understandings burried in here.
  172. * -- Daniel daniel@omicron.se)
  173. *
  174. * There are 22 CIO pins numbered
  175. * 10-17
  176. * 20-25
  177. * 30-37
  178. *
  179. * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
  180. * other functions.
  181. *
  182. * Secondary
  183. * CIO Pin Function Decription
  184. * =======================================================
  185. * CIO10 IRQIN1 Interrupt input 1?
  186. * CIO11 IRQIN2 Interrupt input 2?
  187. * CIO12 IRRX IrDa Receive
  188. * CIO13 IRTX IrDa Transmit
  189. * CIO14 P21 KBC P21 fucntion
  190. * CIO15 P20 KBC P21 fucntion
  191. * CIO16 I2C_CLK I2C Clock
  192. * CIO17 I2C_DAT I2C Data
  193. *
  194. * CIO20 -
  195. * CIO21 -
  196. * CIO22 -
  197. * CIO23 -
  198. * CIO24 -
  199. * CIO25 LOCK Keylock
  200. *
  201. * CIO30 KBC_CLK Keybaord Clock
  202. * CIO31 CS0J General Chip Select decoder CS0J
  203. * CIO32 CS1J General Chip Select decoder CS1J
  204. * CIO33 ALT_KCLK Alternative Keyboard Clock
  205. * CIO34 ALT_KDAT Alternative Keyboard Data
  206. * CIO35 ALT_MCLK Alternative Mouse Clock
  207. * CIO36 ALT_MDAT Alternative Mouse Data
  208. * CIO37 ALT_KBC Alternative KBC select
  209. *
  210. * The CIO use a double indirect address scheme.
  211. *
  212. * Reigster 3 in the SIO is used to selectg where the CIO
  213. * I/O registers show up under function 8. Note that these
  214. * registers clash with the CIO function select regsters,
  215. * below.
  216. *
  217. * SIO reigster 3 (CIO Address Selection) bit definitions:
  218. * bit 7 CIO data register enabled
  219. * bit 1-0 CIO indirect registers select
  220. * 0 index = 0xE0 data = 0xE1
  221. * 1 index = 0xE2 data = 0xE3
  222. * 2 index = 0xE4 data = 0xE5
  223. * 3 index = 0xEA data = 0xEB
  224. *
  225. * There are three CIO I/O register accessed via CIO index and CIO data
  226. * 0x01 CIO 10-17 data
  227. * 0x02 CIO 20-25 data (bits 7-6 unused)
  228. * 0x03 CIO 30-37 data
  229. *
  230. *
  231. * The pin function is accessed through normal
  232. * SIO registers, each register have the same format:
  233. *
  234. * Bit Function Value
  235. * 0 Input/output 1=input
  236. * 1 Polarity of signal 1=inverted
  237. * 2 Unused ??
  238. * 3 Function (normal or special) 1=special
  239. * 7-4 Unused
  240. *
  241. * SIO REG
  242. * 0xe0 CIO 10 Config
  243. * 0xe1 CIO 11 Config
  244. * 0xe2 CIO 12 Config
  245. * 0xe3 CIO 13 Config
  246. * 0xe4 CIO 14 Config
  247. * 0xe5 CIO 15 Config
  248. * 0xe6 CIO 16 Config
  249. * 0xe7 CIO 16 Config
  250. *
  251. * 0xe8 CIO 20 Config
  252. * 0xe9 CIO 21 Config
  253. * 0xea CIO 22 Config
  254. * 0xeb CIO 23 Config
  255. * 0xec CIO 24 Config
  256. * 0xed CIO 25 Config
  257. *
  258. * 0xf5 CIO 30 Config
  259. * 0xf6 CIO 31 Config
  260. * 0xf7 CIO 32 Config
  261. * 0xf8 CIO 33 Config
  262. * 0xf9 CIO 34 Config
  263. * 0xfa CIO 35 Config
  264. * 0xfb CIO 36 Config
  265. * 0xfc CIO 37 Config
  266. *
  267. */
  268. void ali512x_set_cio(int enabled)
  269. {
  270. int i;
  271. ALI_OPEN();
  272. ali_write(0x3, 3); /* Disable CIO data register */
  273. ALI_SELDEV(8);
  274. ali_write(0x30, enabled?1:0);
  275. /* set all pins to input to start with */
  276. for (i=0xe0;i<0xee;i++) {
  277. ali_write(i, 1);
  278. }
  279. for (i=0xf5;i<0xfe;i++) {
  280. ali_write(i, 1);
  281. }
  282. ALI_CLOSE();
  283. }
  284. void ali512x_cio_function(int pin, int special, int inv, int input)
  285. {
  286. u8 data;
  287. u8 addr;
  288. /* valid pins are 10-17, 20-25 and 30-37 */
  289. if (pin >= 10 && pin <= 17) {
  290. addr = 0xe0+(pin-10);
  291. } else if (pin >= 20 && pin <= 25) {
  292. addr = 0xe8+(pin-20);
  293. } else if (pin >= 30 && pin <= 37) {
  294. addr = 0xf5+(pin-30);
  295. } else {
  296. return;
  297. }
  298. ALI_OPEN();
  299. ALI_SELDEV(8);
  300. ali_write(0x03, 0x03); /* Disable CIO data register */
  301. data=0;
  302. if (special) {
  303. data |= 0x08;
  304. } else {
  305. if (inv) {
  306. data |= 0x02;
  307. }
  308. if (input) {
  309. data |= 0x01;
  310. }
  311. }
  312. ali_write(addr, data);
  313. ALI_CLOSE();
  314. }
  315. void ali512x_cio_out(int pin, int value)
  316. {
  317. u8 reg;
  318. u8 data;
  319. u8 bit;
  320. /* valid pins are 10-17, 20-25 and 30-37 */
  321. if (pin >= 10 && pin <= 17) {
  322. reg = 1;
  323. pin -= 10;
  324. } else if (pin >= 20 && pin <= 25) {
  325. reg = 2;
  326. pin -= 20;
  327. } else if (pin >= 30 && pin <= 37) {
  328. reg = 3;
  329. pin -= 30;
  330. } else {
  331. return;
  332. }
  333. bit = 1 << pin;
  334. ALI_OPEN();
  335. ALI_SELDEV(8);
  336. ali_write(0x03, 0x83); /* Enable CIO data register, use data port at 0xea */
  337. ali_write(0xea, reg); /* select I/O register */
  338. data = ali_read(0xeb);
  339. if (value) {
  340. data |= bit;
  341. } else {
  342. data &= ~bit;
  343. }
  344. ali_write(0xeb, data);
  345. ali_write(0xea, 0); /* select register 0 */
  346. ali_write(0x03, 0x03); /* Disable CIO data register */
  347. ALI_CLOSE();
  348. }
  349. int ali512x_cio_in(int pin)
  350. {
  351. u8 reg;
  352. u8 data;
  353. u8 bit;
  354. /* valid pins are 10-17, 20-25 and 30-37 */
  355. if (pin >= 10 && pin <= 17) {
  356. reg = 1;
  357. pin -= 10;
  358. } else if (pin >= 20 && pin <= 25) {
  359. reg = 2;
  360. pin -= 20;
  361. } else if (pin >= 30 && pin <= 37) {
  362. reg = 3;
  363. pin -= 30;
  364. } else {
  365. return -1;
  366. }
  367. bit = 1 << pin;
  368. ALI_OPEN();
  369. ALI_SELDEV(8);
  370. ali_write(0x03, 0x83); /* Enable CIO data register, use data port at 0xea */
  371. ali_write(0xea, reg); /* select I/O register */
  372. data = ali_read(0xeb);
  373. ali_write(0xea, 0); /* select register 0 */
  374. ali_write(0x03, 0x03); /* Disable CIO data register */
  375. ALI_CLOSE();
  376. return data & bit;
  377. }